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JPS57150193A - Non-volatile semiconductor memory device - Google Patents

Non-volatile semiconductor memory device

Info

Publication number
JPS57150193A
JPS57150193A JP3633581A JP3633581A JPS57150193A JP S57150193 A JPS57150193 A JP S57150193A JP 3633581 A JP3633581 A JP 3633581A JP 3633581 A JP3633581 A JP 3633581A JP S57150193 A JPS57150193 A JP S57150193A
Authority
JP
Japan
Prior art keywords
potential
write
memory cell
pulse
volatile semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP3633581A
Other languages
Japanese (ja)
Other versions
JPS6129077B2 (en
Inventor
Hiroshi Iwahashi
Masamichi Asano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP3633581A priority Critical patent/JPS57150193A/en
Publication of JPS57150193A publication Critical patent/JPS57150193A/en
Publication of JPS6129077B2 publication Critical patent/JPS6129077B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits

Landscapes

  • Read Only Memory (AREA)

Abstract

PURPOSE:To improve write speed, by changing a source setting potential of a MOSFET forming a memory cell at write. CONSTITUTION:When a write period is obtained with a lower level of a write signal W, a pulse A with a short width is outputted from a pulse generator 13, then a transistor T1 turns on, and a source potential Vs of MOSFETM11... having a floating gate forming a memory cell is set to a low potential, such as 0.5V determined with resistors 11 and 12 connected to ground. Then, when the pulse A disappears, the transistors T1 turns off, and the potential Vs is set to a high potential such as 0.9V determined with the resistor 11. The write speed of non-volatile semiconductor memory device is increased in a system in which the source potential of the memory cell is increased for the threshold voltage rapidly from a low potential at the initial stage is changed to be set high.
JP3633581A 1981-03-13 1981-03-13 Non-volatile semiconductor memory device Granted JPS57150193A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3633581A JPS57150193A (en) 1981-03-13 1981-03-13 Non-volatile semiconductor memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3633581A JPS57150193A (en) 1981-03-13 1981-03-13 Non-volatile semiconductor memory device

Publications (2)

Publication Number Publication Date
JPS57150193A true JPS57150193A (en) 1982-09-16
JPS6129077B2 JPS6129077B2 (en) 1986-07-04

Family

ID=12466952

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3633581A Granted JPS57150193A (en) 1981-03-13 1981-03-13 Non-volatile semiconductor memory device

Country Status (1)

Country Link
JP (1) JPS57150193A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60179999A (en) * 1984-02-28 1985-09-13 Fujitsu Ltd Non-volatile semiconductor memory device
EP0646933A3 (en) * 1993-10-04 1995-11-02 Texas Instruments Inc Method for programming floating-gate memory cells.
JP2006525622A (en) * 2003-04-30 2006-11-09 フリースケール セミコンダクター インコーポレイテッド Nonvolatile memory with bias on source electrode for HCI programming

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60179999A (en) * 1984-02-28 1985-09-13 Fujitsu Ltd Non-volatile semiconductor memory device
EP0646933A3 (en) * 1993-10-04 1995-11-02 Texas Instruments Inc Method for programming floating-gate memory cells.
JP2006525622A (en) * 2003-04-30 2006-11-09 フリースケール セミコンダクター インコーポレイテッド Nonvolatile memory with bias on source electrode for HCI programming
EP1623431A4 (en) * 2003-04-30 2007-10-17 Freescale Semiconductor Inc A non-volatile memory having a bias on the source electrode for hci programming

Also Published As

Publication number Publication date
JPS6129077B2 (en) 1986-07-04

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