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JPS5683976A - Semiconductor device and manufacture - Google Patents

Semiconductor device and manufacture

Info

Publication number
JPS5683976A
JPS5683976A JP16125579A JP16125579A JPS5683976A JP S5683976 A JPS5683976 A JP S5683976A JP 16125579 A JP16125579 A JP 16125579A JP 16125579 A JP16125579 A JP 16125579A JP S5683976 A JPS5683976 A JP S5683976A
Authority
JP
Japan
Prior art keywords
film
region
type
impurity
polycrystal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16125579A
Other languages
Japanese (ja)
Inventor
Takeo Kondo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP16125579A priority Critical patent/JPS5683976A/en
Publication of JPS5683976A publication Critical patent/JPS5683976A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

PURPOSE:To obtain an MIS type element in a fine pattern by a method wherein when a source, drain and wiring layers respectively are formed on a semiconductor substrate, a polycrystal Si film not containing impurity is provided at first and those layers are formed by means of an impurity diffusion. CONSTITUTION:An SiO2 film 2 is cover-attached on a P type Si substrate 1, masks such as resist films 6 are provided on an element formed region 4 and a diffusion wiring formed region 5, and a P<-> type inversion preventive region 7 is diffusion- formed on the substrate 1 exposed between those regions 4, 5. Then, the masks are removed and a heat treatment is applied to make a thick field SiO2 film 8 be grown on the region 7, the polycrystal Si film 9 not containing the impurity be accumulated on the whole surface, and openings are formed on the region 4 and film 8 by selectively applying an etching. Then, the film 9 remained is covered with an SiO2 film 11 on the surface, and the polycrystal Si gate electrode 12 is fixed only in the opening 10 of the region 4 through the gate SiO2 film 11. In the following, an N type impurity is diffused to give conductivity to the film 9 and also to form the N<+> type source, drain regions 13, 14 and the wiring layer 15.
JP16125579A 1979-12-12 1979-12-12 Semiconductor device and manufacture Pending JPS5683976A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16125579A JPS5683976A (en) 1979-12-12 1979-12-12 Semiconductor device and manufacture

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16125579A JPS5683976A (en) 1979-12-12 1979-12-12 Semiconductor device and manufacture

Publications (1)

Publication Number Publication Date
JPS5683976A true JPS5683976A (en) 1981-07-08

Family

ID=15731605

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16125579A Pending JPS5683976A (en) 1979-12-12 1979-12-12 Semiconductor device and manufacture

Country Status (1)

Country Link
JP (1) JPS5683976A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5335479A (en) * 1976-09-14 1978-04-01 Agency Of Ind Science & Technol Semiconductor unit
JPS54131882A (en) * 1978-04-03 1979-10-13 Nec Corp Semiconductor device and its manufacture

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5335479A (en) * 1976-09-14 1978-04-01 Agency Of Ind Science & Technol Semiconductor unit
JPS54131882A (en) * 1978-04-03 1979-10-13 Nec Corp Semiconductor device and its manufacture

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