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JPS5659339A - Input/output control unit - Google Patents

Input/output control unit

Info

Publication number
JPS5659339A
JPS5659339A JP13379679A JP13379679A JPS5659339A JP S5659339 A JPS5659339 A JP S5659339A JP 13379679 A JP13379679 A JP 13379679A JP 13379679 A JP13379679 A JP 13379679A JP S5659339 A JPS5659339 A JP S5659339A
Authority
JP
Japan
Prior art keywords
input
flag memory
executed
generated
microprocessor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13379679A
Other languages
Japanese (ja)
Other versions
JPS6022383B2 (en
Inventor
Koichi Nishida
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP13379679A priority Critical patent/JPS6022383B2/en
Publication of JPS5659339A publication Critical patent/JPS5659339A/en
Publication of JPS6022383B2 publication Critical patent/JPS6022383B2/en
Expired legal-status Critical Current

Links

Abstract

PURPOSE: To make it possible to from a highly efficient input/output control unit without using a high speed microprocessor, by providing a flag memory between CPU and the microprocessor.
CONSTITUTION: When an input/output instruction is executed by CPU2 side, an access request 31 is generated to the flag memory 20, and the information 41 of the input/output instruction control signal is given to the address input of the flag memory 20, and also the data line is made active so that it is written. Also, when the instruction for reading out the contents of the flag memory 20 from the microprocessor 9 has been executed, as well, the access request 32 is generated, and the information which has been written is read out. In case when both the access requests 31 and 32 have been generated, the response is made by access available signal to the request which has been received earlier, by means of the priority control circuit 31. Also, in case when the input/output unit is started by CPU2 side, the input/output instruction for starting is executed by checking the contents of the flip-flop 60 which is being operated.
COPYRIGHT: (C)1981,JPO&Japio
JP13379679A 1979-10-17 1979-10-17 input/output control device Expired JPS6022383B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13379679A JPS6022383B2 (en) 1979-10-17 1979-10-17 input/output control device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13379679A JPS6022383B2 (en) 1979-10-17 1979-10-17 input/output control device

Publications (2)

Publication Number Publication Date
JPS5659339A true JPS5659339A (en) 1981-05-22
JPS6022383B2 JPS6022383B2 (en) 1985-06-01

Family

ID=15113214

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13379679A Expired JPS6022383B2 (en) 1979-10-17 1979-10-17 input/output control device

Country Status (1)

Country Link
JP (1) JPS6022383B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59223868A (en) * 1983-05-16 1984-12-15 Fujitsu Ltd Interface method of magnetic tape device
JPS60110064A (en) * 1983-08-04 1985-06-15 テクトロニツクス・インコ−ポレイテツド Non-synchronous buffer communication interface

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59223868A (en) * 1983-05-16 1984-12-15 Fujitsu Ltd Interface method of magnetic tape device
JPS60110064A (en) * 1983-08-04 1985-06-15 テクトロニツクス・インコ−ポレイテツド Non-synchronous buffer communication interface

Also Published As

Publication number Publication date
JPS6022383B2 (en) 1985-06-01

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