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JPS56167350A - Manufacture of integrated circuit - Google Patents

Manufacture of integrated circuit

Info

Publication number
JPS56167350A
JPS56167350A JP7036680A JP7036680A JPS56167350A JP S56167350 A JPS56167350 A JP S56167350A JP 7036680 A JP7036680 A JP 7036680A JP 7036680 A JP7036680 A JP 7036680A JP S56167350 A JPS56167350 A JP S56167350A
Authority
JP
Japan
Prior art keywords
bumps
wafer
chips
resin film
manufacture
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7036680A
Other languages
Japanese (ja)
Inventor
Makoto Koshikawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Citizen Watch Co Ltd
Original Assignee
Citizen Watch Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Citizen Watch Co Ltd filed Critical Citizen Watch Co Ltd
Priority to JP7036680A priority Critical patent/JPS56167350A/en
Publication of JPS56167350A publication Critical patent/JPS56167350A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/79—Apparatus for Tape Automated Bonding [TAB]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/86—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using tape automated bonding [TAB]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01013—Aluminum [Al]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1515—Shape
    • H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/15165—Monolayer substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

PURPOSE:To obtain the IC for watch at a low cost and to manufacture the IC in a thin type and to enhance reliability thereof by a method wherein a resin film is applied on an IC wafer formed with bumps, and after the resin film on the bumps and street lines are removed, the wafer is divided into chips and the IC is mounted. CONSTITUTION:The resin film 5 is applied on the whole surface of the IC wafer 1 being formed with the Au bumps 4 on Al pads 41 interposing barrier metal layers 43 between them to form protective layers. After the refin film 5 on the street lines 2 to divide the wafer 1 and the bumps 4 are removed, the chips 3 are made out by scribing. Then the chips 3 are jointed to flexible substrates by the bumps 4 and the IC is mounted. Accordingly because the area of the Au bumps 4 can be made as smaller than the pads 41, and resin sealing process can be simplified, the IC can be obtained at the low cost. Moreover the IC can be manufactured in the thin type without damaging reliability of the IC.
JP7036680A 1980-05-27 1980-05-27 Manufacture of integrated circuit Pending JPS56167350A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7036680A JPS56167350A (en) 1980-05-27 1980-05-27 Manufacture of integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7036680A JPS56167350A (en) 1980-05-27 1980-05-27 Manufacture of integrated circuit

Publications (1)

Publication Number Publication Date
JPS56167350A true JPS56167350A (en) 1981-12-23

Family

ID=13429361

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7036680A Pending JPS56167350A (en) 1980-05-27 1980-05-27 Manufacture of integrated circuit

Country Status (1)

Country Link
JP (1) JPS56167350A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5462636A (en) * 1993-12-28 1995-10-31 International Business Machines Corporation Method for chemically scribing wafers

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5462636A (en) * 1993-12-28 1995-10-31 International Business Machines Corporation Method for chemically scribing wafers

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