JPS56167335A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS56167335A JPS56167335A JP7175380A JP7175380A JPS56167335A JP S56167335 A JPS56167335 A JP S56167335A JP 7175380 A JP7175380 A JP 7175380A JP 7175380 A JP7175380 A JP 7175380A JP S56167335 A JPS56167335 A JP S56167335A
- Authority
- JP
- Japan
- Prior art keywords
- prevent
- internal defect
- substrate
- defect
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Bipolar Transistors (AREA)
Abstract
PURPOSE:To prevent decrease in internal defect density and also prevent occurrence of fine defect on an epitaxially grown layer, in a process of manufacturing of a bipolar device, by forming an embedded layer in a substrate crystal and providing it with 2-step heat-treatment process. CONSTITUTION:On a substrate on which a bipolar device is prepared, a hole is provided on an oxide coating 3 and an embedded layer 4 is formed in nitrogen atmosphere containing oxygen. And then, this substrate is provided with heat treatment at a temperature between 650 deg.C and 1,100 deg.C in dry oxygen, and an internal defect producing nucleus 7 is formed. And then, it is again heat-treated at a high temperature between 1,100 deg.C and 1,200 deg.C in wet-type or dry-type oxygen or inert gas, and the nucleus 7 is made to grow to a swirl-like internal defect. After the oxide coating 3 was removed, an epitaxial layer 5 is made to grow. As it is possible, by doing so, to prevent diminishing of internal defect which contributes to intrinsic gettering effect, it is possible to prevent the epitaxial layer 5 from occurrence of fine defect and to improve production recovery of the device.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7175380A JPS56167335A (en) | 1980-05-29 | 1980-05-29 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7175380A JPS56167335A (en) | 1980-05-29 | 1980-05-29 | Manufacture of semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS56167335A true JPS56167335A (en) | 1981-12-23 |
JPS6326541B2 JPS6326541B2 (en) | 1988-05-30 |
Family
ID=13469601
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7175380A Granted JPS56167335A (en) | 1980-05-29 | 1980-05-29 | Manufacture of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS56167335A (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6012754A (en) * | 1983-07-01 | 1985-01-23 | Matsushita Electric Ind Co Ltd | Manufacturing method of semiconductor device |
JPS60136218A (en) * | 1983-12-23 | 1985-07-19 | Nec Corp | Semiconductor device and manufacture thereof |
JPS61174197A (en) * | 1985-01-25 | 1986-08-05 | Toshiba Ceramics Co Ltd | Production of epitaxial wafer |
JPH0350737A (en) * | 1989-07-18 | 1991-03-05 | Nec Corp | Manufacture of semiconductor device |
JPH06209098A (en) * | 1993-08-30 | 1994-07-26 | Canon Inc | Photoelectric conversion device and its manufacture |
-
1980
- 1980-05-29 JP JP7175380A patent/JPS56167335A/en active Granted
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6012754A (en) * | 1983-07-01 | 1985-01-23 | Matsushita Electric Ind Co Ltd | Manufacturing method of semiconductor device |
JPS60136218A (en) * | 1983-12-23 | 1985-07-19 | Nec Corp | Semiconductor device and manufacture thereof |
JPS61174197A (en) * | 1985-01-25 | 1986-08-05 | Toshiba Ceramics Co Ltd | Production of epitaxial wafer |
JPH0350737A (en) * | 1989-07-18 | 1991-03-05 | Nec Corp | Manufacture of semiconductor device |
JPH06209098A (en) * | 1993-08-30 | 1994-07-26 | Canon Inc | Photoelectric conversion device and its manufacture |
Also Published As
Publication number | Publication date |
---|---|
JPS6326541B2 (en) | 1988-05-30 |
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