[go: up one dir, main page]

JPS56167335A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS56167335A
JPS56167335A JP7175380A JP7175380A JPS56167335A JP S56167335 A JPS56167335 A JP S56167335A JP 7175380 A JP7175380 A JP 7175380A JP 7175380 A JP7175380 A JP 7175380A JP S56167335 A JPS56167335 A JP S56167335A
Authority
JP
Japan
Prior art keywords
prevent
internal defect
substrate
defect
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP7175380A
Other languages
Japanese (ja)
Other versions
JPS6326541B2 (en
Inventor
Hideki Tsuya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP7175380A priority Critical patent/JPS56167335A/en
Publication of JPS56167335A publication Critical patent/JPS56167335A/en
Publication of JPS6326541B2 publication Critical patent/JPS6326541B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Bipolar Transistors (AREA)

Abstract

PURPOSE:To prevent decrease in internal defect density and also prevent occurrence of fine defect on an epitaxially grown layer, in a process of manufacturing of a bipolar device, by forming an embedded layer in a substrate crystal and providing it with 2-step heat-treatment process. CONSTITUTION:On a substrate on which a bipolar device is prepared, a hole is provided on an oxide coating 3 and an embedded layer 4 is formed in nitrogen atmosphere containing oxygen. And then, this substrate is provided with heat treatment at a temperature between 650 deg.C and 1,100 deg.C in dry oxygen, and an internal defect producing nucleus 7 is formed. And then, it is again heat-treated at a high temperature between 1,100 deg.C and 1,200 deg.C in wet-type or dry-type oxygen or inert gas, and the nucleus 7 is made to grow to a swirl-like internal defect. After the oxide coating 3 was removed, an epitaxial layer 5 is made to grow. As it is possible, by doing so, to prevent diminishing of internal defect which contributes to intrinsic gettering effect, it is possible to prevent the epitaxial layer 5 from occurrence of fine defect and to improve production recovery of the device.
JP7175380A 1980-05-29 1980-05-29 Manufacture of semiconductor device Granted JPS56167335A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7175380A JPS56167335A (en) 1980-05-29 1980-05-29 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7175380A JPS56167335A (en) 1980-05-29 1980-05-29 Manufacture of semiconductor device

Publications (2)

Publication Number Publication Date
JPS56167335A true JPS56167335A (en) 1981-12-23
JPS6326541B2 JPS6326541B2 (en) 1988-05-30

Family

ID=13469601

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7175380A Granted JPS56167335A (en) 1980-05-29 1980-05-29 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS56167335A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6012754A (en) * 1983-07-01 1985-01-23 Matsushita Electric Ind Co Ltd Manufacturing method of semiconductor device
JPS60136218A (en) * 1983-12-23 1985-07-19 Nec Corp Semiconductor device and manufacture thereof
JPS61174197A (en) * 1985-01-25 1986-08-05 Toshiba Ceramics Co Ltd Production of epitaxial wafer
JPH0350737A (en) * 1989-07-18 1991-03-05 Nec Corp Manufacture of semiconductor device
JPH06209098A (en) * 1993-08-30 1994-07-26 Canon Inc Photoelectric conversion device and its manufacture

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6012754A (en) * 1983-07-01 1985-01-23 Matsushita Electric Ind Co Ltd Manufacturing method of semiconductor device
JPS60136218A (en) * 1983-12-23 1985-07-19 Nec Corp Semiconductor device and manufacture thereof
JPS61174197A (en) * 1985-01-25 1986-08-05 Toshiba Ceramics Co Ltd Production of epitaxial wafer
JPH0350737A (en) * 1989-07-18 1991-03-05 Nec Corp Manufacture of semiconductor device
JPH06209098A (en) * 1993-08-30 1994-07-26 Canon Inc Photoelectric conversion device and its manufacture

Also Published As

Publication number Publication date
JPS6326541B2 (en) 1988-05-30

Similar Documents

Publication Publication Date Title
US4314595A (en) Method of forming nondefective zone in silicon single crystal wafer by two stage-heat treatment
US4401506A (en) Process for producing semiconductor device
JPS56167335A (en) Manufacture of semiconductor device
JPS59124136A (en) Process of semiconductor wafer
JPS59202640A (en) Treatment for semiconductor wafer
JPS5717125A (en) Manufacture of semiconductor device
US3098774A (en) Process for producing single crystal silicon surface layers
JPS5671928A (en) Treatment for silicon substrate
JPS571226A (en) Manufacture of semiconductor substrate with buried diffusion layer
JPS639745B2 (en)
JPH04237134A (en) Manufacture of epitaxial wafer
JPH04175300A (en) Heat treatment of silicon single crystal
JPS6012775B2 (en) Method for forming a single crystal semiconductor layer on a foreign substrate
JPS58138034A (en) Manufacture of semiconductor device
JPS60198735A (en) Manufacture of semiconductor device
JP2747823B2 (en) Method for producing gallium arsenide layer and method for producing gallium arsenide / aluminum gallium arsenide laminate
JPS5633840A (en) Manufacture of semiconductor device
JPS60176241A (en) Manufacture of semiconductor substrate
JPS62166531A (en) Manufacture of epitaxial wafer
JPS5671929A (en) Treatment for silicon substrate
JPH04342498A (en) Production of inp single crystal and production of semiconductor device
JPS5567131A (en) Method for manufacturing semiconductor device
JPS5730364A (en) Manufacture of semiconductor device
JPS5667922A (en) Preparation method of semiconductor system
JPS58199537A (en) Manufacture of high resistance semiconductor layer