JPS56124962A - Multiprocessor system - Google Patents
Multiprocessor systemInfo
- Publication number
- JPS56124962A JPS56124962A JP2851380A JP2851380A JPS56124962A JP S56124962 A JPS56124962 A JP S56124962A JP 2851380 A JP2851380 A JP 2851380A JP 2851380 A JP2851380 A JP 2851380A JP S56124962 A JPS56124962 A JP S56124962A
- Authority
- JP
- Japan
- Prior art keywords
- processor
- common bus
- bus
- processors
- data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4004—Coupling between buses
- G06F13/4022—Coupling between buses using switching circuits, e.g. switching matrix, connection or expansion network
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Mathematical Physics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Multi Processors (AREA)
- Exchange Systems With Centralized Control (AREA)
- Hardware Redundancy (AREA)
Abstract
PURPOSE:To simplify the hardwave logic of a common bus interface equipment, by connecting plural processors by a data system common bus and a control system common bus. CONSTITUTION:A data system common bus A is used for the data communication between processors, and a control system common bus is used for periodically supervising the status of each processor by the processor 1A. In case when it has become impossible to communicate a data due to a fault in the bus A, each processor is made to prepare for switching the system by use of the bus C. Each processor is made to prepare for switching the system by means of interruption as hardware by the control information of the bus. After the processor 1A has been switched to 1B by itself, the processor 1B sends out the control information to the processors 2B-nB from the control system common bus D connected to said processor 1B, and starts them by means of interruption as hardware. As a result, the system is continuously operated by a new system (processors 1B-nB).
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2851380A JPS56124962A (en) | 1980-03-06 | 1980-03-06 | Multiprocessor system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2851380A JPS56124962A (en) | 1980-03-06 | 1980-03-06 | Multiprocessor system |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS56124962A true JPS56124962A (en) | 1981-09-30 |
JPS6113627B2 JPS6113627B2 (en) | 1986-04-14 |
Family
ID=12250758
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2851380A Granted JPS56124962A (en) | 1980-03-06 | 1980-03-06 | Multiprocessor system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS56124962A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5858629A (en) * | 1981-10-05 | 1983-04-07 | Nec Corp | Bus switching system |
JPH03252747A (en) * | 1990-03-01 | 1991-11-12 | Fujitsu Ltd | Optical parallel data transfer system |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0317011U (en) * | 1989-06-30 | 1991-02-20 |
-
1980
- 1980-03-06 JP JP2851380A patent/JPS56124962A/en active Granted
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5858629A (en) * | 1981-10-05 | 1983-04-07 | Nec Corp | Bus switching system |
JPH03252747A (en) * | 1990-03-01 | 1991-11-12 | Fujitsu Ltd | Optical parallel data transfer system |
Also Published As
Publication number | Publication date |
---|---|
JPS6113627B2 (en) | 1986-04-14 |
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