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JPS5553446A - Container of electronic component - Google Patents

Container of electronic component

Info

Publication number
JPS5553446A
JPS5553446A JP12708278A JP12708278A JPS5553446A JP S5553446 A JPS5553446 A JP S5553446A JP 12708278 A JP12708278 A JP 12708278A JP 12708278 A JP12708278 A JP 12708278A JP S5553446 A JPS5553446 A JP S5553446A
Authority
JP
Japan
Prior art keywords
pads
conductive layer
solder
mechanical strength
container
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP12708278A
Other languages
Japanese (ja)
Other versions
JPS5832785B2 (en
Inventor
Kunihiko Hayashi
Takehisa Tsujimura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP12708278A priority Critical patent/JPS5832785B2/en
Publication of JPS5553446A publication Critical patent/JPS5553446A/en
Publication of JPS5832785B2 publication Critical patent/JPS5832785B2/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA

Landscapes

  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

PURPOSE:To improve the thermal radiation and mechanical strength of a chip carrier by providing the plural number of soldered pads for improving thermal radiation and mechanical strength aligning them at uniform height between pads for signal terminals arranged on the under surface of a container for containing semiconductor elements. CONSTITUTION:A concaved portion on which an IC element 11 is fitted is provided on the central portion of the surface of a container body 12, and a conductive layer 14 is placed on the surface of the body 12 surrounding the concaved portion. The conductive layer is connected to a pad 16 for a signal terminal on the under surface through a perforated hole. Next the IC element 11 fitted on the concaved portion on the body 12, then its electrode is connected to the conductive layer 14, using connecting wire 13. On the face of the pad 16, solder 17 is attached for connecting it to an exterior circuit. In this construction, the plural number of pads which do not function as signal terminals, but is used to improve radiation and mechanical strength are provided by locating each of pads between the pads on the under surface of the body 12. In addition, it is so arranged that the solder placed on this location has the same height as that of the solder 17 above.
JP12708278A 1978-10-16 1978-10-16 electronic parts container Expired JPS5832785B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12708278A JPS5832785B2 (en) 1978-10-16 1978-10-16 electronic parts container

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12708278A JPS5832785B2 (en) 1978-10-16 1978-10-16 electronic parts container

Publications (2)

Publication Number Publication Date
JPS5553446A true JPS5553446A (en) 1980-04-18
JPS5832785B2 JPS5832785B2 (en) 1983-07-15

Family

ID=14951120

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12708278A Expired JPS5832785B2 (en) 1978-10-16 1978-10-16 electronic parts container

Country Status (1)

Country Link
JP (1) JPS5832785B2 (en)

Cited By (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5778652U (en) * 1980-10-30 1982-05-15
JPS57197840A (en) * 1981-05-29 1982-12-04 Nec Corp Chip carrier case
JPS5839049U (en) * 1981-09-08 1983-03-14 富士通株式会社 Chippukiyariya
JPS5954247A (en) * 1982-09-21 1984-03-29 Nec Corp Electronic component parts
JPS60224235A (en) * 1984-04-20 1985-11-08 Fujitsu Ltd semiconductor equipment
JPS61292332A (en) * 1985-06-19 1986-12-23 Sumitomo Electric Ind Ltd Semiconductor chip carrier
JPS62166640U (en) * 1987-03-26 1987-10-22
JPS62264647A (en) * 1985-11-22 1987-11-17 テキサス　インスツルメンツ　インコーポレイテツド Integrated circuit board employing chip carrier and manufacture of the same
US4899210A (en) * 1988-01-20 1990-02-06 Wakefield Engineering, Inc. Heat sink
US5285352A (en) * 1992-07-15 1994-02-08 Motorola, Inc. Pad array semiconductor device with thermal conductor and process for making the same
US5506755A (en) * 1992-03-11 1996-04-09 Kabushiki Kaisha Toshiba Multi-layer substrate
JP2007042848A (en) * 2005-08-03 2007-02-15 Kyocera Corp Wiring board, electric element device and compound board
JP2010171114A (en) * 2009-01-21 2010-08-05 Renesas Technology Corp Semiconductor device
WO2010097835A1 (en) * 2009-02-26 2010-09-02 富士通テレコムネットワークス株式会社 Printed board and electronic device provided with printed board

Cited By (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5778652U (en) * 1980-10-30 1982-05-15
JPS57197840A (en) * 1981-05-29 1982-12-04 Nec Corp Chip carrier case
JPS5839049U (en) * 1981-09-08 1983-03-14 富士通株式会社 Chippukiyariya
JPS5954247A (en) * 1982-09-21 1984-03-29 Nec Corp Electronic component parts
JPH032348B2 (en) * 1984-04-20 1991-01-14 Fujitsu Ltd
JPS60224235A (en) * 1984-04-20 1985-11-08 Fujitsu Ltd semiconductor equipment
JPS61292332A (en) * 1985-06-19 1986-12-23 Sumitomo Electric Ind Ltd Semiconductor chip carrier
JPS62264647A (en) * 1985-11-22 1987-11-17 テキサス　インスツルメンツ　インコーポレイテツド Integrated circuit board employing chip carrier and manufacture of the same
JPS62166640U (en) * 1987-03-26 1987-10-22
US4899210A (en) * 1988-01-20 1990-02-06 Wakefield Engineering, Inc. Heat sink
US5506755A (en) * 1992-03-11 1996-04-09 Kabushiki Kaisha Toshiba Multi-layer substrate
US5285352A (en) * 1992-07-15 1994-02-08 Motorola, Inc. Pad array semiconductor device with thermal conductor and process for making the same
JP2007042848A (en) * 2005-08-03 2007-02-15 Kyocera Corp Wiring board, electric element device and compound board
JP4667154B2 (en) * 2005-08-03 2011-04-06 京セラ株式会社 Wiring board, electrical element device and composite board
JP2010171114A (en) * 2009-01-21 2010-08-05 Renesas Technology Corp Semiconductor device
WO2010097835A1 (en) * 2009-02-26 2010-09-02 富士通テレコムネットワークス株式会社 Printed board and electronic device provided with printed board

Also Published As

Publication number Publication date
JPS5832785B2 (en) 1983-07-15

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