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JPS5538679A - Memory unit - Google Patents

Memory unit

Info

Publication number
JPS5538679A
JPS5538679A JP11249778A JP11249778A JPS5538679A JP S5538679 A JPS5538679 A JP S5538679A JP 11249778 A JP11249778 A JP 11249778A JP 11249778 A JP11249778 A JP 11249778A JP S5538679 A JPS5538679 A JP S5538679A
Authority
JP
Japan
Prior art keywords
address
defective
memory element
substitute
defective area
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11249778A
Other languages
Japanese (ja)
Inventor
Moriyuki Takamura
Shohei Ikehara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP11249778A priority Critical patent/JPS5538679A/en
Publication of JPS5538679A publication Critical patent/JPS5538679A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70Masking faults in memories by using spares or by reconfiguring
    • G11C29/76Masking faults in memories by using spares or by reconfiguring using address translation or modifications

Landscapes

  • Techniques For Improving Reliability Of Storages (AREA)

Abstract

PURPOSE:To redress and use a memory element with a defective area by addressing a substitute element by setting an address bit, which discriminate the defective area in the memory element from perfect areas, to a fixed value. CONSTITUTION:To address memory element array 16 with defective areas such as defective memory elements 1800-1830, etc., on printed-circuit substrates 170 and 171, control signal CONT of address switching circuit 19 is inverted into logic ''1'' to control the switching operations of AND gates 20i...2016, and 21i...2117, etc., and part of address bits of address register 1 is switched to obtain an address signal for a substitute element with defective elements 1800-1830 discriminated, thereby attainig access to the substitute element for array 16 through decoder 2. Therefore, a memory element with a partial defective area can be redressed and used without being destructed.
JP11249778A 1978-09-13 1978-09-13 Memory unit Pending JPS5538679A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11249778A JPS5538679A (en) 1978-09-13 1978-09-13 Memory unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11249778A JPS5538679A (en) 1978-09-13 1978-09-13 Memory unit

Publications (1)

Publication Number Publication Date
JPS5538679A true JPS5538679A (en) 1980-03-18

Family

ID=14588122

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11249778A Pending JPS5538679A (en) 1978-09-13 1978-09-13 Memory unit

Country Status (1)

Country Link
JP (1) JPS5538679A (en)

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