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JPS5536974A - Resin sealed type semiconductor device - Google Patents

Resin sealed type semiconductor device

Info

Publication number
JPS5536974A
JPS5536974A JP11015178A JP11015178A JPS5536974A JP S5536974 A JPS5536974 A JP S5536974A JP 11015178 A JP11015178 A JP 11015178A JP 11015178 A JP11015178 A JP 11015178A JP S5536974 A JPS5536974 A JP S5536974A
Authority
JP
Japan
Prior art keywords
resin
lead
glass layer
semiconductor device
type semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11015178A
Other languages
Japanese (ja)
Inventor
Shigeru Tanaka
Norio Koutou
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Priority to JP11015178A priority Critical patent/JPS5536974A/en
Publication of JPS5536974A publication Critical patent/JPS5536974A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE: To improve adhesive connection between resin and lead, and wet-proof property by providing a glass layer on resin sealing surface of a lead for taking out, of which one end is positioned adjacent to resin sealed semiconductor element and other end is exposed outwardly.
CONSTITUTION: One end of a lead 1 for taking out is positioned in adjacent to both ends of a semiconductor element 2 to be sealed and the element 2 and the lead 1 are connected by narrow metal wire 3. Then the part exposed outwardly from the lead 1 is folded and molded as envelopping the part to be resin sealed, the element 2 and the wire 3 with resin 4. At this time, a glass layer 7 is disposed on the part 5 which is buried in the resin 4 of the lead 1 and the part 6 which is to be left without sealing and positioned near to the outerside. Thus, the glass layer 7 has function as primer and adhesive ability between the lead 1 and the resin 4 is increased.
COPYRIGHT: (C)1980,JPO&Japio
JP11015178A 1978-09-06 1978-09-06 Resin sealed type semiconductor device Pending JPS5536974A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11015178A JPS5536974A (en) 1978-09-06 1978-09-06 Resin sealed type semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11015178A JPS5536974A (en) 1978-09-06 1978-09-06 Resin sealed type semiconductor device

Publications (1)

Publication Number Publication Date
JPS5536974A true JPS5536974A (en) 1980-03-14

Family

ID=14528336

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11015178A Pending JPS5536974A (en) 1978-09-06 1978-09-06 Resin sealed type semiconductor device

Country Status (1)

Country Link
JP (1) JPS5536974A (en)

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