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JPS55153450A - Control system for line polarity - Google Patents

Control system for line polarity

Info

Publication number
JPS55153450A
JPS55153450A JP4742679A JP4742679A JPS55153450A JP S55153450 A JPS55153450 A JP S55153450A JP 4742679 A JP4742679 A JP 4742679A JP 4742679 A JP4742679 A JP 4742679A JP S55153450 A JPS55153450 A JP S55153450A
Authority
JP
Japan
Prior art keywords
circuit
polarity
character
transmission
designated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4742679A
Other languages
Japanese (ja)
Other versions
JPS5831785B2 (en
Inventor
Hitoshi Toyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP54047426A priority Critical patent/JPS5831785B2/en
Publication of JPS55153450A publication Critical patent/JPS55153450A/en
Publication of JPS5831785B2 publication Critical patent/JPS5831785B2/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4221—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus
    • G06F13/4226—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus with asynchronous protocol

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Communication Control (AREA)

Abstract

PURPOSE:To enable to hold the line polarity at the same polarity for the time designated, by providing the delay circuit between the character transmission circuit and the control circuit. CONSTITUTION:The delay circuit 2 is provided between the character transmission circuit 1 and the control circuit 3. When the holding of polarity for a given time is required for the circuit 3 after transmission of character, the transmission character is transferred on the transmission data tranfer line 5, the line polarity after character transmission is designated with the holding polarity indicating signal line 4 and the delay time to the circuit 2 is designated with the delay time set signal line 6, allowing the circuit 1 to be held to the designated polarity after character transmission. Further, the circuit 2 delays the processing request signal from the circuit 1 in the designated time with the circuit 3 and transfers it to the circuit 3. Since the circuit 3 processes the processing request signal trasferred with a delay like this for the next character signal immediately, the polarity hold for a given time after character transmission can be made.
JP54047426A 1979-04-18 1979-04-18 Line polarity control method Expired JPS5831785B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP54047426A JPS5831785B2 (en) 1979-04-18 1979-04-18 Line polarity control method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP54047426A JPS5831785B2 (en) 1979-04-18 1979-04-18 Line polarity control method

Publications (2)

Publication Number Publication Date
JPS55153450A true JPS55153450A (en) 1980-11-29
JPS5831785B2 JPS5831785B2 (en) 1983-07-08

Family

ID=12774823

Family Applications (1)

Application Number Title Priority Date Filing Date
JP54047426A Expired JPS5831785B2 (en) 1979-04-18 1979-04-18 Line polarity control method

Country Status (1)

Country Link
JP (1) JPS5831785B2 (en)

Also Published As

Publication number Publication date
JPS5831785B2 (en) 1983-07-08

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