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JPS5458386A - Mos semiconductor device - Google Patents

Mos semiconductor device

Info

Publication number
JPS5458386A
JPS5458386A JP12450077A JP12450077A JPS5458386A JP S5458386 A JPS5458386 A JP S5458386A JP 12450077 A JP12450077 A JP 12450077A JP 12450077 A JP12450077 A JP 12450077A JP S5458386 A JPS5458386 A JP S5458386A
Authority
JP
Japan
Prior art keywords
gate
region
layer
oxide film
diffusion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12450077A
Other languages
Japanese (ja)
Inventor
Kenjiro Yasunari
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP12450077A priority Critical patent/JPS5458386A/en
Publication of JPS5458386A publication Critical patent/JPS5458386A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]

Landscapes

  • Semiconductor Memories (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To establish the device satisfying the opposing performance of high integration but high speed, by forming the device so that the first MOS element group on the same substrate is thick in the gate oxide film than the second group and the diffusion depth of the source and drain is deep. CONSTITUTION:The p<-> Si substrate is oxidized 2 selectively and the regions I and II are covered with the gate oxide film 3 slightly thick, and the poly Si gate is selectively formed on the region I. Next, the oxide film of the region II is removed and the oxide thin film 8 is newly formed, then the layer 6 is grown up to the n<+> layer 9. Phosphorus ions are implanted to the region I only, forming the conductive gate 7. Next, the oxide films are all removed after providing the poly Si gate 10, and the n layer 11 is made with phosphorus diffusion and the conductive gate 12 is formed, enabling to produce deeper diffusion for the layer 9. Thus, the gate dielectric strength and junction dielectric strength are increased for the region I, and this is used for the part requiring high breakdown voltage. Further, the channel length of the region II is shortened, realizing high circuit integration and high speed altogether.
JP12450077A 1977-10-19 1977-10-19 Mos semiconductor device Pending JPS5458386A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12450077A JPS5458386A (en) 1977-10-19 1977-10-19 Mos semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12450077A JPS5458386A (en) 1977-10-19 1977-10-19 Mos semiconductor device

Publications (1)

Publication Number Publication Date
JPS5458386A true JPS5458386A (en) 1979-05-11

Family

ID=14887018

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12450077A Pending JPS5458386A (en) 1977-10-19 1977-10-19 Mos semiconductor device

Country Status (1)

Country Link
JP (1) JPS5458386A (en)

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5671975A (en) * 1979-11-16 1981-06-15 Matsushita Electric Ind Co Ltd Mos type semiconductor system
JPS57172761A (en) * 1981-04-17 1982-10-23 Hitachi Ltd Semiconductor integrated circuit
JPS59121976A (en) * 1982-12-28 1984-07-14 Fujitsu Ltd semiconductor equipment
JPS60181054U (en) * 1985-04-18 1985-12-02 富士通株式会社 semiconductor storage device
JPS6489457A (en) * 1987-09-30 1989-04-03 Toshiba Corp Manufacture of semiconductor device
JPH02236899A (en) * 1990-02-23 1990-09-19 Hitachi Ltd Semiconductor integrated circuit
JPH02236895A (en) * 1990-02-23 1990-09-19 Hitachi Ltd semiconductor integrated circuit
US5032530A (en) * 1989-10-27 1991-07-16 Micron Technology, Inc. Split-polysilicon CMOS process incorporating unmasked punchthrough and source/drain implants
JPH08250601A (en) * 1996-03-21 1996-09-27 Hitachi Ltd Semiconductor integrated circuit device and manufacturing method thereof
US6066881A (en) * 1998-01-29 2000-05-23 Mitsubishi Denki Kabushiki Kaisha Integrated circuit having a memory cell transistor with a gate oxide layer which is thicker than the gate oxide layer of a peripheral circuit transistor

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5671975A (en) * 1979-11-16 1981-06-15 Matsushita Electric Ind Co Ltd Mos type semiconductor system
JPH0248998B2 (en) * 1981-04-17 1990-10-26 Hitachi Ltd
JPS57172761A (en) * 1981-04-17 1982-10-23 Hitachi Ltd Semiconductor integrated circuit
JPS59121976A (en) * 1982-12-28 1984-07-14 Fujitsu Ltd semiconductor equipment
JPS60181054U (en) * 1985-04-18 1985-12-02 富士通株式会社 semiconductor storage device
JPS6489457A (en) * 1987-09-30 1989-04-03 Toshiba Corp Manufacture of semiconductor device
US5032530A (en) * 1989-10-27 1991-07-16 Micron Technology, Inc. Split-polysilicon CMOS process incorporating unmasked punchthrough and source/drain implants
JPH02236895A (en) * 1990-02-23 1990-09-19 Hitachi Ltd semiconductor integrated circuit
JPH02236899A (en) * 1990-02-23 1990-09-19 Hitachi Ltd Semiconductor integrated circuit
JPH0559518B2 (en) * 1990-02-23 1993-08-31 Hitachi Ltd
JPH08250601A (en) * 1996-03-21 1996-09-27 Hitachi Ltd Semiconductor integrated circuit device and manufacturing method thereof
US6066881A (en) * 1998-01-29 2000-05-23 Mitsubishi Denki Kabushiki Kaisha Integrated circuit having a memory cell transistor with a gate oxide layer which is thicker than the gate oxide layer of a peripheral circuit transistor
US6762084B2 (en) 1998-01-29 2004-07-13 Renesas Technology Corp. Integrated circuit having a memory cell transistor with a gate oxide layer which is thicker than the gate oxide layer of a peripheral circuit transistor

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