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JPS5448175A - Measuring method for forward transmission admittance of field effect transistor - Google Patents

Measuring method for forward transmission admittance of field effect transistor

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Publication number
JPS5448175A
JPS5448175A JP11459177A JP11459177A JPS5448175A JP S5448175 A JPS5448175 A JP S5448175A JP 11459177 A JP11459177 A JP 11459177A JP 11459177 A JP11459177 A JP 11459177A JP S5448175 A JPS5448175 A JP S5448175A
Authority
JP
Japan
Prior art keywords
fet
measurement
vgs
measuring method
voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11459177A
Other languages
Japanese (ja)
Inventor
Koji Nakamura
Hidenari Umezawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP11459177A priority Critical patent/JPS5448175A/en
Publication of JPS5448175A publication Critical patent/JPS5448175A/en
Pending legal-status Critical Current

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  • Testing Of Individual Semiconductor Devices (AREA)

Abstract

PURPOSE: To realize a measuring method for the forward admittance of FET, featuring reduced power consumption and a short measurement time.
CONSTITUTION: The necessary current value ID1 flowing to FET is subscribed, and the measurement is given to gate-source voltage VGS1 obtained based on value VD1. Then variation ΔVGS (for example 1V) of the voltage predetermined is subtracted from voltage VGS1; this voltage (VGS1-VGS) is applied to FET; current ID2 obtained then is measured. Based on these readings, an and operation is carried out to satisfy the equation GM=(ID1-ID2)/ΔVGS, and the forward transmission admittance is measured for FET. As a result, the measurement time can be shorten ed since the switch is kept on for a little moment by the pulse for measurement, and the self heat generation can be avoided for FET since the current is flown for a little moment. Furthermore, the AC signals and their process circuit are not needed within the measurement circuit because the process is performed only with the DC signals
COPYRIGHT: (C)1979,JPO&Japio
JP11459177A 1977-09-26 1977-09-26 Measuring method for forward transmission admittance of field effect transistor Pending JPS5448175A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11459177A JPS5448175A (en) 1977-09-26 1977-09-26 Measuring method for forward transmission admittance of field effect transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11459177A JPS5448175A (en) 1977-09-26 1977-09-26 Measuring method for forward transmission admittance of field effect transistor

Publications (1)

Publication Number Publication Date
JPS5448175A true JPS5448175A (en) 1979-04-16

Family

ID=14641682

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11459177A Pending JPS5448175A (en) 1977-09-26 1977-09-26 Measuring method for forward transmission admittance of field effect transistor

Country Status (1)

Country Link
JP (1) JPS5448175A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5875073A (en) * 1981-10-29 1983-05-06 Yokogawa Hewlett Packard Ltd Dc characteristic measuring system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5875073A (en) * 1981-10-29 1983-05-06 Yokogawa Hewlett Packard Ltd Dc characteristic measuring system

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