JPH11312754A5 - - Google Patents
Info
- Publication number
- JPH11312754A5 JPH11312754A5 JP1998118742A JP11874298A JPH11312754A5 JP H11312754 A5 JPH11312754 A5 JP H11312754A5 JP 1998118742 A JP1998118742 A JP 1998118742A JP 11874298 A JP11874298 A JP 11874298A JP H11312754 A5 JPH11312754 A5 JP H11312754A5
- Authority
- JP
- Japan
- Prior art keywords
- base member
- wafer
- groove
- resin layer
- sealing resin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Claims (2)
表面に溝を有し、前記表面に前記チップを搭載するベース部材と、
前記チップ及び前記溝内をモールドした封止樹脂層と、
前記ボンディングパッドに接合して形成され、前記封止樹脂層の表面に露出させたバンプと、
を備えたことを特徴とする半導体パッケージ。 a semiconductor chip having a plurality of bonding pads;
a base member having a groove on a surface thereof, the base member having the chip mounted on the surface thereof;
a sealing resin layer that molds the chip and the inside of the groove;
a bump formed in contact with the bonding pad and exposed on the surface of the sealing resin layer;
A semiconductor package comprising:
前記ベース部材にウェハ処理を終えたウェハを搭載する工程と、
前記ウェハのボンディングパッドに接合するバンプを形成する工程と、
前記ベース部材上で前記ウェハを切断してチップ分割する工程と、
前記ウェハ及び前記溝内を封止樹脂層によりモールドする工程と、
前記封止樹脂層で覆われた前記ウェハをフルカッティングしてバッケージ分割する工程と、
を備えたことを特徴とする半導体パッケージの製造方法。 providing a base member having a groove on a surface thereof;
a step of mounting a processed wafer on the base member;
forming bumps to bond to the bonding pads of the wafer;
cutting the wafer on the base member to separate it into chips;
molding the wafer and the inside of the groove with a sealing resin layer;
a step of dividing the wafer covered with the sealing resin layer into packages by full cutting;
A method for manufacturing a semiconductor package, comprising:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11874298A JP4033969B2 (en) | 1998-04-28 | 1998-04-28 | Semiconductor package, manufacturing method thereof and wafer carrier |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11874298A JP4033969B2 (en) | 1998-04-28 | 1998-04-28 | Semiconductor package, manufacturing method thereof and wafer carrier |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JPH11312754A JPH11312754A (en) | 1999-11-09 |
| JPH11312754A5 true JPH11312754A5 (en) | 2005-09-22 |
| JP4033969B2 JP4033969B2 (en) | 2008-01-16 |
Family
ID=14743949
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11874298A Expired - Fee Related JP4033969B2 (en) | 1998-04-28 | 1998-04-28 | Semiconductor package, manufacturing method thereof and wafer carrier |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP4033969B2 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR101328552B1 (en) | 2007-11-16 | 2013-11-13 | 삼성전자주식회사 | Non-volatile memory devices and methdos of forming the same |
| TWI387076B (en) * | 2008-04-24 | 2013-02-21 | 相豐科技股份有限公司 | Package structure of integrated circuit component and manufacturing method thereof |
-
1998
- 1998-04-28 JP JP11874298A patent/JP4033969B2/en not_active Expired - Fee Related
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