JPH09306712A - Chip electronic component and manufacture thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enable mass production of chip electronic components by simplifying a manufacturing process thereof, and enable obtaining sufficient electric conduction simply by pressing the component in contact with an electrode layer on an end surface thereof. SOLUTION: A plurality of parallel slots are formed in a substrate, and electrode layers 3 are formed in the slots. After an electronic element layer 4 constituting an electronic element continuously on the surface of the substrate and surface parts op the electrode layers 3, the substrate is cut into individual chip electronic parts 1. Thus the electronic element layer 4 is formed on the surface of a base 2. The chip electronic part 1 is provided in which end parts of the electronic element layer 4 are electrically connected with the electrode layers 3 on surface parts 3a of the electrode layers 3 formed on both lateral sides of the base 2.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a chip electronic component that constitutes a surge absorber or other electronic element, and particularly, to form a thick electrode layer on the end face of a substrate to form another electrode connected to the electrode layer. The present invention relates to a chip electronic component capable of stabilizing electrical connection and a manufacturing method thereof.

[0002]

2. Description of the Related Art FIG. 10 is a sectional view showing a surge absorber as an example using a conventional chip electronic component, and FIGS. 11A to 11F show a method of manufacturing the surge absorber in the order of steps. FIG.

The surge absorber 10A shown in FIG.
Resistor layers 12a and 12b are formed as electronic element layers on the surface of the flat chip substrate 11, and a gap 13 having a minute gap G is formed between these resistor layers 12a and 12b.
Are formed. The resistor layer 1 is formed on both ends of the base 11.
Electrode layers 14a and 14b electrically connected to 2a and 12b, respectively, are provided. This electrode layer 14a,
14b is a resistor layer 12a, 12b on the surface of the base 11.
It is formed so as to come into contact with both ends of the base material and wrap around both end surfaces and the back surface side of the base 11. Also, this electrode layer 14a,
The main electrodes 15a and 15b are respectively surface-bonded to 14b by pressure contact. Lead wires 16a and 16b are connected to the main electrodes 15a and 15b. The base 11 and the main electrodes 15a and 15b are housed in the glass sealing body 17, and the lead wires 16a and 16b are connected to the glass sealing body 1.
7 is projected to the outside. The inside of the glass sealing body 17 is filled with an inert gas such as argon, neon, or helium at a predetermined internal pressure.

A surge absorber 10A having such a configuration
Has been conventionally manufactured as follows. First, FIG.
As shown in (a), a resistor layer 12A is formed on the entire surface of a substrate 11A having an area where a plurality of bases 11 can be taken. Then, as shown in FIG. 11 (b), an etching method is used to form a resistor layer. 12A is removed in a groove shape to form a gap forming portion 1
Form 3A. Next, the substrate 11A is vertically and horizontally cut at a cutting position indicated by a broken line 13B in FIG.
Divide by 1. Individual substrates 11 obtained by dividing are
As shown in FIG. 11C, the resistor layer 12a,
12b are formed in a state of being separated by a gap 13. The size of each base 11 is 1.2 mm × 2.
It is about 0 mm to 4.5 mm × 7.0 mm.

After that, the individual bases 11 are collectively fixed by a jig, and the plurality of bases 11 are collectively fixed as shown in FIG.
As shown in FIG. 1 (d), electrode layers 14a and 14b are formed on both end surfaces of the electrode layer 14 by sputtering. Next, FIG.
As shown in FIG. 1 (e), the lead wires 16a, 16b are formed on the electrode layers 14a, 14b on both sides of the cut individual base body 11, respectively.
The main electrodes 15a and 15b having the above are respectively pressure-bonded to each other, and further housed in the glass sealing body 17 as shown in FIG. 11 (f) to complete the surge absorber 10A.

As described above, the conventional surge absorber is
After the individual substrate 11 is divided from the substrate 11A, the electrode layers 14a, 14 are formed on the individual substrate 11 by sputtering.
b is formed. However, the work of collectively holding the base bodies 11 once separated from the substrate 11A into pieces with a jig is extremely inefficient, and for each base body 11 held with the jig, the electrode layer 14a is first formed on one end face. And then the jig and each substrate 11 are repositioned upside down, and then the electrode layer 14b needs to be sputtered on the other end face, which requires many steps for forming the electrode layers 14a and 14b. It was inefficient.

On the other hand, the inventors of the present invention have found that the electrode layers 14a and 14b are formed before the individual substrate 11 is divided from the substrate 11A.
We have proposed a method that enables the formation of
6979). FIG. 12 is an explanatory view showing the step of forming the electrode layers 14a and 14b in the proposed method by using a sectional view.

According to the method proposed by the present inventors, as shown in FIG. 12 (a), first, on a substrate 11A,
The resistor layers 12a and 1a are formed by using the sputtering method or the etching method.
2b is formed. Resistor layer 1 constituting one electronic element
A minute gap 13 is formed between 2a and 12b, and the resistor layers 12a and 12b of adjacent electronic elements are spaced from each other by a certain distance in the X direction in the figure. Then, a resist layer 18 is formed on the resistor layers 12a and 12b. The resist layer 18 is the resistor layer 1 that constitutes one electronic element.
Resistor layers 12a, 12 excluding both edges of 2a, 12b
b and the gap 13. Next, the first cutting groove 19 is formed in the portion between the resistor layers 12a and 12b of the adjacent electronic elements. Next, the electrode layer 14 is formed on the substrate 11A by sputtering, vapor deposition, plating or the like. This electrode layer 14 is a bottom surface (C) of the first cutting groove 19.
And the inner wall surfaces on both sides, the surfaces of the resistor layers 12a and 12b not covered with the resist layer 18, and the resist layer 18.

Thereafter, the second cutting groove 20 is formed on the back surface side of the substrate 11A. The width dimension W ₁ of the second cutting groove 20 in the X direction is made larger than the width dimension of the first cutting groove 19. Further, the second cutting groove 20 is formed at the same position as the first cutting groove 19 and is cut to a depth overlapping with the first cutting groove 19. By forming the second cutting groove 20 in this manner, the bottom surface (C) of the first cutting groove 19 is removed, and as a result, the substrate 11A is separated into a plurality of block bodies. This block body has an elongated strip shape.
Then, by removing the resist layer 18, as shown in FIG.
As shown in (b), electrode layers 14a and 14b extending from the edges of the resistor layers 12a and 12b to the end surface 11b of the base body are formed. Next, by cutting such a block body at regular intervals in the length direction, individual chip electronic components can be obtained. The chip electronic component thus obtained has a film thickness of 50 to 3 on both end faces of the base body 11 having a substantially T-shaped cross section.
Electrode layers 14a and 14b having a thickness of about 00 nm are formed, and the electrode layers 14a and 14b overlap the edges of the resistor layers 12a and 12b. Therefore, the surge absorber can be configured by pressing the main electrode having the lead wire to the electrode layers 14a, 14 on both end surfaces of the base 11.

According to the manufacturing method proposed by the present inventors, the individual bases 11 are separated from the substrate 11A after the electrode layers 14a and 14b are collectively formed.
The manufacturing process is simple and suitable for mass production. However, the base 11 has a substantially T-shaped cross section, and the electrode layers 14a, 1
Recesses are formed on the rear surface side of the base body 11 on both end surfaces where 4b is formed. Therefore, the electrode layers 14a and 14b
When the main electrodes are pressed against both end surfaces where the ridges are formed, both ends of the base body 11 are likely to be chipped or deformed, resulting in unstable conduction between the electrode layers 14a and 14b and the main electrodes. was there.

[0011]

SUMMARY OF THE INVENTION Therefore, an object of the present invention is to simplify the manufacturing process of chip electronic parts for mass production and to obtain sufficient conduction only by pressure contact with the electrode layer on the end face of the substrate. To be able to do so.

[0012]

In order to solve the above-mentioned problems, the invention according to claim 1 is such that an electronic element layer constituting an electronic element is formed on a surface of a substrate, and an end portion of the electronic element layer is the substrate. The chip electronic component is characterized in that it is electrically connected to the electrode layers formed on both sides of the electrode layer and on the surface portion of the electrode layer. The invention according to claim 2 is characterized in that the electronic element layer is composed of a plurality of resistor layers formed on the surface of the substrate with a minute gap therebetween.
It is the described chip electronic component.

According to a third aspect of the present invention, a long hole forming step of forming a plurality of parallel long holes in a substrate, an electrode layer forming step of forming an electrode layer in the long holes, and a surface of the substrate and An electronic element layer forming step of forming a continuous electronic element layer on the electrode layer surface portion, and a cutting step of cutting the substrate on which the electrode layer and the electronic element layer are formed to separate into individual chip electronic components. A method for manufacturing a chip electronic component, which comprises: The invention according to claim 4 is the method of manufacturing a chip electronic component according to claim 3, wherein conductive ink is imprinted in the elongated holes in the electrode layer forming step. The invention according to claim 5 is characterized in that, in the electrode layer forming step, after the electrode material film is formed by sputtering from the surface of the substrate to the inner wall of the long hole, the electrode material film on the substrate is removed. Item 3. A method of manufacturing a chip electronic component according to item 3. The invention according to claim 6 is the method for manufacturing a chip electronic component according to claim 5, wherein in the electrode layer forming step, the sputtering is performed with a plurality of substrates stacked.

[0014]

BEST MODE FOR CARRYING OUT THE INVENTION The present invention is described in detail below.
FIG. 1 is a perspective view showing a chip electronic component according to a first embodiment of the present invention. In the following embodiments, a chip electronic component suitable for use in a surge absorber will be described as an example.
FIG. 2 is a perspective view showing an example in which a surge absorber is configured using the chip electronic component of FIG. In the figure, reference numeral 1 indicates a chip electronic component, and the chip electronic component 1 comprises a substrate 2, two electrode layers 3, and an electronic element layer 4.

The substrate 2 is a Si (silicon) substrate,
A glass substrate, a sapphire substrate or the like is preferably used. Among these substrates, the Si substrate is particularly preferably used because it has excellent workability, but since it has high conductivity, a glass substrate or a sapphire substrate is preferably used when complete insulation is required. The glass substrate is preferable because it is relatively inexpensive, and among the glass substrates, a suitable grade such as a soda glass substrate and a quartz substrate is selected and used according to required characteristics such as heat resistance. Substrate 2
The thickness T depends on the application of the chip electronic component 1 and the like, but for example, a thickness T of about 0.4 to 1.0 mm can be preferably used.

The electrode layers 3 are formed on both end faces of the substrate 2, respectively. The electrode layer 3 is made of a conductive material formed by firing a conductive ink or a conductive material formed by sputtering, and is an appropriate material depending on the application of the chip electronic component 1 and the method of forming the electrode layer 3. Is selected and used. Assuming that the direction perpendicular to the end face of the substrate 2 is the X direction, the direction perpendicular to the end face and parallel to the surface 2a of the substrate 2 is the Y direction, and the direction perpendicular to these is the Z direction (the same applies hereinafter), X The thickness of the electrode layer 3 in the direction can be set thicker according to the usage conditions of the chip electronic component electronic component 1, and for example, 1 μm or more, preferably 2 μm or more for application to the surge absorber shown in FIG.
It is formed to a size of μm or more. If the thickness of the electrode layer 3 is less than 1 μm, when the electrode layer 3 is connected to another electrode, the base 2
If pressure is applied by a force in the X direction toward the center of the electrode, this force is likely to cause chipping or peeling of the electrode layer 3, resulting in poor conduction, which is not preferable.

In this embodiment, the surface 2a of the base 2 and the surface 3a of the electrode layers 3, 3 are formed flush with each other, and the surface 2a of the base 2 and the surface 3a of the electrode layers 3, 3 are formed. 3a
The electronic element layer 4 is formed thereon. The electronic element layer 4 is
Both ends thereof are formed so as to overlap the surface portions 3a, 3a of the electrode layers 3, 3, respectively, whereby the electronic element layer 4 and the electrode layers 3, 3 are electrically connected. In this embodiment, the electronic element layer 4 is composed of two resistor layers 4a and 4b which are spaced apart from each other in the X direction with a minute gap G therebetween.
The resistor layers 4a and 4b are made of DLC, amorphous carbon,
TaSiO _2, are made of high-resistance material deposited by CrSiO ₂ including sputtering, vapor deposition, or the like.

Next, the chip electronic component 1 of the first embodiment described above.
A first manufacturing example for manufacturing the above will be described with reference to FIGS. 3A and 3B show a long hole forming step. FIG. 3A is a perspective view of a substrate, and FIG. 3B is a sectional view taken along the line AA 'in FIG. 3A. First, the substrate 2A is prepared, and its surface 2
A long hole 21 penetrating from A ′ to the back surface is formed. Board 2A
As the substrate, a substrate (wafer) having a relatively large area is used, in which a plurality of bases 2 constituting the chip electronic component 1 can be taken. In this example, the disk-shaped substrate 2A is used,
The shape of the substrate 2A is not limited to this and may be any shape.

At least two elongated holes 21 are formed in parallel so that the distance D between adjacent elongated holes 21 matches the dimension of the base body 2 of each chip electronic component 1 in the X direction.
A processing method using a dicer, a processing method by etching, or the like can be used to form the long holes 21. In the case of etching, the etching liquid is appropriately selected depending on the material of the substrate 2A. For example, for a Si substrate, an alkaline etching liquid such as fluorinated nitric acid or KOH is preferably used, and for a glass substrate, fluorinated nitric acid or Iodine acid and the like are preferably used. The width W of the long hole 21 may be twice or more the thickness of the electrode layer 3 of the chip electronic component 1 in the X direction, but if it is too narrow, it becomes difficult to process the long hole 21 and work in subsequent steps, If it is too wide, the number of chip electronic components 1 obtained from one substrate 2A decreases, which is disadvantageous in terms of cost. Therefore, for example, when the thickness T of the substrate is 0.4 to 1.0 mm, the width W of the elongated hole 21 is preferably formed in the range of 2 to 5 mm.

In order to facilitate the division of the substrate 2A into individual chip electronic components 1 in the cutting step described later, the substrate 2
It is preferable that a plurality of linear slits 22 extending perpendicularly to the length direction of the long holes 21 are formed on the back surface of A as shown by the broken line in the figure. The distance between the adjacent slits 22 is formed so as to match the dimension of the chip electronic component 1 in the Y direction, and the depth of the slits 22 is generally set to about 1/3 of the thickness of the substrate 2A. preferable.

After the elongated hole 21 is formed in the substrate 2A in this manner, the electrode layer 3A is formed in the elongated hole 21. FIG. 4 is a sectional view showing an electrode layer forming step. In this manufacturing example, the electrode layer 3A is formed by the imprinting method. First, as shown in FIG. 4, after the conductive ink 24 is imprinted in the long hole 21 formed in the substrate 2A by an appropriate method such as screen printing, the conductive ink adhered on the surface 2A ′ of the substrate 2A. The ink 24 is scraped off using an appropriate scraping jig such as a hard rubber squeegee.

The conductive ink 24 used here basically comprises a powdery conductive material, a binder, and a solvent and is kneaded together. For example, gold, silver, copper,
Conductive materials such as lead and palladium, binders such as phenol resin and epoxy resin, metal paste using a solvent such as carbitol, conductive materials such as silver and lead, resins such as phenol resin and epoxy resin, and glass Cermet ink using a solvent such as carbitol mixed with a binder, or a conductive material such as carbon black or graphite, a binder such as phenol resin or epoxy resin, and carbon using a solvent such as carbitol Ink or the like can be preferably used. The composition of the conductive ink 24 depends on the conductive ink 24.
For the purpose of forming the ink, it is preferable that the amount of the conductive material is large, but if the amount of the conductive material is too much with respect to the binder, the paste-shaped conductive ink 24 cannot be obtained. Therefore,
It is preferable to set the amounts of the conductive material and the binder used so that an ink-like composition containing as much conductive material as possible is obtained. For example, in the case of carbon ink,
It is preferable that the content rate of the conductor material is about 20 to 40 vol%. If the viscosity of the conductive ink 24 is too high or too low, it is difficult to imprint it into the long holes 21, so it is preferable to add a solvent so that the viscosity becomes about 100 to 1000 csp.

Next, the conductive ink 24 imprinted in the long holes 21 is baked to form the electrode layer 3A. This firing can be performed using, for example, a belt-conveying infrared heating firing furnace. Although the firing conditions differ depending on the type of the conductive ink 24 used, it is necessary to perform the firing within a temperature range in which the substrate 2A does not melt. For example, when carbon ink is used, it is baked at about 200 ° C. for about 10 minutes, and when cermet ink is used, it is about 850 ° C.
It is preferable to carry out firing for about 10 to 20 minutes. Further, the above-mentioned scraping with a squeegee cannot completely remove the conductive ink 24 adhering to the substrate surface 2A ′, and a thin film of the conductive ink 24 remains on the substrate surface 2A ′ after firing. If so, the substrate surface 2 by buffing etc.
Polish A '.

After forming the electrode layer 3A in the long hole 21 of the substrate 2A in this manner, a large number of electronic element layers 4 are formed on the surface 2A 'of the substrate 2A by sputtering, vapor deposition or the like.
5A and 5B show an electronic element layer forming step, FIG. 5A is a perspective view, and FIG. 5B is a sectional view taken along the line BB ′ in FIG. As shown in FIGS. 5A and 5B, the electronic element layer 4 has two long holes 21 and 21 whose both ends in the direction (X direction) perpendicular to the length direction of the long hole 21 are adjacent to each other. Surface portions 3A ′, 3 of the two electrode layers 3A, 3A formed inside
A'is formed so as to overlap each other. At this time, the overlapping width of the electronic element layer 4 and the electrode layer 3A in the X direction is set to be smaller than 1/2 of the width W of the elongated hole 21. In addition, the chip electronic component 1 which is intended to obtain the planar shape of the electronic element layer 4
In this manufacturing example, the two resistor layers 4a and 4b are formed at a minute gap G so as to match the shape of the electronic element layer 4. Then, as shown in FIG. 5A, the electronic element layer 4 including the two resistor layers 4a and 4b is formed in the X direction,
A large number of substrates are formed at regular intervals in a direction parallel to the substrate surface 2A and perpendicular to the substrate surface 2A (Y direction). At this time, the electronic element layer 4 is formed such that the gap between the adjacent electronic element layers 4 in the Y direction is located on the slit 22.

After the electronic element layer 4 is formed in this way, the substrate 2A is cut. FIG. 6 is a perspective view showing a cutting process. First, as shown in FIG. 5B, the substrate 2A
At the cutting position P at the center of the long hole 21 in the width direction (X direction).
By cutting along the direction, a strip-shaped member as shown in FIG. 6 is obtained. This cutting can be performed using a dicer or the like. If necessary, the cut surface may be polished. Subsequently, the obtained strip-shaped member is attached to the slit 2 on the back surface of the substrate 2A.
By cutting at position 2, individual chip electronic components 1 as shown in FIG. 1 are obtained. The cutting at the position of the slit 22 can be performed, for example, by a method of gently pressing the surface on which the electronic element layer 4 is formed with a roller having a cushioning property so that the stress is concentrated on the slit 22. . The chip electronic component 1 obtained in this way has lead wires 36a,
The main electrodes 35a and 35b having 36b are brought into pressure contact with the electrode layers 3 and 3 on both sides of the base 2 to form a glass sealing body 37.
A surge absorber can be obtained by storing it inside.

According to this manufacturing example, the electrode layers 3 and 3 and the electronic element layer 4 are already formed on the substrate 2 when the substrate 2A is cut and separated into individual chip electronic components 1. The process is simple and suitable for mass production. Further, since the electrode layer 3 is formed by imprinting the conductive ink 24, the work can be performed in a normal atmosphere as compared with a film forming method performed in a vacuum chamber such as sputtering or vapor deposition, and thus the manufacturing cost is very high. It will be cheaper. In addition, the obtained chip electronic component 1 has a structure in which the electrode layers 3 and 3 are formed on both sides of the substrate 2 and the electronic element layer 4 is electrically connected on the surface portion 3a of the electrode layer 3. Even if the electrode layer 3 is thickly formed, there is no fear that the electrical connection between the electrode layer 3 and the electronic element layer 4 is deteriorated. Therefore, for example, as shown in FIG. When the electrodes 35a and 35b are pressed to form a surge absorber, sufficient electrical connection between the electrode layers 3 and 3 and the main electrodes 35a and 35b can be obtained only by pressing. Further, in the present manufacturing example, the surface 2A ′ of the substrate 2A and the surface portion 3A ′ of the electrode layer 3A are formed so as to be flush with each other. It is preferred to obtain a good electrical connection with the edges of layer 4.

Next, the chip electronic component 1 of the first embodiment described above.
A second manufacturing example for manufacturing the above will be described with reference to FIG. The electrode layer forming process is different between the second manufacturing example and the first manufacturing example. First, the substrate 2A is prepared in the same manner as in the first manufacturing example, the elongated holes 21 are formed, and then the elongated holes 21 are formed in the substrate 2A. And in this manufacturing example,
The electrode layer 3A is formed in the long hole 21 by using the sputtering method.

FIG. 7 is a sectional view showing an electrode layer forming process. First, as shown in FIG. 7A, bias sputtering is performed on the substrate 2A to form an electrode material film made of a conductive material such as copper (Cu) from the surface 2A ′ of the substrate 2A to the inner wall surface of the elongated hole 21. 25 is deposited. When the electrode material film 25 is formed, the bias voltage applied to the substrate 2A is preferably about −50 to −100 V, and is formed on the inner wall surface of the elongated hole 21 by appropriately setting the bias conditions. The thickness a of the electrode material film 25 and the surface 2 of the substrate 2A
Ratio a / of thickness b of electrode material film 25 formed on A ′
b can be increased to about 0.5. The sputtering conditions are preferably about 0.5 to 2 kw × 20 to 30 minutes. Further, the input power and the film forming time are appropriately changed depending on the film forming speed, and are set so that the electrode material film 25 having a thickness of 1 μm or more, preferably 1 to 5 μm is formed on the inner wall surface of the elongated hole 21. Is preferred. Subsequently, as shown in FIG. 7B, the substrate surface 2A 'is polished to scrape off the electrode material film 25 on the substrate 2A. Here, the electrode material film 2 on the substrate 2A
5 is an electrode material film 25 that is flush with the substrate surface 2A ′.
This includes the electrode material film 25 on the substrate surface 2A ′ and the electrode material film 25 on the electrode layer surface portion 3A ′ (hereinafter the same). Thereby, the electrode layer 3A is formed in the long hole 21. Further, the substrate surface 2A 'and the surface portion 3A' of the electrode layer 3A are flush with each other.

After forming the electrode layer 3A in the long hole 21 of the substrate 2A in this manner, the surface 2A 'of the substrate 2A and the surface portion 3A' of the electrode layer 3A are formed in the same manner as in the first manufacturing example. A large number of continuous electronic element layers 4 are formed thereon, and the substrate 2A is further cut to obtain individual chip electronic components 1 as shown in FIG.

As described above, the second manufacturing example is the substrate 2
After forming the elongated hole 21 in A and forming the electrode material film 25 from the substrate surface 2A ′ to the inner wall of the elongated hole 21, the electrode material film 25 on the substrate 2A is polished and removed to form the electrode layer 3A. Therefore, the substrate surface 2A ′ and the surface portion 3A ′ of the electrode layer 3A are formed flush with each other. Therefore, the continuous electronic element layer 4 is formed on the substrate surface 2A ′ and the surface portion 3A ′ of the electrode layer 3, and the substrate 2A is cut into individual chip electronic components 1 to obtain the structure shown in FIG. The electrode layers 3 and 3 are formed on both sides of the base 2,
The chip electronic component 1 in which the electronic element layer 4 and the electrode layer 3 are electrically connected on the surface portion 3a of the electrode layer 3 is obtained. Therefore, even if the electrode layer 3 is formed thick, the electrode layer 3
There is no fear that the electrical connection between the electronic element layer 4 and the electronic element layer 4 deteriorates. For example, as shown in FIG. 2, when the main electrodes 35a and 35b are pressed against the electrode layers 3 and 3 to form a surge absorber, Only by pressure contact, the electrode layers 3 and 3 and the main electrodes 35a and 3a
Sufficient conduction with 5b is obtained. Further, similarly to the first manufacturing example, when the substrate 2A is cut and separated into the individual chip electronic components 1, the electrode layers 3 and 3 and the electronic element layer 4 are already formed on the base body 2. The process is simple and suitable for mass production. Further, since the electrode layer 3 is formed by sputtering, it is possible to form a metal layer (electrode layer 3) that does not contain foreign matter such as a binder, and there is an advantage that resistance during conduction is extremely small.

In the second manufacturing example, the substrate surface 2
Although the method of polishing the electrode material film 25 on the substrate 2A after forming the electrode material film 25 from A ′ to the inner wall of the long hole 21 is used, the method shown in FIG. 8 can be used as another method. . That is, first, as shown in FIG. 8A, after forming a resist film 44 on the substrate surface 2A ′,
As shown in FIG. 8B, the long holes 2 are formed from above the resist film 44.
8 is formed by forming the electrode material film 25 on the inner wall of No. 1 and then peeling the resist film 44 with a peeling liquid.
As shown in (c), the electrode layer 3A can be formed on the inner wall of the long hole 21. Further, when part of the electrode layer 3A projects from the substrate surface 2A ′ when the resist film 44 is peeled off, the projecting part may be removed by polishing or the like, if necessary. According to this method, the work of polishing the electrode material film 25 on the substrate 2A is unnecessary, and therefore the manufacturing efficiency is good.

Next, the chip electronic component 1 of the first embodiment described above.
A third manufacturing example for manufacturing the above will be described with reference to FIG. The third manufacturing example is different from the second manufacturing example in that, when the conductive layer 25 is formed by bias sputtering, as shown in FIG. The point is that they are overlapped so that they match.
The greater the number of substrates 2A to be superposed, the better the manufacturing efficiency. However, if the number is too large, the film thickness of the electrode material film 25 formed on the inner wall of the elongated hole 21 will not be uniform for each substrate 2A. Therefore, the thickness of the substrate 2A, the shape (size) of the elongated hole 21, the sputtering conditions, etc. are preferably set so that a uniform electrode material film 25 can be obtained in the elongated hole 21.

After forming the electrode material film 25, the uppermost substrate 2A is formed in the same manner as in the second manufacturing example.
Polishing is performed to scrape off the electrode material film 25 on the substrate 2A to form the electrode layer 3A in the long hole 21. In addition, for the lower-layer substrate 2A other than this, the conductive layer 25 is the substrate 2A.
Since it is not formed on the upper side and is formed only on the inner wall of the long hole 21, it is not necessary to polish. As a result, the substrate 2A
The electrode layer 3A is formed in the long hole 21 of the
A plurality of substrates 2 in which A ′ and the surface portion 3A ′ of the electrode layer 3A are flush with each other are obtained.

After forming the electrode layer 3A in the long hole 21 of the substrate 2A in this manner, the surface 2A 'of the substrate 2A and the surface portion 3A' of the electrode layer 3A are formed in the same manner as in the first manufacturing example. A large number of continuous electronic element layers 4 are formed thereon, and the substrate 2A is further cut to obtain individual chip electronic components 1 as shown in FIG.

As described above, in this third manufacturing example, the long hole 2
Since the electrode material film 25 is formed by sputtering in a state where a plurality of substrates 2A on which the substrate 1 is formed are stacked, the electrode material film 25 can be simultaneously formed on the inner walls of the long holes 21 of the plurality of substrates 2A. . Further, after the electrode material film 25 is formed,
The substrate 2A may be polished only on the uppermost substrate 2A, and the manufacturing efficiency is good. Further, since the surface portion 3A 'of the electrode layer 3A thus formed is flush with the substrate surface 2A', it is continuous on the substrate surface 2A 'and on the surface portion 3A' of the electrode layer 3. To form the electronic element layer 4
By cutting the substrate 2A into individual chip electronic components 1, the electrode layers 3 and 3 are formed on both sides of the base 2 as shown in FIG. 1, and the surface portion 3a of the electrode layer 3 is formed.
A chip electronic component 1 is obtained in which the electronic element layer 4 and the electrode layer 3 are electrically connected to each other. Therefore, even if the electrode layer 3 is thickly formed, there is no fear that the electrical connection between the electrode layer 3 and the electronic element layer 4 is deteriorated. For example, as shown in FIG. , 35b in pressure contact with each other to form a surge absorber, sufficient electrical connection between the electrode layers 3, 3 and the main electrodes 35a, 35b can be obtained only by pressure contact. Further, similarly to the first manufacturing example, when the substrate 2A is cut and separated into the individual chip electronic components 1, the electrode layers 33, 33 and the electronic element layer 4 are already formed on the base body 2. The process is simple and suitable for mass production. Further, since the electrode layer 3 is formed by sputtering, it is possible to form a metal layer (electrode layer 3) that does not contain foreign matter such as a binder, and there is an advantage that the resistance during conduction is extremely small.

Also in this third manufacturing example, first,
It is also possible to use a method in which after forming a resist film on the substrate surface 2A ′, the electrode material film 25 is formed from above the resist film to the inner wall of the elongated hole 21, and then the resist film is peeled off with a peeling liquid. According to this method, the work of polishing the electrode material film 25 on the uppermost substrate 2A becomes unnecessary.

[0037]

As described above, in the chip electronic component according to the first aspect of the present invention, the electronic element layer constituting the electronic element is formed on the surface of the substrate, and the end portion of the electronic element layer is the substrate. Is electrically connected to the electrode layers formed on both sides of the electrode layer on the surface of the electrode layer. Therefore, the electrode layers are formed on both sides of the base, and the electronic element layer and the electrode layers are electrically connected on the surface portion of the electrode layers, so that the electrode layers can be formed thick. Therefore, for example, when the main electrode is pressed against the electrode layer to form the surge absorber, sufficient electrical connection between the electrode layer and the main electrode can be obtained only by pressure contact.

In the chip electronic component according to claim 1,
When the electronic element layer formed on the surface of the base body is composed of a plurality of resistor layers formed on the surface of the base body with a minute interval therebetween, a chip electronic component suitable for forming a surge absorber is obtained. To be

According to a third aspect of the present invention, there is provided a method of manufacturing a chip electronic component, including a step of forming a plurality of parallel elongated holes in a substrate, and an electrode layer forming step of forming an electrode layer in the elongated holes. An electronic element layer forming step of forming a continuous electronic element layer on the surface of the substrate and on the electrode layer surface portion, and cutting the substrate on which the electrode layer and the electronic element layer are formed into individual chip electronic components. And a cutting step of separating. According to this manufacturing method, the chip electronic component having the structure described in claim 1 can be obtained.
Further, when the substrate is cut and separated into individual chip electronic components, the electrode layer and the electronic element layer are already formed on the base, so that the manufacturing process is simple and suitable for mass production.

In the method of manufacturing the chip electronic component according to the third aspect, the electrode layer can be formed by imprinting a conductive ink in the elongated hole. According to this method, no vacuum chamber equipment is required, so that the manufacturing cost can be reduced to that extent. Alternatively, the electrode layer can be formed by forming an electrode material film by sputtering from the surface of the substrate to the inner wall of the long hole and then removing the electrode material film on the substrate. This method has the advantage that an electrode layer having a low resistance can be formed. In addition, when performing the sputtering, a plurality of substrates may be stacked, and according to this method, the electrode material film can be simultaneously formed on the inner wall of the long hole for the plurality of substrates, and the uppermost layer can be formed. Since the electrode material film is not formed on the substrate other than the substrate, the labor for removing the electrode material film on the substrate is saved and the manufacturing efficiency is improved.

[Brief description of drawings]

FIG. 1 is a perspective view showing a first embodiment of a chip electronic component of the present invention.

2 is a perspective view showing an example in which a surge absorber is configured using the chip electronic component of FIG.

3A and 3B show a long hole forming step in the first manufacturing example of the chip electronic component of the present invention, FIG. 3A being a perspective view, and FIG.
FIG. 4 is a sectional view taken along the line AA ′.

FIG. 4 is a cross-sectional view showing an electrode layer forming step in the first manufacturing example of the chip electronic component of the present invention.

FIG. 5 is a perspective view showing an electronic element layer forming step in a first manufacturing example of the chip electronic component of the present invention,
(B) is a sectional view taken along the line BB '.

FIG. 6 is a perspective view showing a cutting step in a first manufacturing example of the chip electronic component of the present invention.

FIG. 7 is a cross-sectional view showing an electrode layer forming step in the second manufacturing example of the chip electronic component of the present invention in the order of steps.

FIG. 8 is a cross-sectional view showing another example of the electrode layer forming method in the second manufacturing example of the chip electronic component of the present invention in the order of steps.

FIG. 9 is a sectional view showing an electrode layer forming step in a third manufacturing example of the chip electronic component of the present invention.

FIG. 10 is a cross-sectional view showing a surge absorber using a conventional chip electronic component.

FIG. 11 is a perspective view showing a method of manufacturing the chip electronic component of FIG. 14 in process order.

FIG. 12 is a cross-sectional view showing a method of manufacturing a chip electronic component proposed so far in the order of steps.

[Explanation of symbols]

1 ... Chip electronic component, 2 ... Base, 2A ... Base (before cutting), 2a ... Base surface, 2A '... Base surface (before cutting),
3 ... Electrode layer, 3A ... Electrode layer (before cutting) 3a ... Electrode layer surface portion, 3A '... Electrode layer surface portion (before cutting) 4 ... Electronic element layer, 4a, 4b ... Resistor layer, 21 ... Long hole,
24 ... Conductive ink, 25 ... Electrode material film.

[Procedure amendment]

[Submission date] May 15, 1997

[Procedure amendment 1]

[Document name to be amended] Statement

[Correction target item name] 0007

[Correction method] Change

[Correction contents]

On the other hand, the inventors of the present invention have found that the electrode layers 14a and 14b are formed before the individual substrate 11 is divided from the substrate 11A.
We have proposed a method that enables the formation of
69 9 79). FIG. 12 is an explanatory view showing the step of forming the electrode layers 14a and 14b in the proposed method by using a sectional view.

[Procedure amendment 2]

[Document name to be amended] Statement

[Correction target item name] 0016

[Correction method] Change

[Correction contents]

The electrode layers 3 are formed on both end faces of the substrate 2, respectively. The electrode layer 3 is made of a conductive material formed by firing a conductive ink or a conductive material formed by sputtering, and is an appropriate material depending on the application of the chip electronic component 1 and the method of forming the electrode layer 3. Is selected and used. Assuming that the direction perpendicular to the end face of the substrate 2 is the X direction, the direction perpendicular to the end face and parallel to the surface 2a of the substrate 2 is the Y direction, and the direction perpendicular to these is the Z direction (the same applies hereinafter), X the thickness of the electrode layer 3 in the direction can be set thicker in accordance with the operating conditions of the chip electronic component 1, for example, to apply the surge absorber shown in FIG. 2 is 1μm or more is preferably formed over 2 [mu] m. When the thickness of the electrode layer 3 is less than 1 μm,
When the electrode layer 3 is connected to another electrode, if pressure is applied by a force in the X direction toward the center of the substrate 2, this force easily causes chipping or peeling of the electrode layer 3, resulting in poor conduction. It is not preferable.

[Procedure 3]

[Document name to be amended] Statement

[Correction target item name] 0027

[Correction method] Change

[Correction contents]

Next, the chip electronic component 1 of the first embodiment described above.
A second manufacturing example for manufacturing the above will be described with reference to FIG. The electrode layer forming process is different between the second manufacturing example and the first manufacturing example. First, a substrate 2A in the same manner as in the first manufacturing example, to form the elongated hole 21 in the board 2A. Then, in this manufacturing example, the electrode layer 3A is formed in the elongated hole 21 by using the sputtering method.

[Procedure amendment 4]

[Document name to be amended] Statement

[Name of item to be corrected] 0032

[Correction method] Change

[Correction contents]

Next, the chip electronic component 1 of the first embodiment described above.
A third manufacturing example for manufacturing the above will be described with reference to FIG. The third manufacturing example is different from the second manufacturing example in that when the electrode material film 25 is formed by bias sputtering, as shown in FIG. 9, a plurality of substrates 2A and elongated holes 21 are formed.
This is a point in which they are overlapped so that the positions of are coincident with each other. The greater the number of substrates 2A to be superposed, the better the manufacturing efficiency. However, if the number is too large, the film thickness of the electrode material film 25 formed on the inner wall of the elongated hole 21 will not be uniform for each substrate 2A. Therefore, the thickness of the substrate 2A, the shape (size) of the elongated hole 21, the sputtering conditions, etc. are preferably set so that a uniform electrode material film 25 can be obtained in the elongated hole 21.

[Procedure Amendment 5]

[Document name to be amended] Statement

[Correction target item name] 0033

[Correction method] Change

[Correction contents]

After forming the electrode material film 25, the uppermost substrate 2A is formed in the same manner as in the second manufacturing example.
Polishing is performed to scrape off the electrode material film 25 on the substrate 2A to form the electrode layer 3A in the long hole 21. For the lower substrate 2A other than this, the electrode material film 25 is formed on the substrate 2A.
Since it is not formed on A but only on the inner wall of the long hole 21, it is not necessary to polish. As a result, the substrate 2
A plurality of substrates 2 in which the electrode layer 3A is formed in the elongated hole 21 of A and the substrate surface 2A ′ and the surface portion 3A ′ of the electrode layer 3A are flush with each other are obtained.

[Procedure correction 6]

[Document name to be amended] Statement

[Correction target item name] Brief description of drawings

[Correction method] Change

[Correction contents]

[Brief description of drawings]

FIG. 1 is a perspective view showing a first embodiment of a chip electronic component of the present invention.

2 is a perspective view showing an example in which a surge absorber is configured using the chip electronic component of FIG.

3A and 3B show a long hole forming step in the first manufacturing example of the chip electronic component of the present invention, FIG. 3A being a perspective view, and FIG.
FIG. 4 is a sectional view taken along the line AA ′.

FIG. 4 is a cross-sectional view showing an electrode layer forming step in the first manufacturing example of the chip electronic component of the present invention.

FIG. 5 is a perspective view showing an electronic element layer forming step in a first manufacturing example of the chip electronic component of the present invention,
(B) is a sectional view taken along the line BB '.

FIG. 6 is a perspective view showing a cutting step in a first manufacturing example of the chip electronic component of the present invention.

FIG. 7 is a cross-sectional view showing an electrode layer forming step in the second manufacturing example of the chip electronic component of the present invention in the order of steps.

FIG. 8 is a cross-sectional view showing another example of the electrode layer forming method in the second manufacturing example of the chip electronic component of the present invention in the order of steps.

FIG. 9 is a sectional view showing an electrode layer forming step in a third manufacturing example of the chip electronic component of the present invention.

FIG. 10 is a cross-sectional view showing a surge absorber using a conventional chip electronic component.

11 is a perspective view showing a sequence of process steps in a method for producing a 1 0-chip electronic component.

FIG. 12 is a cross-sectional view showing a method of manufacturing a chip electronic component proposed so far in the order of steps.

[Reference Numerals] 1 ... chip electronic component, 2 ... substrate, 2A ... board (before cutting), 2a ... substrate surface, 2A '... board surface (before cutting),
3 ... Electrode layer, 3A ... Electrode layer (before cutting) 3a ... Electrode layer surface portion, 3A '... Electrode layer surface portion (before cutting) 4 ... Electronic element layer, 4a, 4b ... Resistor layer, 21 ... Long hole,
24 ... Conductive ink, 25 ... Electrode material film.

Claims (6)

[Claims] 1. An electrode layer in which an electronic element layer constituting an electronic element is formed on a surface of a substrate, and an end portion of the electronic element layer is formed on both sides of the substrate, and an electrode layer is formed on a surface portion of the electrode layer. A chip electronic component characterized by being electrically connected. 2. The chip electronic component according to claim 1, wherein the electronic element layer is composed of a plurality of resistor layers formed on the surface of the substrate with a minute gap therebetween. 3. A long hole forming step of forming a plurality of parallel long holes in a substrate, an electrode layer forming step of forming an electrode layer in the long hole, and a surface of the substrate and a surface portion of the electrode layer. An electronic element layer forming step of forming a continuous electronic element layer, and a cutting step of cutting the substrate on which the electrode layer and the electronic element layer are formed to separate into individual chip electronic components. A method of manufacturing a characteristic chip electronic component. 4. The conductive ink is imprinted in the elongated holes in the electrode layer forming step.
A method for manufacturing the described chip electronic component. 5. The electrode material film on the substrate is removed after the electrode material film is formed by sputtering from the surface of the substrate to the inner wall of the elongated hole in the electrode layer forming step. Manufacturing method of chip electronic components. 6. The method of manufacturing a chip electronic component according to claim 5, wherein in the electrode layer forming step, the sputtering is performed with a plurality of substrates stacked.