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JPH09296237A - Metallic substrate material for semiconductor packaging - Google Patents

Metallic substrate material for semiconductor packaging

Info

Publication number
JPH09296237A
JPH09296237A JP8131140A JP13114096A JPH09296237A JP H09296237 A JPH09296237 A JP H09296237A JP 8131140 A JP8131140 A JP 8131140A JP 13114096 A JP13114096 A JP 13114096A JP H09296237 A JPH09296237 A JP H09296237A
Authority
JP
Japan
Prior art keywords
metal substrate
strength
semiconductor chip
package
substrate material
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8131140A
Other languages
Japanese (ja)
Inventor
Tetsuo Maki
哲生 牧
Junji Miyake
淳司 三宅
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nikko Kinzoku KK
Original Assignee
Nikko Kinzoku KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nikko Kinzoku KK filed Critical Nikko Kinzoku KK
Priority to JP8131140A priority Critical patent/JPH09296237A/en
Publication of JPH09296237A publication Critical patent/JPH09296237A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Lead Frames For Integrated Circuits (AREA)

Abstract

PROBLEM TO BE SOLVED: To increase the strength and thermal conductivity of a metallic substrate for a plastic package prepared by sealing semiconductor chips adhered to a metallic substrate with thermosetting resin. SOLUTION: This material has a composition consisting of 0.05-3.5% Fe, 0.01-0.4%, P, and the balance Cu with inevitable impurities and containing, if necessary, (a) 0.01-2.0% Zn and/or 0.05-3.0% Sn and (b) 0.01-2.0%, in total, of Mg, Co, Pb, Zr, Cr, Mn, Al, Ni, Si, In and/or B.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は、銅合金からなる半
導体パッケージング用金属基板材料に関するものであ
り、さらに詳しく述べるならば、パッケージが半導体チ
ップを接着した金属基板と半導体チップを封止する熱硬
化性樹脂とからなり、金属基板の強度及び熱放散性が要
求されるパッケージの金属基板材料の改良に関するもの
である。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a metal substrate material for semiconductor packaging, which is made of a copper alloy. More specifically, the package is a metal substrate to which a semiconductor chip is adhered and a heat for sealing the semiconductor chip. The present invention relates to an improvement of a metal substrate material of a package which is composed of a curable resin and which requires strength and heat dissipation of the metal substrate.

【0002】[0002]

【従来の技術】半導体プラスチックパッケージの構造と
しては、以前はリード挿入実装デバイスであるDIP
(デュアルインラインパッケージ)が主流であったが、
実装密度の向上の要求から、表面実装デバイスであるS
OP(スモールアウトラインパッケージ)、QFP(ク
ワッドフラットパッケージ)等が次第に主流になり、特
に入出力信号の増加に対応可能なQFPは多用されてい
る。これらのパッケージにおいては通常リードフレーム
が使用され、チップをそのダイパット上に接着し樹脂に
より封止する場合が多い。
2. Description of the Related Art As a structure of a semiconductor plastic package, a DIP which is a lead insertion mounting device was used before.
(Dual inline package) was the mainstream,
Due to the demand for higher packaging density, the S
OP (Small Outline Package), QFP (Quad Flat Package), etc. are gradually becoming the mainstream, and especially QFP which can cope with an increase in input / output signals is widely used. A lead frame is usually used in these packages, and the chip is often adhered onto the die pad and sealed with a resin.

【0003】一方最近においてはBGA(ボールグリッ
ドアレイ)を始めるとする表面実装型のエリアパッケー
ジが開発され、マイクロプロセッサーあるいは高速のロ
ジック系の半導体用として採用されており、今後急速に
その用途が伸びると期待されている。そのエリアパッケ
ージにおいては半導体チップをプリント基板に接着する
場合、またTAB(テープオートメイティドボンディン
グ)の方式で実装する場合などの他に、放熱性の観点か
らチップを金属基板上に接着するパッケージングがあ
る。以下、その一例を説明する。
On the other hand, recently, surface mount type area packages such as BGA (ball grid array) have been developed and adopted for microprocessors or high-speed logic semiconductors, and their applications will grow rapidly in the future. Is expected. In the area package, in addition to the case where a semiconductor chip is bonded to a printed circuit board, the case where a TAB (tape automated bonding) method is used, and the like, the chip is bonded onto a metal substrate from the viewpoint of heat dissipation. There is. Hereinafter, an example will be described.

【0004】図1及び図2はマイクロプロセッサー用プ
ラスチックパッケージの一例であり、パッケージ断面の
模式図を示す。図1はワイヤーボンディングを使ったP
GA(ピングリッドアレイ)およびBGAであり、図2
はフリップチップ接続を使ったBGAである。双方とも
にヒートスプレッダーと称される金属基板1に半導体チ
ップ2が接着されている(日経マイクロデバイス、19
96年4月号、90〜96頁より引用)。図中、3は封
止樹脂、4はプリント基板、5はピン、6はバンプ、7
はボンディングワイヤ、矢印は熱流である。図1、2に
示される金属基板1は半導体チップ担持と放熱機能をも
っている。金属基板1は放熱特性が通常の基板用セラミ
ックよりも優れていることを利用してプラスチックパッ
ケージに組み込まれているのである。
1 and 2 show an example of a plastic package for a microprocessor, which is a schematic view of a cross section of the package. Figure 1 shows P using wire bonding
GA (pin grid array) and BGA, as shown in FIG.
Is a BGA using flip chip connection. A semiconductor chip 2 is adhered to a metal substrate 1 which is called a heat spreader (Nikkei Microdevice, 19
(Quoted from the April 1996 issue, pp. 90-96). In the figure, 3 is a sealing resin, 4 is a printed circuit board, 5 is a pin, 6 is a bump, 7
Is the bonding wire and the arrow is the heat flow. The metal substrate 1 shown in FIGS. 1 and 2 has a semiconductor chip support and a heat dissipation function. The metal substrate 1 is incorporated in the plastic package by utilizing the fact that the heat dissipation characteristic is superior to that of the usual ceramics for substrates.

【0005】また、一方従来からのパッケージにおいて
も放熱性の観点からチップをリードフレームとは形状が
異なる金属基板上に接着する場合がある。このように従
来のパッケージとは異なり、いわゆるリードフレームで
はない金属基板上にチップを接着し封止するいくつもの
パッケージが提案され、実用化されている。
On the other hand, in a conventional package, the chip may be adhered to a metal substrate having a shape different from that of the lead frame from the viewpoint of heat dissipation. Thus, unlike conventional packages, several packages have been proposed and put into practical use in which a chip is bonded and sealed on a metal substrate that is not a so-called lead frame.

【0006】[0006]

【発明が解決しようとする課題】本発明者は、この種の
パッケージに今後課せられる要請につき次のように考察
した。まず前述の半導体チップから発生した熱を十分に
放散することが要求されるが、樹脂パッケージ材料の熱
放散性が改善されたことにより、上記パッケージが実用
化されたとの背景があり、しかも熱伝導性が一般的にす
ぐれた金属を熱放散媒体として使用することにより、か
なりの熱放散性が達成されているとの面はある。しかし
ながら、半導体チップの高集積化及び微細化により半導
体チップからの発熱量が一層多くなることが予想される
ので、半導体チップの裏面全体から放散される熱を如何
に効率的に放散するかとの観点からのサーマルマネージ
メントが重要になると考えられる。半導体チップから放
熱させるためには、接着している金属基板に十分な熱伝
導性があり、半導体チップと基板が十分に接合している
ことが必要であり、これらが欠けるとチップの温度上昇
が著しく、機能を損なう恐れがある。
DISCLOSURE OF THE INVENTION The inventor of the present invention has considered the demands to be imposed on this type of package in the following manner. First, it is required to sufficiently dissipate the heat generated from the above-mentioned semiconductor chip, but there is the background that the above package has been put into practical use due to the improved heat dissipation of the resin package material. There is an aspect that a considerable heat dissipation property is achieved by using a metal having excellent properties as a heat dissipation medium. However, it is expected that the amount of heat generated from the semiconductor chip will increase due to the higher integration and miniaturization of the semiconductor chip. Therefore, it is necessary to efficiently dissipate the heat radiated from the entire back surface of the semiconductor chip. It is thought that the thermal management from will be important. In order to dissipate heat from the semiconductor chip, it is necessary that the adhered metal substrate has sufficient thermal conductivity and the semiconductor chip and the substrate are sufficiently bonded. If these are missing, the temperature of the chip will rise. Significantly, the function may be impaired.

【0007】また一方ではパッケージング工程あるいは
作動中に伴う温度上昇にさらされる金属基板は、半導体
チップを接合する樹脂もしくは封止樹脂と熱膨張率が異
なるので、この結果金属基板内部に応力が発生し、金属
基板が微妙に変形する可能性があり、パッケージの信頼
性が損なわれる恐れがある。さらに組立加工中において
金属基板の材料強度が弱いと金属基板が平坦度を失うた
めに、樹脂との接着面が不完全になり放熱性や接着強度
が劣化する可能性もある。このようなことから、この金
属基板材料には十分な強度も要求される。
On the other hand, the metal substrate exposed to a temperature rise during the packaging process or during operation has a different coefficient of thermal expansion from the resin or sealing resin for joining the semiconductor chips, and as a result, stress is generated inside the metal substrate. However, the metal substrate may be subtly deformed, and the reliability of the package may be impaired. Further, if the material strength of the metal substrate is weak during the assembly process, the metal substrate loses the flatness, so that the adhesive surface with the resin becomes incomplete and the heat dissipation and adhesive strength may deteriorate. For this reason, the metal substrate material is also required to have sufficient strength.

【0008】本発明は、上述のような要請に対処してな
されたもので、パッケージの熱放散性に有利でしかも十
分な強度を有したCu合金を用いて半導体パッケージを
提供することを目的としている。
The present invention has been made in response to the above demands, and an object thereof is to provide a semiconductor package using a Cu alloy which is advantageous in heat dissipation of the package and has sufficient strength. There is.

【0009】[0009]

【課題を解決するための手段】そこで、本発明者らは、
半導体チップを接着した金属基板とこれらを封止する熱
硬化性樹脂とからなるパッケージ(以下「樹脂封止パッ
ケージ」という)の金属基板として適する銅合金を開発
するための研究を重ねたところ、Cu−Fe−P系合金
の成分調整を行った上で、必要に応じてZnおよび/ま
たはSn、さらに必要に応じてMg,Co,Pb,Z
r,Cr,Mn,Al,Ni,Si,Inおよび/また
はBを含有させることで、樹脂封止パッケージング用金
属基板材料に好適な素材を提供できることを見出した。
Means for Solving the Problems Accordingly, the present inventors have:
As a result of repeated research to develop a copper alloy suitable for a metal substrate of a package (hereinafter referred to as “resin-encapsulated package”) including a metal substrate to which a semiconductor chip is bonded and a thermosetting resin that seals these, After adjusting the composition of the —Fe—P-based alloy, Zn and / or Sn may be added if necessary, and Mg, Co, Pb, Z may be added as necessary.
It has been found that by containing r, Cr, Mn, Al, Ni, Si, In and / or B, a material suitable for a metal substrate material for resin-sealed packaging can be provided.

【0010】本発明は、上記知見を基にして完成された
ものであり、銅合金においてFeを0.05〜3.5重
量%(以下百分率は特記しない限り重量%を意味する)
およびPを0.01〜0.4%含有し、必要に応じて
0.05〜5%のZnまたは0.05〜3%Snのうち
の1種または2種を含有し、さらに必要に応じてMg,
Co,Pb,Zr,Cr,Mn,Al,Ni,Si,I
nまたはBのうちの1種以上を総量で0.01〜2%含
有し、残部がCuおよびその不可避的不純物になるよう
に調整することにより、半導体パッケージング用基盤材
料として十分な熱伝導性と強度を兼備せしめたことを特
徴とする銅合金に関する。
The present invention has been completed based on the above findings, and 0.05 to 3.5% by weight of Fe in a copper alloy (the percentages below refer to% by weight unless otherwise specified).
And P in an amount of 0.01 to 0.4%, and optionally 0.05 to 5% of Zn or 0.05 to 3% of Sn, and 1 or 2 of them, and further, if necessary. Mg,
Co, Pb, Zr, Cr, Mn, Al, Ni, Si, I
Sufficient thermal conductivity as a base material for semiconductor packaging by containing 0.01 to 2% of n or B in a total amount and adjusting the balance to Cu and its unavoidable impurities. The present invention relates to a copper alloy characterized by having both strength and strength.

【0011】基板の性能の一つである熱伝導性はヴィー
デマン・フランツの法則により電気伝導度と正比例関係
をもっているために、多くの電気伝導度データより銅基
板の放熱特性を予測することができる。基板の他の性能
である強度を高めるためには、添加元素を加えれば良い
が、この場合電気伝導度が低下する。本発明の合金組成
はこのように一方の特性を向上すると他方は低下すると
の関係がある性質を高いレベルで両立するべく鋭意検討
した上で選定されたものである。
Since the thermal conductivity, which is one of the performances of the substrate, has a direct proportional relationship with the electrical conductivity according to Wiedemann-Franz's law, it is possible to predict the heat dissipation characteristic of the copper substrate from many electrical conductivity data. . An additional element may be added in order to increase strength, which is another performance of the substrate, but in this case, the electric conductivity decreases. The alloy composition of the present invention was selected after careful investigation to achieve a high level of both properties in which one property is improved and the other is decreased.

【0012】次に本発明において銅合金の成分組成を前
記の如くに限定した理由をその作用とともに説明する。
Next, the reason why the component composition of the copper alloy is limited as described above in the present invention will be explained together with its action.

【0013】Fe Feは単独であるいはPと金属間化合物を形成して合金
の強度、耐熱性を向上させる作用があるが、その含有量
が0.05%未満であると所望の高強度が得られず、一
方3.5%を越える割合でFeを含有させると加工性が
低下するとともに、導電性が著しく低下することから、
Feの含有量を0.05%以上3.5%以下と定めた。
Fe Fe has an action of improving the strength and heat resistance of the alloy by forming an intermetallic compound with P alone or P, but if the content is less than 0.05%, a desired high strength can be obtained. However, if Fe is contained in a proportion exceeding 3.5%, the workability is lowered and the conductivity is remarkably lowered.
The Fe content was set to 0.05% or more and 3.5% or less.

【0014】 PはFeと金属間化合物を形成して、導電性を下げずに
強度を向上させるが、0.01%未満ではその効果がな
く、0.4%を超えると加工性が著しく低下するととも
に導電率が著しく低下することから、P含有量は0.0
1以上0.4%以下と定めた。
P P forms an intermetallic compound with Fe to improve the strength without lowering the conductivity, but if it is less than 0.01%, there is no effect, and if it exceeds 0.4%, the workability is remarkable. The P content is 0.0
It was set to 1 or more and 0.4% or less.

【0015】Zn Znは溶解鋳造時の脱酸剤として作用するとともに、め
っきの耐熱剥離性を改善する効果があるが、その含有量
が0.05%未満ではその効果が顕著でなく、一方Zn
含有量が5%を越えると導電率の低下が著しくなり、ま
た応力腐食割れを起こし易くなることから、Zn含有量
は0.05%以上5%以下と定めた。
Zn Zn acts as a deoxidizing agent at the time of melt casting and has an effect of improving the heat-resistant peeling property of plating, but if the content is less than 0.05%, the effect is not remarkable.
When the content exceeds 5%, the conductivity is remarkably lowered, and stress corrosion cracking is likely to occur. Therefore, the Zn content is set to 0.05% or more and 5% or less.

【0016】Sn Snには合金の強度を確保する作用があるが、その含有
量が0.05%未満では強度の向上が十分でなく、一方
Sn含有量が3%を超えると導電率の低下が著しくなる
とともに、合金の熱間加工性を低下させることから、S
n含有量は0.05%以上3%以下と定めた。
Sn Sn has the function of ensuring the strength of the alloy, but if the content of Sn is less than 0.05%, the strength is not sufficiently improved, while if the Sn content exceeds 3%, the conductivity decreases. And the hot workability of the alloy are deteriorated.
The n content was determined to be 0.05% or more and 3% or less.

【0017】Mg,Co,Pb,Zr,Cr,Mn,A
l,Ni,Si,InまたはB Mg,Co,Pb,Zr,Cr,Mn,Al,Ni,S
i,InまたはBには、上記銅合金の強度を改善するに
等しい作用があるので必要により1種または2種以上の
添加がなされる。しかし、その含有量が総量で0.01
%未満であると強度改善の効果は得られず、一方総含有
量が2%を超えると導電性が著しく低下することから、
これらの含有量を総量で0.01以上2%以下と定め
た。
Mg, Co, Pb, Zr, Cr, Mn, A
1, Ni, Si, In or B Mg, Co, Pb, Zr, Cr, Mn, Al, Ni, S
Since i, In or B has the same effect as improving the strength of the copper alloy, one or more kinds of them are added if necessary. However, the total content is 0.01
If the total content is less than 2%, the effect of improving the strength cannot be obtained, while if the total content exceeds 2%, the conductivity is significantly reduced.
The total content of these is set to 0.01 to 2%.

【0018】本発明に係る金属基板に要求される強度
は、(イ)段落番号0007で説明した耐変形性の他
に、(ロ)基板の薄肉化などを実現するための性能であ
り、引張強さの大小によりこれらを評価することができ
る。そして、好ましい引張強さは450N/mm2 以上
である。一方、熱伝導性の指標となる導電率は45%I
ACS以上であることが好ましい。さらに曲げ性に影響
を与える溶体化処理後の結晶粒径は15μm以下である
ことが好ましい。次に、素材の調質状態は時効処理状態
である必要はあるが、最終仕上げ状態は、冷間圧延仕上
げ、時効仕上げ、歪取り焼鈍仕上げの何れでもよい。以
下、実施例により本発明をさらに詳しく説明する。
The strength required for the metal substrate according to the present invention is, in addition to the deformation resistance described in (a) Paragraph No. 0007, (b) the performance for realizing the thinning of the substrate and the like. These can be evaluated by the magnitude of strength. The preferred tensile strength is 450 N / mm 2 or more. On the other hand, the conductivity, which is an index of thermal conductivity, is 45% I.
It is preferably ACS or more. Furthermore, it is preferable that the crystal grain size after solution treatment that affects the bendability is 15 μm or less. Next, the tempering state of the material needs to be an aging treatment state, but the final finishing state may be any of cold rolling finish, aging finish, and strain relief annealing finish. Hereinafter, the present invention will be described in more detail with reference to examples.

【0019】[0019]

【実施例】高周波溶解炉にて図3(表1)に示す各種成
分組成の銅合金を溶製し、厚さ20mmのインゴットに
鋳造した。なお、溶解鋳造は大気中で実施した。次に、
このインゴットを800〜950℃で板厚8mmまで熱
間圧延を行い、表面のスケール除去のため面削を施した
後、冷間圧延により厚さ2mmの板とした。その後、3
50〜900℃の温度で1時間の焼鈍を行い結晶粒径を
約5〜10μmに調整した後、0.5mmまで冷間圧延
した。そしてさらに、350〜600℃の温度で5時間
の時効を行った後、冷間圧延で0.25mmの板とし
た。
Example A copper alloy having various component compositions shown in FIG. 3 (Table 1) was melted in a high frequency melting furnace and cast into an ingot having a thickness of 20 mm. The melt casting was performed in the atmosphere. next,
This ingot was hot-rolled at 800 to 950 ° C. to a plate thickness of 8 mm, chamfered to remove scale on the surface, and then cold-rolled to form a plate having a thickness of 2 mm. Then 3
After annealing at a temperature of 50 to 900 ° C. for 1 hour to adjust the crystal grain size to about 5 to 10 μm, cold rolling was performed to 0.5 mm. After further aging at a temperature of 350 to 600 ° C. for 5 hours, it was cold-rolled into a plate of 0.25 mm.

【0020】このようにした得られた各板材につき諸特
性の評価を行った。引張り強さおよび伸びの測定には、
JIS13号引張試験片を用いて圧延平行方向の引張試
験を行った。熱伝導性は導電率の値で評価することと
し、4端子法で固有抵抗を測定し、それを用いて導電率
(%IACS)を求めた。めっき耐熱剥離性は供試材に
0.5〜0.8μmの銅下地めっきを施した後、1〜
1.5μmの60%Sn−40%Pb半田を電気めっき
した後加熱リフロー処理したものについて幅10mm、
長さ100mmに切断後150℃にて所定時間(100
時間毎)加熱し、曲げ半径0.25mm(=板厚)で片
側の90°曲げを往復1回行い、20倍の視野で表裏面
の曲げ部近傍を観察しめっき剥がれの有無を確認した。
耐熱性の評価は、種々の温度で5分間の加熱を行い、ビ
ッカース硬さが加熱前の1/2になる温度を半軟化温度
として求めた。
Various properties of each of the plate materials thus obtained were evaluated. To measure tensile strength and elongation,
A tensile test in the rolling parallel direction was performed using a JIS No. 13 tensile test piece. The thermal conductivity was evaluated by the value of electric conductivity, and the specific resistance was measured by the four-terminal method, and the electric conductivity (% IACS) was obtained by using it. The heat resistance peeling resistance of the plating is 1 to after the copper undercoat of 0.5 to 0.8 μm is applied to the test material.
A width of 10 mm for a product that is electroplated with 60 μm Sn-40% Pb solder of 1.5 μm and then heat-reflowed.
After cutting to a length of 100 mm at 150 ° C for a predetermined time (100
Each time, heating was performed, 90 ° bending on one side was performed once reciprocally with a bending radius of 0.25 mm (= plate thickness), and the vicinity of the bent portions on the front and back surfaces was observed from a 20 times visual field to confirm the presence or absence of plating peeling.
The heat resistance was evaluated by heating at various temperatures for 5 minutes, and the temperature at which the Vickers hardness became 1/2 that before heating was determined as the semi-softening temperature.

【0021】表1からわかるように、本発明合金は優れ
た、強度、導電率および耐熱性を有し、Znを含有する
ものではめっき耐熱剥離性にも優れていることがわか
る。一方、比較合金のNo.1は、本発明合金に対しF
eが高いために強度は高いが伸びが低く、導電率も劣
る。比較合金No.2はSnが、No.3はZnが高い
ため導電率が劣る。比較合金No.4はPを含有してい
ないため強度が劣る。比較合金No.5はPが高いため
導電率およびめっき耐熱剥離性が劣る。
As can be seen from Table 1, the alloys of the present invention have excellent strength, conductivity and heat resistance, and those containing Zn are also excellent in heat resistant peeling resistance. On the other hand, the comparative alloy No. 1 is F for the alloy of the present invention
Since e is high, the strength is high, but the elongation is low, and the conductivity is poor. Comparative alloy No. No. 2 is Sn, No. 3 has a high Zn content and thus has poor conductivity. Comparative alloy No. Since No. 4 does not contain P, the strength is poor. Comparative alloy No. Since No. 5 has a high P, the conductivity and the heat resistant peeling resistance of the plating are poor.

【0022】[0022]

【発明の効果】以上説明したように本発明の銅合金は、
優れた熱伝導性と強度、さらには優れた耐熱性とめっき
耐熱剥離性をも有し、半導体パッケージング用基板材料
として好適である。
As described above, the copper alloy of the present invention is
It has excellent thermal conductivity and strength, as well as excellent heat resistance and plating heat-resistant peeling property, and is suitable as a substrate material for semiconductor packaging.

【図面の簡単な説明】[Brief description of drawings]

【図1】プラスチック封止パッケージ断面の模式図であ
る。
FIG. 1 is a schematic view of a cross section of a plastic sealed package.

【図2】プラスチック封止パッケージ断面の模式図であ
る。
FIG. 2 is a schematic view of a cross section of a plastic sealed package.

【図3】本発明及び比較例の合金組成及び特性を示す図
表(表1)である。
FIG. 3 is a table (Table 1) showing alloy compositions and properties of the present invention and comparative examples.

【符号の説明】[Explanation of symbols]

1 ヒートスプレッダ(金属基板) 2 半導体チップ 3 封止樹脂 4 プリント基板 5 ピン 6 半田バンプ 7 ボンディングワイヤ 1 heat spreader (metal substrate) 2 semiconductor chip 3 sealing resin 4 printed circuit board 5 pins 6 solder bumps 7 bonding wire

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】 金属基板上に接着された半導体チップを
熱硬化性樹脂により封止してなるプラスチックパッケー
ジの該金属基板の材料が、重量割合で、Fe:0.05
〜3.5%、P:0.01〜0.4%を含有し、残部が
Cuおよびその不可避的不純物からなり、熱伝導性およ
び強度に優れた銅合金からなることを特徴とする半導体
パッケージング用金属基板材料。
1. A material of the metal substrate of a plastic package obtained by sealing a semiconductor chip adhered on the metal substrate with a thermosetting resin is Fe: 0.05 in weight ratio.
To 3.5%, P: 0.01 to 0.4%, the balance being Cu and its unavoidable impurities, and a copper alloy having excellent thermal conductivity and strength. Metal substrate material for welding.
【請求項2】 金属基板上に接着された半導体チップを
熱硬化性樹脂により封止してなるプラスチックパッケー
ジの該金属基板の材料が、重量割合で、Fe:0.05
〜3.5%、P:0.01〜0.4%を含有し、さらに
0.05〜5%のZnまたは0.05〜3%のSnのう
ちの1種または2種を含有し、残部がCuおよびその不
可避的不純物からなり、熱伝導性および強度に優れた銅
合金からなることを特徴とする半導体パッケージング用
金属基板材料。
2. A material of the metal substrate of a plastic package obtained by sealing a semiconductor chip adhered on the metal substrate with a thermosetting resin is Fe: 0.05 in weight ratio.
.About.3.5%, P: 0.01 to 0.4%, and further contains one or two of 0.05 to 5% Zn or 0.05 to 3% Sn, A metal substrate material for semiconductor packaging, wherein the balance comprises Cu and its unavoidable impurities, and a copper alloy having excellent thermal conductivity and strength.
【請求項3】 金属基板上に接着された半導体チップを
熱硬化性樹脂により封止してなるプラスチックパッケー
ジの該金属基板の材料が、重量割合で、Fe:0.05
〜3.5%、P:0.01〜0.4%を含有し、さらに
Mg,Co,Pb,Zr,Cr,Mn,Al,Ni,S
i,InまたはBのうちの1種以上を総量で0.01〜
2%含有し、残部がCuおよびその不可避的不純物から
なり、熱伝導性および強度に優れた銅合金からなること
を特徴とする半導体パッケージング用金属基板材料。
3. The weight ratio of the material of the metal substrate of the plastic package obtained by sealing a semiconductor chip adhered on the metal substrate with a thermosetting resin is Fe: 0.05.
.About.3.5%, P: 0.01 to 0.4%, and further contains Mg, Co, Pb, Zr, Cr, Mn, Al, Ni, S.
The total amount of at least one of i, In, and B is 0.01 to
A metal substrate material for semiconductor packaging, containing 2%, the balance being Cu and inevitable impurities thereof, and a copper alloy having excellent thermal conductivity and strength.
【請求項4】 金属基板上に接着された半導体チップを
熱硬化性樹脂により封止してなるプラスチックパッケー
ジの該金属基板材料が、重量割合で、Fe:0.05〜
3.5%、P:0.01〜0.4%を含有し、さらに
0.05〜5%のZnまたは0.05〜3%のSnのう
ちの1種または2種を含有するとともに、Mg,Co,
Pb,Zr,Cr,Mn,Al,Ni,Si,Inまた
はBのうちの1種以上を総量で0.01〜2%含有し、
残部がCuおよびその不可避的不純物からなり、熱伝導
性および強度に優れた銅合金からなることを特徴とする
半導体パッケージング用金属基板材料。
4. The metal substrate material of a plastic package obtained by sealing a semiconductor chip adhered on a metal substrate with a thermosetting resin, in a weight ratio, Fe: 0.05-.
3.5%, P: 0.01 to 0.4%, and further contains one or two of 0.05 to 5% Zn or 0.05 to 3% Sn, and Mg, Co,
0.01 to 2% of Pb, Zr, Cr, Mn, Al, Ni, Si, In or B is contained in a total amount of 0.01 to 2%,
A metal substrate material for semiconductor packaging, wherein the balance comprises Cu and its unavoidable impurities, and a copper alloy having excellent thermal conductivity and strength.
JP8131140A 1996-04-28 1996-04-28 Metallic substrate material for semiconductor packaging Pending JPH09296237A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8131140A JPH09296237A (en) 1996-04-28 1996-04-28 Metallic substrate material for semiconductor packaging

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8131140A JPH09296237A (en) 1996-04-28 1996-04-28 Metallic substrate material for semiconductor packaging

Publications (1)

Publication Number Publication Date
JPH09296237A true JPH09296237A (en) 1997-11-18

Family

ID=15050937

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8131140A Pending JPH09296237A (en) 1996-04-28 1996-04-28 Metallic substrate material for semiconductor packaging

Country Status (1)

Country Link
JP (1) JPH09296237A (en)

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US6344171B1 (en) 1999-08-25 2002-02-05 Kobe Steel, Ltd. Copper alloy for electrical or electronic parts
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EP1078995A1 (en) * 1999-08-25 2001-02-28 Kabushiki Kaisha Kobe Seiko Sho Copper alloy for electrical or electronic parts
FR2809419A1 (en) * 2000-05-25 2001-11-30 Kobe Steel Ltd COPPER ALLOY FOR USE IN ELECTRICAL AND ELECTRONIC PARTS
JP2003068949A (en) * 2001-08-23 2003-03-07 Dowa Mining Co Ltd Heat sink, power semiconductor module, IC package
FR2865478A1 (en) * 2004-01-23 2005-07-29 Kobe Steel Ltd Copper alloy with high mechanical strength and high conductivity for use as the conducting frame of an integrated circuit of a semiconductor device and other electric and electronics components
FR2880358A1 (en) * 2005-01-06 2006-07-07 Trefimetaux Copper alloy containing iron and phosphorus in low quantities for use in electronic applications, notably power transistor circuits
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KR20170125987A (en) * 2015-03-27 2017-11-15 가부시키가이샤 고베 세이코쇼 Copper alloy plate and heat dissipation parts for heat dissipation parts
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