JPH0828370B2 - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPH0828370B2 JPH0828370B2 JP27863087A JP27863087A JPH0828370B2 JP H0828370 B2 JPH0828370 B2 JP H0828370B2 JP 27863087 A JP27863087 A JP 27863087A JP 27863087 A JP27863087 A JP 27863087A JP H0828370 B2 JPH0828370 B2 JP H0828370B2
- Authority
- JP
- Japan
- Prior art keywords
- region
- avalanche diode
- power transistor
- collector
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000004065 semiconductor Substances 0.000 title claims description 4
- 239000000758 substrate Substances 0.000 claims description 2
- 230000015556 catabolic process Effects 0.000 description 5
- 230000005684 electric field Effects 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 1
- 230000006378 damage Effects 0.000 description 1
Landscapes
- Bipolar Transistors (AREA)
- Bipolar Integrated Circuits (AREA)
Description
【発明の詳細な説明】 産業上の利用分野 本発明は、アバランシェダイオードを内蔵したパワー
トランジスタに関し、特に高耐圧のアバランシェダイオ
ードの形成方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power transistor including an avalanche diode, and more particularly to a method of forming a high breakdown voltage avalanche diode.
従来の技術 従来、アバランシェダイオードを一半導体基板内に形
成する場合、コレクタ領域と同導電型の高濃度領域をベ
ース領域を囲むようにしてリング状に形成していた。第
3図は従来例のアバランシェダイオードを形成したパワ
ートランジスタの平面図であり、第4図は第3図のA−
A′線に沿う断面図である。図中において、1はコレク
タ領域、2はベース領域、3はエミッタ領域、4はベー
ス電極、5はエミッタ電極、6はコレクタ電極、7は絶
縁膜、8はチャンネルストッパー、9はコレクタ領域と
同導電型の高濃度領域である。2. Description of the Related Art Conventionally, when an avalanche diode is formed in one semiconductor substrate, a high concentration region of the same conductivity type as the collector region is formed in a ring shape so as to surround the base region. FIG. 3 is a plan view of a power transistor in which a conventional avalanche diode is formed, and FIG. 4 is A- of FIG.
It is sectional drawing which follows the A'line. In the figure, 1 is a collector region, 2 is a base region, 3 is an emitter region, 4 is a base electrode, 5 is an emitter electrode, 6 is a collector electrode, 7 is an insulating film, 8 is a channel stopper, and 9 is the same as the collector region. This is a conductive high concentration region.
発明が解決しようとする問題点 しかしながら、この従来例によるとコレクタ領域と同
導電型の高濃度領域のコーナー部において電界集中が高
くなり、破壊現象が見られていた。However, according to this conventional example, the electric field concentration becomes high at the corner portion of the high-concentration region of the same conductivity type as the collector region, and the destruction phenomenon has been observed.
問題点を解決するための手段 そこで、本発明は、ベース領域の周辺にコレクタ領域
と同導電型の高濃度領域を複数個、周辺に分割配設した
ものである。Therefore, according to the present invention, a plurality of high-concentration regions of the same conductivity type as the collector region are separately arranged around the base region.
作用 これによって、高濃度領域のコーナー部を無くし電界
集中を緩和させ、アバランシェダイオードを内蔵したパ
ワートランジスタの破壊耐量エネルギーES/Bを大きく
することができる。By this, the corner portion of the high-concentration region can be eliminated to alleviate the electric field concentration, and the breakdown withstand energy E S / B of the power transistor including the avalanche diode can be increased.
実施例 第1図は本発明実施例のアバランシェダイオードを形
成したパワートランジスタの平面図であるが、従来例の
第2図と対応させた図であるから説明を省略する。Embodiment FIG. 1 is a plan view of a power transistor in which an avalanche diode of an embodiment of the present invention is formed. However, since it is a drawing corresponding to FIG. 2 of a conventional example, its explanation is omitted.
第2図は本発明実施例と従来例とで形成されたアバラ
ンシェダイオードを内蔵したパワートランジスタに電圧
Vを印加して破壊させたときの印加電圧VS/Bを縦軸に
とって比較したものである。このときコンデンサーとし
てC=1200pFのものを用いた。FIG. 2 is a comparison of the applied voltage V S / B when the voltage V is applied to the power transistor including the avalanche diode formed in the embodiment of the present invention and the conventional example to break the power transistor. . At this time, a capacitor having C = 1200 pF was used.
発明の効果 このように、パワートランジスタの破壊耐量エネルギ
ーES/BはES/B=1/2C▲V2 S/B▼で表わされることによ
り、本発明実施例のアバランシェダイオードを内蔵した
パワートランジスタの方が、従来例のアバランシェダイ
オードを内蔵したパワートランジスタよりも破壊耐量エ
ネルギーES/Bを大きくできることがわかる。Effect of the Invention As described above, the breakdown withstand energy E S / B of the power transistor is represented by E S / B = 1 / 2C ▲ V 2 S / B ▼, so that the power including the avalanche diode of the embodiment of the present invention is incorporated. It can be seen that the transistor can have a higher breakdown withstand energy E S / B than the power transistor including the avalanche diode of the conventional example.
第1図は本発明実施例のアバランシェダイオードを形成
したパワートランジスタの平面図、第2図は実施例と従
来例とのアバランシェダイオードを形成させたパワート
ランジスタの破壊電圧VB/Sを比較した特性図、第3図
は従来例のアバランシェダイオードを形成したパワート
ランジスタの平面図、第4図は第3図のA−A′線に沿
う断面図である。 1……コレクタ領域、2……ベース領域、3……エミッ
タ領域、4……ベース電極、5……エミッタ電極、6…
…コレクタ電極、7……絶縁膜、8……チャンネルスト
ッパー、9……コレクタ領域と同導電型の高濃度領域。FIG. 1 is a plan view of a power transistor formed with an avalanche diode according to an embodiment of the present invention, and FIG. 2 is a characteristic comparing breakdown voltage V B / S of a power transistor formed with an avalanche diode between the embodiment and a conventional example. 3 and 4 are plan views of a power transistor having a conventional avalanche diode formed therein, and FIG. 4 is a sectional view taken along the line AA 'in FIG. 1 ... Collector region, 2 ... Base region, 3 ... Emitter region, 4 ... Base electrode, 5 ... Emitter electrode, 6 ...
... collector electrode, 7 ... insulating film, 8 ... channel stopper, 9 ... high-concentration region of the same conductivity type as the collector region.
フロントページの続き (51)Int.Cl.6 識別記号 庁内整理番号 FI 技術表示箇所 H01L 23/60 23/62 27/06 29/73 29/866 H01L 29/90 D Continuation of the front page (51) Int.Cl. 6 Identification code Office reference number FI Technical display location H01L 23/60 23/62 27/06 29/73 29/866 H01L 29/90 D
Claims (1)
域およびエミッタ領域を有するトランジスタにおいて、
ベース領域周辺のコレクタ領域に同コレクタ領域と同一
導電型の高濃度領域を前記ベース領域を囲むようにして
複数個、分割して配設したことを特徴とする半導体装
置。1. A transistor having a collector region, a base region and an emitter region in one semiconductor substrate,
A semiconductor device, wherein a plurality of high-concentration regions of the same conductivity type as the collector region are provided in the collector region around the base region in a divided manner so as to surround the base region.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP27863087A JPH0828370B2 (en) | 1987-11-04 | 1987-11-04 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP27863087A JPH0828370B2 (en) | 1987-11-04 | 1987-11-04 | Semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH01120865A JPH01120865A (en) | 1989-05-12 |
JPH0828370B2 true JPH0828370B2 (en) | 1996-03-21 |
Family
ID=17599954
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP27863087A Expired - Lifetime JPH0828370B2 (en) | 1987-11-04 | 1987-11-04 | Semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0828370B2 (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
SE524498C2 (en) | 2002-09-18 | 2004-08-17 | Inter Ikea Systems Bv | Load bar and system for forming loading units |
-
1987
- 1987-11-04 JP JP27863087A patent/JPH0828370B2/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JPH01120865A (en) | 1989-05-12 |
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