JP3297087B2 - High voltage semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high withstand voltage semiconductor device, and more particularly to a high withstand voltage semiconductor device having no sufficient pn junction at a junction termination.

[0002]

2. Description of the Related Art A power element is used for current amplification, a power supply device, electric control, and the like, and is designed to have a high breakdown voltage and a large current operation.

In order to increase the breakdown voltage, for example, in the case of a bipolar transistor, there is a method in which the collector low impurity concentration layer is made thick and high in resistance to increase the breakdown voltage, and the base layer is made large to prevent punch punch through. However, this type of technique is incompatible with increasing the current and increasing the speed, so that an optimal trade-off design is made according to the purpose of use of the transistor.

In order to increase the breakdown voltage, techniques such as a field plate and a guard ring have been used.

As shown in FIG. 9A, the field plate is formed by connecting a base electrode 81 to an upper portion 8 of an n-type collector layer 82.
3, the depletion layer 84 is extended to the upper portion 83 of the n-type collector layer 82, and the pn junction between the p-type base layer 85 and the n-type collector layer 82, that is, the depletion layer electric field at the junction termination is alleviated. Prevent electric field concentration. In the drawing, reference numeral 86 denotes an n-type emitter layer, and 87 denotes an oxide film.

As shown in FIG. 9B, one or several floating guard rings 88 are provided around the p-type base layer 85 to reduce the electric field in the depletion layer at the junction termination.

However, such a technique for increasing the breakdown voltage has the following problems.

That is, a power element whose main junction is not a pn junction, for example, a Schottky barrier diode, U
In a junction termination part such as a MOS, a buried gate structure MOS thyristor, or a buried gate structure IGBT, it is necessary to form a sufficient pn junction required for increasing the breakdown voltage separately from the main steps of the device. In the case of a substrate made of a material such as Si which is relatively easy to diffuse impurities, it is possible to form a pn junction separately from the element portion, but it is possible to form a compound semiconductor such as SiC or diamond such as diamond. In the case of a substrate made of a material which is difficult to diffuse impurities, it is difficult to use a conventional method of increasing the breakdown voltage on the assumption of a pn junction.

[0009]

As described above, in the conventional method for increasing the breakdown voltage of a semiconductor power element, the junction termination portion is pn.
This was based on the assumption of joining. For this reason, there is a problem that it is difficult to increase the breakdown voltage of the semiconductor power element in the case of a substrate having a small diffusion coefficient without a sufficient pn junction at the junction termination.

The present invention has been made in view of the above circumstances, and an object thereof is to provide a structure in which a sufficient p is provided at the end of the junction.
An object of the present invention is to provide a high withstand voltage semiconductor device having a structure capable of realizing a high withstand voltage even without an n-junction.

[0011]

In order to achieve the above object, a high breakdown voltage semiconductor device of the present invention is formed on a semiconductor substrate and has a trench structure.
A depletion layer extends from the junction between the structure and the semiconductor substrate, and
A region where the main current of the high-voltage semiconductor element <br/> element breakdown voltage of the blocking state is determined by the depletion layer flows, the main current flows electrode while being formed so as to surround a region where the main current flows
It is characterized by having a plurality of unformed grooves therein and a junction termination region not including a pn junction for improving withstand voltage.

Note that the junction termination region is a region other than the region where the main current of the element flows, and has a structure for increasing the breakdown voltage.

[0013]

According to the present invention, the concentration of the depletion layer electric field at the junction termination portion is reduced by the groove provided in the junction termination region and electrically separated from the electrode through which the main current flows. For this reason, even if there is no pn junction at the junction termination, a high breakdown voltage can be achieved.

[0014]

Embodiments will be described below with reference to the drawings.

FIG. 1 is a plan view of a high breakdown voltage semiconductor device according to a first embodiment of the present invention.

In FIG. 1, reference numeral 1 denotes a region where the main current of the element flows, and region 3 around the main current region 1 denotes a junction termination region. A plurality of ring-shaped grooves 2 are formed concentrically with the main current region 1 inside the junction termination region 3. The number of grooves is determined according to the required withstand voltage and the like, and may be one.

FIG. 2 is a more detailed view of a region surrounded by a dashed line in FIG. 1, FIG. 2 (a) is a plan view, and FIG. 2 (b)
FIG. 2 is a sectional view taken along line AA ′ of FIG.

In FIG. 1, reference numeral 10 denotes a low-concentration n-type SiC substrate. On the surface of the main current region 1 of the n-type SiC substrate 10, a groove 4 whose inner surface is covered with a SiO ₂ film 5 is formed. Have been. Note that the SiO ₂ film 5 is not formed on the surface of the n-type SiC substrate between the two grooves 4. The inside of the groove 4 is filled with a metal material, and the two grooves 4 are connected by this metal material.

That is, the anode electrode 6 is formed in contact with the electrodes formed in the two grooves 4 filled with the metal material, and the anode electrode 6 and the n-type SiC substrate 10 are formed.
A Schottky barrier diode is formed by the Schottky junction with this. The electrode through which the main current of the Schottky barrier diode flows is the anode electrode 6.

On the other hand, the groove 2 in the junction termination region 3 is similarly covered with an SiO ₂ film 5 on its inner surface, filled with a metal material, and the two grooves 2 are connected with the metal material.

That is, one electrode 7 having a floating potential is formed for each two grooves 2.

On the back surface of the n-type SiC substrate 10, a cathode electrode 9 is provided via a contact layer 8 made of a high-concentration n-type semiconductor film. No main current flows through the cathode electrode 9.

When a high reverse bias voltage is applied to such a high breakdown voltage semiconductor device comprising a Schottky barrier diode, a large depletion layer is formed in the n-type SiC substrate 10, and a high electric field is generated.

Here, if there is no groove 2, all lines of electric force of each potential are concentrated on the lower end portion 11 of the anode electrode 6, and the element is destroyed.

On the other hand, when the grooves 2 are provided as in the present embodiment, the lines of electric force having the same potential are gathered for each pair of grooves, and the electric potential of the pair of grooves farther from the anode electrode 11 is higher. Force lines gather. As a result, the electric field intensity on the surface of the substrate is reduced, and destruction of the element can be prevented.

Thus, according to the present embodiment, a semiconductor substrate made of a material which is difficult to diffuse impurities, such as SiC, is used.
Even if there is no pn junction at the junction termination, the junction termination region 3
The trench 2 formed electrically and separated from the anode electrode 11 can reduce the depletion layer electric field at the junction and prevent the element from being broken due to electric field concentration.

FIG. 3 is an element sectional view showing the structure of a high breakdown voltage semiconductor device according to a second embodiment of the present invention. In the following, portions corresponding to the high-breakdown-voltage semiconductor device in the above-described drawings are denoted by the same reference numerals as those in the above-described drawings, and detailed description thereof will be omitted.

The high voltage semiconductor device of this embodiment is different from that of the previous embodiment in that an electrode 7 having a floating potential in the junction termination region 3 is connected to a cathode electrode 9 via a resistor 12.
That is, the potential of the electrode 7 is fixed.

In the high breakdown voltage semiconductor device constructed as described above, the same effect as that of the previous embodiment can be obtained, and in this embodiment, the potential of the electrode 7 is between the anode potential and the cathode potential. Since the electric field lines having a larger electric potential can be surely collected in the pair of grooves 2 farther from the anode electrode 6, an electric field distribution capable of relaxing the electric field of the depletion layer can be surely formed.

If the electric potential of the electrode 7 floating at the electric potential is not fixed as in the previous embodiment, the electric field distribution formed by the groove 2 changes when electric charges are accumulated in the electrode 7,
This is because the electric field of the depletion layer at the junction termination may be increased.

Incidentally, a capacitor or the like may be used instead of the resistor 12.

FIG. 4 is a plan view of a high withstand voltage semiconductor device according to a third embodiment of the present invention. FIG. 5 is a more detailed view of a region surrounded by a dashed line in FIG.
5A is a plan view, and FIG. 5B is a cross-sectional view taken along line BB ′ of FIG. 5A.

The high voltage semiconductor device of the present embodiment is different from that of the previous embodiments in that an intermittent ring-shaped groove 2a is used instead of a continuous ring-shaped groove around the main current region 1.
Has been established.

Even with such a configuration, the same effect as that of the previous embodiment can be obtained. The electrode 7a having a floating potential may be fixed as shown in FIG. Instead of the ring shape, the grooves 2a may be provided in a scattering manner.

FIG. 6 is a sectional view of a high withstand voltage semiconductor device according to a fourth embodiment of the present invention.

The difference between the high breakdown voltage semiconductor device of the present embodiment and the previous embodiment is that one floating electrode 7b is provided in one groove 2b and the floating electrode 7b is arranged in a lateral direction from the groove 2b. It has been drawn to.

In the high breakdown voltage semiconductor device configured as described above, since the electrode 7b functions as a field plate, higher relaxation of the depletion layer electric field can be expected as compared with the previous embodiment.

FIG. 7 is a sectional view of a high breakdown voltage semiconductor device according to a fifth embodiment of the present invention.

In the figure, reference numeral 31 denotes a low-concentration n-type SiC substrate, and an anode electrode 33 is provided on the back surface thereof via a contact layer 32 made of a p-type semiconductor.

On the lower surface of the n-type SiC substrate 31, SiO
An insulating film 34 such as _two films is embedded. A gate electrode 36 embedded in an insulating layer 35 is provided on the n-type SiC substrate 31 in the main current region 1, and a cathode electrode 37 is provided in contact with the n-type SiC substrate 31.
A Schottky junction is formed between the cathode electrode 37 and the n-type SiC substrate 31, and a Schottky barrier diode is formed as in the previous embodiment.

On the other hand, the n-type SiC substrate 3 in the junction termination region 3
An insulating film 38 is provided on 1, and the insulating film 38 is covered with an electrode 39 having a floating potential. The electrodes 39 having the floating potential are electrically separated from each other by the insulating layer 40.

The boundary between the main current region 1 and the junction termination region 3 may share the gate electrode 36a and the insulating layer 35a.

When a high reverse bias voltage is applied to the high breakdown voltage semiconductor device thus configured, the insulating film 38 on the substrate surface in the junction termination region 3 and the two insulating films 3 in the substrate
A set of insulating films consisting of the same functions as the pair of grooves in the previous embodiment.

As a result, the electric field in the depletion layer at the junction termination can be alleviated, and element destruction due to electric field concentration can be prevented. Although the insulating film 34 in the main current region may not be provided, the effect of reducing the electric field of the depletion layer becomes higher when the insulating film 34 is provided.

[0045]

[0046]

[0047]

[0048]

The present invention is not limited to the embodiment described above. For example, in the above embodiment, there is an embodiment in which one floating electrode is provided for every two grooves. However, one floating electrode is provided for every three, four or more grooves. May be.

In addition, floating electrodes having different numbers of grooves may be mixed, such as an electrode having one floating potential every two grooves and an electrode having one floating potential every three grooves. .

In the above embodiment, the groove is filled with a metal material. However, a conductive material other than metal or an insulating material may be used.

Further, the above embodiments may be appropriately combined. For example, grooves are formed intermittently (scattered) at corners of the main current region, and continuous grooves are formed at other portions. This is particularly effective when the curvature of the corner is large. This is because if there is a portion having a large curvature, it is difficult to form a continuous ring-shaped groove. Moreover, you may combine with a prior art. In addition, the present invention is particularly effective for those which hardly diffuse impurities such as SiC and diamond, but may be Si or the like.

In addition, various modifications can be made without departing from the spirit of the present invention.

[0054]

As described in detail above, according to the present invention, the withstand voltage is sufficiently high even when there is no pn junction at the junction termination or when a substrate having a small diffusion coefficient is difficult to form a pn junction. A high breakdown voltage semiconductor device is obtained.

[Brief description of the drawings]

FIG. 1 is a plan view of a high breakdown voltage semiconductor device according to a first embodiment of the present invention.

FIG. 2 is a more detailed view of a region surrounded by a dashed line in FIG. 1;

FIG. 3 is a sectional view of a high breakdown voltage semiconductor device according to a second embodiment of the present invention.

FIG. 4 is a plan view of a high breakdown voltage semiconductor device according to a third embodiment of the present invention.

FIG. 5 is a more detailed view of a region surrounded by a dashed line in FIG. 4;

FIG. 6 is a sectional view of a high breakdown voltage semiconductor device according to a fourth embodiment of the present invention.

FIG. 7 is a sectional view of a high withstand voltage semiconductor device according to a fifth embodiment of the present invention.

FIG. 8 is a sectional view of a high breakdown voltage semiconductor device according to a sixth embodiment of the present invention.

FIG. 9 is a view for explaining a conventional method for increasing the breakdown voltage.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Main current area, 2, 2a ... Groove, 3 ... Junction termination area, 4
... groove, 5 ... SiO ₂ film, 6 ... anode electrode, 7, 7a ...
Electrode with floating potential, 8 contact layer, 9 cathode electrode, 10 n-type SiC substrate, 12 resistor, 31 n-type SiC substrate, 32 contact layer, 33 anode electrode, 34 insulating film, 35 ... insulating layer, 36 ... gate electrode,
37: a cathode electrode; 38, an insulating film; 39, an electrode with a floating potential; 40, an insulating layer; 41, a p-type semiconductor layer.

──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-63-53969 (JP, A) JP-A-53-20869 (JP, A) JP-A-58-100454 (JP, A) 105383 (JP, A) JP-A-51-35286 (JP, A) JP-A-62-18768 (JP, A) JP-A-4-29368 (JP, A) JP-A-4-239778 (JP, A) JP-A-5-190831 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H01L 21/331 H01L 29/06 301 H01L 29/73 H01L 29/74

Claims (6)

(57) [Claims] 1. A semiconductor device having a trench structure formed on a semiconductor substrate.
And in the blocking state, the trench structure and the semiconductor substrate
A depletion layer extends from the junction and is blocked by the depletion layer
A region in which the main current of the high breakdown voltage semiconductor element in which the breakdown voltage is determined, and a plurality of grooves formed therein so as to surround the region in which the main current flows and in which the electrodes through which the main current flows are not formed , And a junction termination region that does not include a pn junction for improving withstand voltage. 2. A semiconductor device having a trench structure formed on a semiconductor substrate.
And in the blocking state, the trench structure and the semiconductor substrate
A depletion layer extends from the junction and is blocked by the depletion layer
A region in which a main current of the high breakdown voltage semiconductor element in which the breakdown voltage is determined, a main electrode formed in the region where the main current flows, a plurality of grooves formed so as to surround the region in which the main electrode flows, A junction termination region having a plurality of electrodes formed in a plurality of grooves and electrically separated from the main electrode and separated from each other, and not including a pn junction for improving withstand voltage; A high withstand voltage semiconductor device characterized by being formed. 3. A trench formed in a semiconductor substrate made of SiC and having a trench structure, wherein said trench structure is in a blocking state.
A depletion layer extends from the junction between
A region where the main current of the high breakdown voltage semiconductor element whose breakdown voltage in the blocking state is determined by the poor layer flows, and a plurality of trenches formed so as to surround the region where the main current flows and where no electrode through which the main current flows are formed. A high-voltage semiconductor device, comprising: a junction termination region that is internally provided and does not include a pn junction for improving withstand voltage. 4. A trench formed in a semiconductor substrate made of SiC and having a trench structure, wherein said trench structure is formed in a blocking state.
A depletion layer extends from the junction between
A region where the main current of the high breakdown voltage semiconductor element whose breakdown voltage in the blocking state is determined by the poor layer flows, a main electrode formed in the region where the main current flows, and a groove formed so as to surround the region where the main electrode flows ,
A high-voltage semiconductor device, comprising: a junction termination region formed in the groove and separated from the main electrode and not including a pn junction for improving withstand voltage. . 5. The high breakdown voltage semiconductor device according to claim 4 , wherein said groove comprises a plurality of grooves, and said electrode separated from said main electrode comprises a plurality of electrodes separated from each other. 6. The device according to claim 1, wherein the plurality of electrodes are electrodes having a floating potential or electrodes connected to each other via a resistor and electrically connected to the main electrode. Item 6. A high withstand voltage semiconductor device according to item 2 or 5.