JPH08271580A - Method for testing bare chip - Google Patents

Abstract

PURPOSE: To obtain a method for testing a bare chip in which a bare chip IC can be fixed without requiring a vacuum pump while eliminating the cleaning process. CONSTITUTION: Resin is applied to the surface part 11a of an IC 11 except the part of IC pad 12 thus forming a protective layer 16. The IC 11 applied with the protective layer 16 is mounted on a test board 14 and pressed by an IC press board 17 through the protective layer 16. It is then secured to the test board 14 by means of IC press board securing screws 18 thus carrying out screening test at the actual operation speed level.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a bare chip test method, and more particularly to a temporary encapsulation package (Temporary Packaging).
The present invention relates to a test method for performing a bare chip screening test using the above technology.

[0002]

2. Description of the Related Art As a bare chip test method, a method using a flying probe is generally known. The test method using the flying probe cannot test at the actual operation speed level of the IC because of the influence of the inductance of the probe. As one of the solutions, the test method using the technology of the temporary encapsulation package is described in the document "Screening IC's on the Bare Chip Level: Te.
mporary Packaging (IEEE TRANSACTIONS ON COMPONENTS, H
YBRIDS, AND MANUFACTURING TECHNOLOGY.VOL.16, NO.4, JU
NE 1993) ".

In order to realize the test method using this temporary sealing package technology, as shown in the sectional structure of the test apparatus in FIG. 3, first, an IC mounting area 36a of the test board 36 is made of a thermoplastic material. The adhesive 35 is applied, the IC 31 is mounted thereon, and the adhesive 35 is temporarily fixed. After that, the IC pad 32 and the W / B (wire bonding) pad 34 provided on the test board 36 are connected by the wire 33. In that state, test board 3
The test board external terminal 37 of No. 6 is mounted on the tester pad 39 of the tester 38. Then, the IC test is executed at the actual operation speed level. After the test, wire 33
Then, the IC 31 die-bonded with the adhesive 35 is removed to release the temporarily fixed state. After that, cleaning is performed to remove the adhesive 35 attached to the back surface of the IC 31. Through these steps, a bare chip IC alone is secured.

[0004]

However, in the above-mentioned conventional test method, the test board 36 of the IC 31 is used.
Since it is fixed by the die bond with the adhesive 35,
When C31 is removed from the test board 36, IC3
Since a cleaning process for removing the adhesive 35 attached to the back surface of No. 1 is required, the number of processes increases, the test man-hour increases, the yield decreases due to cleaning, and the adhesive 35 is removed only by cleaning. There was a problem that it was difficult to completely remove it.

Further, as another conventional example, there is a test method using suction fixation by a vacuum pump. That is, as shown in the sectional structure of the test apparatus in FIG.
By preparing a test board 45 having an air intake through hole 49 opening in the C mounting area 45a, mounting the IC 41 in the IC mounting area 45a, and then sucking with a vacuum pump 50 from the back side of the test board 45. The IC 41 is temporarily fixed to the test board 45. afterwards,
The W / B pad 44 provided on the test board 45 and the IC pad 22 are connected by the wire 43. In that state,
The test board external terminal 46 of the test board 45 is mounted on the tester pad 48 of the tester 47. Then, the IC test is executed at the actual operation speed level. After the test is completed, the wire 43 is removed, the suction by the vacuum pump 50 is stopped, and the temporarily fixed state of the IC 41 is released. Through these steps, a bare chip IC alone is secured.

However, in the latter test method, in order to fix the IC 41 to the test board 45 by sucking with the vacuum pump 50, it is necessary to provide the air suction through hole 49 in the IC connection region of the test board 45. ,
There is a problem that the wiring area of the test board 45 is limited, and further, the mounting condition of the tester 47 is restricted by disposing the vacuum pump 50.

[0007]

In order to solve the above problems, in the bare chip test method according to the present invention, a protective layer is formed on the surface of the bare chip IC excluding the pad portion, and the bare chip IC on which the protective layer is formed is formed. Is mounted on the test board and fixed to the test board while pressing it through the protective layer, then the pad portion of the bare chip IC is electrically connected to the test board, and then the external terminals of the test board are connected. The bare chip IC is tested by electrically connecting to the tester.

[0008]

In the bare chip test method described above, by forming a protective layer on the surface of the bare chip IC excluding the pad portion, it is possible to protect the IC surface where the pattern wiring and the like are exposed, and press through this protective layer. Thus, the bare chip IC can be temporarily fixed on the test board. Also, since the pad portion of the bare chip IC is exposed, it can be electrically connected to the test board. After this electrical connection is completed, the external terminals of the test board are electrically connected to the tester, so that the bare chip IC can be tested.

[0009]

Embodiments of the present invention will now be described in detail with reference to the drawings. FIG. 1 is a sectional view showing an embodiment of a test apparatus to which the bare chip test method according to the present invention is applied, and FIG. 2 is a plan view of the main part thereof. In these figures, a bare chip IC (hereinafter, simply referred to as an IC) 11 has a plurality of IC pads 12 arranged on one side at the peripheral portion of its surface. In performing the screening test of the IC 11, the IC 11 is an IC mounting cavity 14 a formed on the upper surface of the test board 14.
Installed inside.

When the IC 11 is mounted on the test board 14, a protective layer 16 is formed on the surface 11a of the IC 11 excluding the IC pad 12 by applying a buffer material such as resin. Then, as is clear from FIG. 2, the IC 11 having the protective layer 16 formed thereon is temporarily fixed to the test board 14 using the IC holding plate 17 having the W / B mounting area window 17a formed therein. Specifically, the protective layer 16 is provided in the central region of the IC pressing plate 17.
While pressing the IC 11 through the IC holding plate 17, the IC holding plate fixing screws 18 are attached to the test board 14 at four corners of the IC holding plate 17, for example.
By tightening the IC11 to the test board 14
Crimped and fixed against.

As the means for crimping and fixing the IC 11 to the test board 14, in this embodiment, the IC holding plate 17 having the W / B mounting area window 17a and the IC holding plate fixing screw 18 are used. However, the present invention is not limited to this, and the point is that the IC 11 can be pressure-bonded and fixed to the test board 14 while pressing the IC 11 through the protective layer 16 formed on the surface of the IC 11 while avoiding the IC pad 12. I wish I had it.

W / B mounting area window 17 of IC pressing plate 17
In a, the portion of the IC pad 12 of the IC 11 that is pressure-bonded and fixed on the test board 14 and the portion of the W / B pad 15 provided on the test board 14 are exposed, and the IC holding plate 1
It is formed so that the central region of 7 remains. Therefore, through the W / B mounting area window 17a, the IC 11
IC pad 12 and W / B pad 1 of test board 14
It is possible to make an electrical connection with the wire 5 by the wire 13. When this electrical connection is completed, the test board external terminal 19 provided on the back surface of the test board 14 and electrically connected to the W / B pad 15 is electrically connected to the tester pad 21 of the tester 20. It will be installed in the closed condition. This enables the screening test at the actual operation speed level of the IC 11.

Next, the procedure of the bare chip test method according to the present invention using the test apparatus having the above configuration will be described. First, prior to the screening test, IC11
The protective layer 16 is formed by applying a resin or the like to the surface portion 11a except the portion of the IC pad 12. Then, the IC 11 provided with the protective layer 16 is attached to the test board 1
The IC holding plate 17 mounted in the IC mounting cavity 14a formed on the upper surface of the No. 4 and having the W / B mounting area window 17a formed is used, and the IC 11 is provided in the central region with the protective layer 16 interposed therebetween. While pressing, the IC 11 is pressure-bonded to the test board 14 by the IC pressing plate fixing screw 18 and temporarily fixed.

When the fixing of the IC 11 to the test board 14 is completed, the W / B mounting area window 17a of the IC pressing plate 17 is completed.
Through IC pad 12 of IC 11 and test board 14
The W / B pad 15 of is electrically connected by the wire 13. Then, the test board 14 is mounted on the tester 20, and the test board external terminals 19 provided on the back surface of the test board 14 are electrically connected to the tester pads 21 of the tester 20.
Then, the tester 20 executes a screening test at the actual operation speed level of the IC 11. When the test is completed, loosen the IC retainer plate fixing screw 18 and remove the IC retainer plate 1
7 is removed, and the temporarily fixed state of the IC 11 is released. Through these steps, a bare chip IC alone is secured.

As described above, the IC pad 1 of the IC 11
The protective layer 16 is formed on the surface portion 11a except the portion 2, and the IC 11 provided with the protective layer 16 is mounted on the test board 14 and pressure-bonded to the test board 14 while pressing through the protective layer 16. By fixing and carrying out the screening test, it becomes possible to carry out the screening test without performing die bonding of the IC 11 or using a vacuum pump as in the conventional case. Therefore, since it is not necessary to clean the IC 11 after the test is completed, the number of test steps can be reduced by reducing the cleaning process, and the yield does not decrease due to cleaning. Further, since the vacuum pump is not necessary, the wiring area of the test board 14 is not restricted and the mounting conditions of the tester 20 are not restricted. Furthermore, IC
By providing the protective layer 16 on the surface of 11 with a material having a buffer property such as resin, the surface of the IC 11 can be protected from damage and the like, so that there is an advantage that the IC 11 can be easily handled.

In the above embodiment, the protective layer 16 is formed of a resin having a buffer property, but the protective layer 16 is formed by applying a material having thermal conductivity such as a thermally conductive resin. On the other hand, the IC holding plate 17 is made of a metal member, and the metal IC holding plate 17 is made of metal.
By pressing the IC 11 through the protective layer 16 having thermal conductivity and pressing and fixing it to the test board 14, the heat generated by the IC 11 is transferred through the protective layer 16 to the IC.
Since the IC holding plate 17 is conducted to the holding plate 17 and acts as a heat sink, the heat dissipation of the IC 11 can be improved.
As a result, it can be applied to a bare chip test of a high power type IC without taking heat dissipation measures.

[0017]

As described above, according to the present invention,
A bare chip IC is formed by forming a protective layer on the surface excluding the pad portion of the bare chip IC, mounting the bare chip IC on the test board, and fixing the bare chip IC to the test board while pressing it through the protective layer. Since the test can be performed without performing die bonding of the bare chip IC or using a vacuum pump as in the conventional case, the number of test steps can be reduced by reducing the cleaning process. The problem of reduction in yield due to cleaning can be solved, and since the vacuum pump is not necessary, the wiring area of the test board is not restricted and the mounting conditions of the tester are not restricted.

[Brief description of drawings]

FIG. 1 is a sectional view showing an embodiment of a test apparatus to which a bare chip test method according to the present invention is applied.

FIG. 2 is a plan view of a main part of FIG.

FIG. 3 is a cross-sectional view showing a test device according to a conventional example.

FIG. 4 is a cross-sectional view showing a test apparatus according to another conventional example.

[Explanation of symbols]

 11 Bare Chip IC 13 Wire 14 Test Board 16 Protective Layer 17 IC Holding Plate 18 IC Holding Plate Fixing Screw 20 Tester

Claims (2)

[Claims] 1. A protective layer is formed on the surface of the bare chip IC excluding the pad portion, the bare chip IC having the protective layer formed thereon is mounted on a test board, and the bare chip IC is pressed onto the test board while being pressed through the protective layer. Then, the pad portion of the bare chip IC is electrically connected to the test board, and then the external terminal of the test board is electrically connected to the tester to test the bare chip IC. A bare chip test method characterized by being performed. 2. The bare chip test method according to claim 1, wherein the protective layer is made of a heat conductive material, and the protective layer is pressed via a metallic member.