JPH08119553A - Elevator control equipment - Google Patents

Abstract

PURPOSE: To highly precisely detect abnormality, to improve service and to secure safety by mutually monitoring a plural number of clocks used for control of an elevator with each other and detecting abnormality. CONSTITUTION: A 20MHz clock for formation of a clock for a microcomputer and a clock for communication and a 16MHz clock for formation of a clock for speed detection and the clock for communication are used for an elevator control device. Each of the clocks is formed by dividing the 20MHz clock and the 16MHz clock by a dividing circuit 1. As all the earlier clocks are thought to be normal if the last divided clock is normal, the last divided clock is detected by a clock abnormality detection circuit 2 by using one of the other clocks. When the divided clock is abnormal, clock abnormality is output. Consequently, highly precise detection is possible as it is detected by a digital circuit. Additionally, as a circuit for clock abnormality detection is not specially provided, it is possible to improve productivity.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a control device for an elevator that controls using a plurality of clocks.

[0002]

2. Description of the Related Art Conventionally, as a method for detecting a clock abnormality, for example, there is a watch dog timer described in the December 1989 issue of transistor technology. In addition, JP-A-53-89
Japanese Patent Publication No. 149 discloses an elevator counting device that counts up with a clock and generates an output when it becomes equal to a preset value.

However, according to this method, there is a problem that the watchdog timer or the counting device at the time of clock loss does not operate normally and does not satisfy the function.

[0004]

Various clocks are used in elevator controllers. For example, a speed detection clock used in a circuit that detects the speed of the elevator by counting the number of pulses obtained each time the elevator moves a certain distance, or for communication with hall calls, car calls, elevator monitoring devices, etc. Clocks of various frequencies are used as clocks used for elevator control devices such as various communication clocks used. One of the objects of the present invention is to improve service and ensure safety.

Another object of the present invention is to perform highly accurate detection. Another object of the present invention is to provide an elevator control device which is capable of detecting a clock abnormality without providing a dedicated clock abnormality detection circuit and which is excellent in reliability and productivity.

[0006]

In order to achieve the above object, a plurality of clocks used for controlling an elevator are mutually monitored to detect an abnormality.

[0007]

Various clocks are used to control the elevator, and the abnormal clock can be specified by detecting the abnormality of the clock with another clock.

[0008]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a case where an embodiment of the present invention is applied to an elevator will be described in detail with reference to the drawings.

FIG. 1 shows an embodiment of the present invention. In the figure, 1 is a frequency divider circuit, 2 is a clock abnormality detection circuit, and 3 and 4
Is an internal circuit of 2, 3 is a flip-flop, and 4 and 5 are counters.

The operation of FIG. 1 will be described below.

In FIG. 1, a microcomputer clock, a 20 MHz clock for creating a communication clock, and a 16 MHz clock for creating a speed detecting clock and a communication clock are used in an elevator controller. Each clock is generated by dividing the frequency from the 20 MHz clock and the 16 MHz clock by the frequency dividing circuit 1. If the last divided clock is normal, all the previous clocks are considered to be normal. Therefore, the last divided clock is detected by the clock abnormality detection circuit 2 using the other clock. If the divided clock is abnormal, a clock error is output.

Next, FIG. 2 will be described.

This figure is a detailed circuit of the clock abnormality detection circuit 2, which includes a flip-flop 3, a counter 4, 5, and an OR circuit 6.
Consists of

First, in the flip-flop 3, the divided clock is input to the D of the flip-flop 3, and the normal signal and the inverted signal of the signal of D are output. The normal signal and the inverted signal are input to the reset terminal of the counter, respectively, and are reset at regular intervals. Each counter counts up only while reset is released. Then, when 2 ** x is reached, a clock abnormality CO is output. In addition, this circuit
Clock errors are detected for each of the 0 MHz clock and the 16 MHz clock.

The operation of FIGS. 1 and 2 will be described with reference to FIGS. 3 and 4.

FIG. 3 shows the timing when the clock operates normally. Counter 4 when clock is normal
The counter 5 is reset before reaching 2 ** x, and the clock abnormality CO is not output.

FIG. 4 shows the case where the clock becomes abnormal and the D input remains low. In this case, when the counter 5 continues to count up and reaches 2 ** x, the clock abnormality CO is output. Here, if the D input remains high, when the counter 4 continues to count up and reaches 2 ** x, the clock error CO
Is output.

According to this method, since detection is performed by a digital circuit, accurate detection can be performed. In addition, by detecting each clock abnormality, for each circuit that uses the clock, for example, an abnormality signal is issued to the elevator monitoring device, the elevator nearest floor stop, or the elevator immediate stop The methods can be controlled separately.

[0019]

According to the present invention, since the mutual monitoring is performed by the clock used in the elevator control device, the control method can be controlled separately according to the importance of the application,
It can improve service and ensure safety. Further, by mutually detecting clock anomalies with different clocks, there is no need to provide a dedicated circuit such as a clock anomaly detection clock, and thus an elevator control device with excellent productivity can be provided.

[Brief description of drawings]

FIG. 1 is an explanatory diagram of an embodiment of the present invention.

FIG. 2 is a clock abnormality detection circuit diagram.

FIG. 3 is a timing chart when the clock is normal.

FIG. 4 is a timing chart when the clock is abnormal.

[Explanation of symbols]

1 ... Frequency divider circuit, 2 ... Clock abnormality detection circuit, 3 ... Flip-flop circuit, 4, 5 ... Counter circuit, 6 ... OR circuit.

Claims (3)

[Claims] 1. An elevator control apparatus comprising a microcomputer and a plurality of clocks, comprising: a clock abnormality detection circuit for mutually monitoring abnormality of the clocks. 2. The elevator control device according to claim 1, wherein the clock abnormality detection circuit outputs an abnormality when the monitored clock does not operate even after a predetermined time has elapsed. 3. The counting of the predetermined time according to claim 2, wherein the time counted by a clock different from the monitored clock is counted by the monitored clock when the monitored clock is normal. Is reset, and an elevator control device is defined to output an abnormal signal when the monitored clock is abnormal.