CN111736570A - Controller clock frequency detection method, device, computer equipment and storage medium - Google Patents

Abstract

The present application relates to a controller clock frequency detection method, device, computer equipment and storage medium. A method for detecting a clock frequency of a controller includes: obtaining a reference count value; controlling a timing module to perform timing work according to a preset time; controlling a counting module to count fixed-period pulses when the timing module performs the timing work, and when the timing module completes the timing work Interrupt the counting to obtain the working count value; calculate the clock drift amount of the controller according to the deviation of the working count value relative to the reference count value; judge whether the clock frequency of the controller is normal according to the clock drift amount. The present application can make the detection result of the clock frequency of the controller more accurate.

Description

Controller clock frequency detection method, device, computer equipment and storage medium

technical field

The present application relates to the technical field of controllers, and in particular, to a method, device, computer equipment and storage medium for detecting a clock frequency of a controller.

Background technique

The controller is the component that directs the various components of the computer to coordinate work according to the functional requirements of the instruction, and is the nerve center and command center of the computer. Whether the clock frequency of the controller is normal or not will affect the security of the system software program. Therefore, it needs to be detected.

The current detection method is to install a clock chip with an independent time slot outside the controller. By comparing the clock frequency of the external independent clock chip with the clock frequency of the controller itself, when the time difference between the two is found, the clock frequency is judged. An error occurred.

However, when this method is used, if the frequency of the reference clock chip itself drifts, false alarms or false alarms will occur in the detection, thus making the detection inaccurate.

SUMMARY OF THE INVENTION

Based on this, it is necessary to provide a controller clock frequency detection method, apparatus, computer equipment and storage medium for the above technical problems.

A controller clock frequency detection method, comprising:

obtaining a reference count value, where the reference count value is the count of fixed-period pulses by the counting module within a preset time;

The timing module is controlled to perform timing work according to the preset time, and the timing frequency of the timing module is obtained by dividing the frequency of the controller clock;

Controlling the counting module to count the fixed period pulses when the timing module performs the timing work, and to interrupt the counting when the timing module completes the timing work, thereby obtaining a work count value;

Calculate the clock drift amount of the controller according to the deviation of the working count value relative to the reference count value;

It is judged whether the clock frequency of the controller is normal according to the clock drift amount.

In one of the embodiments, the obtaining the reference count value includes:

Controlling the timing module to perform initial timing according to the preset time, and the initial timing is the first timing performed by the timing module when the controller is in an initial state;

Controlling the counting module to count the fixed period pulses when the timing module performs the initial timing, and to interrupt the counting when the timing module completes the initial timing, so as to obtain the reference count value.

In one of the embodiments, the method further includes: setting the priority of the interrupt to the highest level.

In one embodiment, after judging whether the clock frequency of the controller is normal according to the clock drift amount, the method further includes:

If the clock frequency of the controller is abnormal, perform a clock frequency fault processing operation;

If the controller clock frequency is normal, perform other functions and continue to detect whether the controller clock frequency is normal.

In one of the embodiments, performing the clock frequency failure processing operation includes sending out alarm information.

In one embodiment, after judging whether the clock frequency of the controller is normal according to the clock drift amount, the method further includes:

Clear the count of the counting module to zero.

A controller clock frequency detection device, comprising:

Pulse generation module for transmitting fixed period pulses;

a timing module, the timing frequency is obtained by dividing the clock frequency of the controller, and is used for timing work according to a preset time;

a counting module, connected to the pulse generating module, for counting the pulses emitted by the pulse generating module when the timing module performs the timing work, and interrupting the counting when the timing module completes the timing work, So as to get the work count value;

an acquisition module, configured to acquire a reference count value, where the reference count value is the count of fixed-period pulses by the counting module within the preset time;

a calculation module, configured to calculate the clock drift amount of the controller according to the work count value and the reference count value;

A judging module, for judging whether the clock frequency of the controller is normal according to the clock drift amount.

In one embodiment, the timing module is a timer in the controller, and/or the counting module is a counter in the controller.

In one embodiment, the obtaining module includes the timing module and the counting module, and the obtained module is obtained by the counting module counting the fixed period pulses when the timing module performs initial timing according to a preset time. the reference count value, and the initial timing is the first timing performed by the timing module when the controller is in an initial state.

A computer device, comprising a memory and a processor, wherein the memory stores a computer program, wherein the processor implements the following steps when executing the computer program:

obtaining a reference count value, where the reference count value is the count of fixed-period pulses by the counting module within a preset time;

The timing module is controlled to perform timing work according to the preset time, and the timing frequency of the timing module is obtained by dividing the frequency of the controller clock;

Controlling the counting module to count the fixed period pulses when the timing module performs the timing work, and to interrupt the counting when the timing module completes the timing work, thereby obtaining a work count value;

Calculate the clock drift amount of the controller according to the deviation of the working count value relative to the reference count value;

It is judged whether the clock frequency of the controller is normal according to the clock drift amount.

A computer-readable storage medium on which a computer program is stored, and when the computer program is executed by a processor, the following steps are implemented:

obtaining a reference count value, where the reference count value is the count of fixed-period pulses by the counting module within a preset time;

The timing module is controlled to perform timing work according to the preset time, and the timing frequency of the timing module is obtained by dividing the frequency of the controller clock;

Controlling the counting module to count the fixed period pulses when the timing module performs the timing work, and to interrupt the counting when the timing module completes the timing work, thereby obtaining a work count value;

Calculate the clock drift amount of the controller according to the deviation of the working count value relative to the reference count value;

It is judged whether the clock frequency of the controller is normal according to the clock drift amount.

In the above controller clock frequency detection method, device, computer equipment and storage medium, the counting module counts fixed period pulses when the timing module performs timing work according to the preset time, and then calculates the timing deviation of the timing module through the counting deviation of the counting module , so as to reflect the drift of the clock frequency. The period of the fixed-period pulse is fixed, so the detection result in this embodiment is more accurate.

Description of drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present application or in the traditional technology, the following briefly introduces the accompanying drawings that are used in the description of the embodiments or the traditional technology. Obviously, the drawings in the following description are only the For some embodiments of the application, for those of ordinary skill in the art, other drawings can also be obtained according to these drawings without any creative effort.

1 is a schematic flowchart of a method for detecting a clock frequency of a controller in one embodiment;

FIG. 2 is a schematic flowchart of obtaining a reference count value in one embodiment;

3 is a schematic flow chart of judging whether the clock frequency of the controller is normal according to the amount of clock drift in one embodiment;

FIG. 4 is a structural block diagram of an apparatus for detecting a clock frequency of a controller in an embodiment.

Detailed ways

In order to facilitate understanding of the present application, the present application will be described more fully below with reference to the related drawings. Embodiments of the present application are presented in the accompanying drawings. However, the application may be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.

Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the technical field to which this application belongs. The terms used herein in the specification of the application are for the purpose of describing specific embodiments only, and are not intended to limit the application.

It should be noted that when an element is referred to as being "connected" to another element, it can be directly connected to the other element or connected to the other element through intervening elements. In addition, the "connection" in the following embodiments should be understood as "electrical connection", "communication connection" and the like if there is transmission of electrical signals or data between the objects to be connected.

As used herein, the singular forms "a," "an," and "/the" can include the plural forms as well, unless the context clearly dictates otherwise. It should also be understood that the terms "comprising/comprising" or "having" etc. designate the presence of stated features, integers, steps, operations, components, parts or combinations thereof, but do not preclude the presence or addition of one or more Possibilities of other features, integers, steps, operations, components, parts or combinations thereof. Also, as used in this specification, the term "and/or" includes any and all combinations of the associated listed items.

With the development of information technology, embedded system software has been widely used in equipment in key fields such as aerospace, rail transit, nuclear power, and automotive electronics. How to ensure the security of embedded software and prevent major personal, property and environmental losses is the core issue of software research and development of such products.

European and American countries have released functional safety standards such as IEC61508, IEC62279, and IEC60880, which are used to specify the functional safety technical requirements that high-safety software needs to be mandatory or recommended. However, how to design effective technical approaches to meet such standards has always been a major challenge for the industry.

In the IEC 61508.1-2010 "Electrical/Electronic Programmable Electronic Controllers Part 1: General Requirements" standard, the use of embedded controllers is divided into SIL1 to SIL4 types of controllers according to their potential safety hazards, and specifies the relevant Safety measures that the controller must take. Among them, controller clock frequency monitoring is a safety measure that must be taken by controllers above SIL2. The method for detecting the clock frequency of a controller of the present application can be (but is not limited to) applied to the detection of whether the clock frequency of this type of controller is normal or not.

In one embodiment, as shown in FIG. 1, a method for detecting a clock frequency of a controller is provided, including:

Step S1, obtaining a reference count value.

The reference count value here is the count of fixed-cycle pulses by the counting module within a preset time. The preset time can be set according to the actual situation, for example, it can be set to 1 millisecond. The reference count value can be denoted as C _ref .

Step S2, the timing module is controlled to perform timing work according to the preset time.

The timing frequency of the timing module is obtained by dividing the clock frequency of the controller, and the two are in a linear relationship. Specifically, the timing module may be a timer within the controller. Of course, the present application is not limited to this, and it may also be an external timer or the like.

In step S3, the counting module is controlled to count the fixed period pulses when the timing module performs the timing work, and interrupt the counting when the timing module completes the timing work, thereby obtaining the work count value.

The counting module can be a counter within the controller. Of course, this application is not limited by this, and it can also be an external counter or the like. After the timing module completes the timing work and interrupts the count, the work count value can be obtained by reading the count.

The priority of "interrupt" here can be set to the highest level. At this time, the counting of the counting module can be effectively prevented from being affected by other interrupt events, so that the counting of the working count value is accurate.

Step S4: Calculate the clock drift amount of the controller according to the deviation of the working count value relative to the reference count value.

Because the timing frequency of the timing module is obtained by dividing the clock frequency. Therefore, when the clock frequency of the controller drifts, the timing frequency of the timing module also drifts. Correspondingly, at this time, the timing time when the timing module performs the timing work will actually deviate from the preset time.

The counting module counts fixed period pulses. Therefore, if the time of the two counts is the same, the count of the counting module should also be the same. If the count times of the two counts are actually different, the count of the counting module will also be different.

Therefore, the working count value obtained by the counting module within the timing time when the timing module performs the timing work will produce a deviation between the reference count value and the working count value. Therefore, the clock drift amount of the controller can be calculated according to the deviation of the working count value relative to the reference count value.

The amount of clock drift here can be expressed as;

F _warp = (|C _real -C _ref |/C _ref )*F _osc

Among them, F _warp is the frequency drift amount, C _real is the working count value, C _ref is the reference count value, and F _osc is the normal clock frequency of the controller.

Step S5, it is judged whether the clock frequency of the controller is normal according to the clock drift amount.

The specific judgment process may be, for example, judging whether the clock drift amount is less than the offset threshold. When the amount of clock drift is less than the offset threshold, it is determined that the clock frequency of the controller is normal. When the amount of clock drift is not less than the offset threshold, it is determined that the clock frequency of the controller is abnormal. The offset threshold can be set according to actual requirements, for example, it can be 0.707F _osc

In the method for detecting the clock frequency of the controller in this embodiment, the control counting module counts the fixed-period pulses when the timing module performs timing work according to the preset time, and then calculates the timing deviation of the timing module through the counting deviation of the counting module, so as to reflect the clock frequency of drift. The period of the fixed-period pulse is fixed, so the detection result in this embodiment is more accurate.

In one embodiment, as shown in FIG. 2 , step S1 (obtaining the reference count value) includes:

Step S11, the timing module is controlled to perform initial timing according to the preset time.

The "initial timing" here is the first timing performed by the timing module when the controller is in the initial state. The controller is in the initial state, that is, the controller is in a brand-new state.

In step S12, the counting module is controlled to count the fixed period pulses when the timing module performs the initial timing, and interrupt the counting when the timing module completes the initial timing, so as to obtain the reference count value.

The priority of "interrupt" here can also be set to the highest level. At this time, the counting of the counting module can be effectively prevented from being affected by other interrupt events, thereby making the counting of the parameter count value accurate. After the reference count value is obtained, the count of the counting module can be cleared.

Since the controller is in a brand-new initial state when the timing module performs initial timing, the clock frequency of the controller hardly drifts at this time. Therefore, the count value performed by the counting module on the fixed-period pulses when the timing module performs initial timing can be used as the reference count value. After the timing module completes the initial timing and interrupts the count, the reference count value can be obtained by reading the count. The present application can easily and efficiently obtain the reference count value.

Of course, the present application is not limited in the past, and in other embodiments, the acquisition process of the reference count value may also be different from this. For example, the reference count value may be stored in its memory as an inherent performance parameter of the controller. The reference count value is obtained by directly reading this value when in use.

In one embodiment, referring to FIG. 3 , after step S5 (judging whether the clock frequency of the controller is normal according to the amount of clock drift), it further includes:

S51, if the clock frequency of the controller is abnormal, perform a clock frequency fault processing operation.

The processing operation of the clock frequency failure may specifically include sending out alarm information to notify the user. After obtaining the alarm information, the user can take protective measures to ensure the security of the system. After the clock frequency fault handling operation, you can perform other functions and continue to detect whether the clock frequency of the controller is normal. Of course, in order to further ensure safety, other functions may not be performed temporarily after the fault handling operation, and it is first detected whether the clock frequency of the controller is normal, and then other functions are performed after ensuring that it is normal.

S52, if the clock frequency of the controller is normal, perform other functions and continue to detect whether the clock frequency of the controller is normal.

After judging whether the clock frequency of the controller is normal, continue to detect whether the clock frequency of the controller is normal, so that the clock frequency of the controller can be continuously monitored, thereby ensuring the safe operation of the system when other functions are performed.

In one embodiment, step S5, after judging whether the clock frequency of the controller is normal according to the clock drift amount, further includes: step S6, clearing the count of the counting module.

At this time, step S6 and the step after the counting module interrupts counting can constitute an interrupt service, and the interrupt service can be triggered by an interrupt triggering manner, so that the subsequent counting module can start counting from zero. Of course, the present application is not limited to this, as long as the counting module performs the next counting (for example, the counting module counts fixed period pulses when the timing module performs the next timing operation), it can be cleared.

It should be understood that although the steps in the flowcharts of FIGS. 1-3 are sequentially displayed according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless explicitly stated herein, the execution of these steps is not strictly limited to the order, and these steps may be performed in other orders. Moreover, at least a part of the steps in FIG. 1 to FIG. 3 may include multiple steps or multiple stages, and these steps or stages are not necessarily executed and completed at the same time, but may be executed at different times. The order of execution is also not necessarily sequential, but may be performed alternately or alternately with other steps or at least a portion of the steps or stages within the other steps.

In one embodiment, referring to FIG. 4 , a controller clock frequency detection device is provided, including a pulse generation module 100 , a timing module 200 , a counting module 300 , an acquisition module 400 , a calculation module 500 and a judgment module 600 .

The pulse generating module 100 may specifically be a pulse generating chip or a pulse generator or the like. The pulse generating module 100 may transmit fixed period pulses to the counting module 300 .

The timing frequency of the timing module 200 is obtained by dividing the frequency of the controller clock, and further reflects the deviation of the controller clock frequency. The timing module 200 performs timing work according to the preset time. The preset time can be set according to the actual situation, for example, it can be set to 1 millisecond. The timing module 200 may be a timer within the controller. Of course, this application is not limited by this, and it can also be an external timer, etc.

The counting module 300 is connected to the pulse generating module 100 , and can receive a fixed period pulse signal transmitted by the pulse generating module 100 . The counting module 300 may be a counter within the controller. At this time, the controller may be provided with corresponding pins to receive the pulse signal transmitted by the pulse generating module 100 . Of course, this application is not limited by this, and it can also be an external counter or the like.

When the timing module 200 can be a timer in the controller, and the counting module 300 is a counter in the controller, there is no need to add additional devices outside the controller, thereby reducing product cost.

The counting module 300 counts the pulses emitted by the pulse generating module when the timing module performs the timing work, and interrupts the counting when the timing module completes the timing work, thereby obtaining the work count value.

The obtaining module 400 is used to obtain the reference count value. The reference count value is the count of fixed-cycle pulses by the counting module within a preset time.

The calculation module 500 is configured to calculate the clock drift amount of the controller according to the work count value and the reference count value.

The counting module 300 counts fixed period pulses. Therefore, if the time of the two counts is the same, the count of the counting module 300 should also be the same. If the counting time of the two counts is actually different, the counting of the counting module 300 will also be different.

Because the timing frequency of the timing module 200 is obtained by dividing the clock frequency. Therefore, when the clock frequency of the controller drifts, the timing frequency of the timing module 200 also drifts. Correspondingly, at this time, the timing time when the timing module 200 performs the timing work will actually deviate from the preset time.

Therefore, the working count value obtained by the counting module 300 within the timing time when the timing module 200 performs the timing work will produce a deviation between the reference count value and the working count value. Therefore, the clock drift amount of the controller can be calculated according to the deviation of the working count value relative to the reference count value.

The amount of clock drift here can be expressed as;

F _warp = (|C _real -C _ref |/C _ref )*F _osc

Among them, F _warp is the frequency drift amount, C _real is the working count value, C _ref is the reference count value, and F _osc is the normal clock frequency of the controller.

The judgment module 600 judges whether the clock frequency of the controller is normal according to the clock drift amount. The specific judging process of the judging module may be, for example, judging whether the clock drift amount is less than the offset threshold. When the amount of clock drift is less than the offset threshold, it is determined that the clock frequency of the controller is normal. When the amount of clock drift is not less than the offset threshold, it is determined that the clock frequency of the controller is abnormal. The offset threshold can be set according to actual requirements, for example, it can be 0.707F _osc

In this embodiment of the controller clock frequency detection device, the counting module counts the fixed period pulses when the timing module performs timing work according to the preset time, and then calculates the timing deviation of the timing module through the counting deviation of the counting module, so as to reflect the variation of the clock frequency. Drift situation. The period of the fixed-period pulse is fixed, so the detection result in this embodiment is more accurate.

In one embodiment, the obtaining module 400 includes the timing module 200 and the counting module 300 . The obtaining module 400 obtains the reference count value through the counting module 200 and the timing module 300 .

The counting module 300 obtains the reference count value by counting the fixed period pulses when the timing module 200 performs the initial timing according to the preset time. The initial timing is the first timing performed by the timing module when the controller is in the initial state. The controller is in the initial state, that is, the controller is in a brand-new state. At this point the controller clock frequency hardly drifts.

Therefore, in this embodiment, the counting value of the fixed-period pulses performed by the counting module 300 when the timing module 200 performs the initial timing can be used as the reference counting value, so as to obtain the reference counting value simply and effectively.

For the specific limitation of the controller clock frequency detection device, reference may be made to the above limitation on the controller clock frequency detection method, which will not be repeated here. Each module in the above-mentioned controller clock frequency detection device may be implemented in whole or in part by software, hardware and combinations thereof. The above modules can be embedded in or independent of the processor in the computer device in the form of hardware, or stored in the memory in the computer device in the form of software, so that the processor can call and execute the operations corresponding to the above modules. It should be noted that, the division of modules in the embodiments of the present application is schematic, and is only a logical function division, and there may be other division manners in actual implementation.

In one embodiment, a computer device is provided, including a memory and a processor, a computer program is stored in the memory, and the processor implements the following steps when executing the computer program:

In step S1, a reference count value is obtained, where the reference count value is counted by a counting module within a preset time period of pulses of a fixed period.

Step S2, the timing module is controlled to perform timing work according to the preset time, and the timing frequency of the timing module is obtained by dividing the frequency of the controller clock frequency.

In step S3, the counting module is controlled to count the fixed period pulses when the timing module performs the timing work, and interrupt the counting when the timing module completes the timing work, thereby obtaining the work count value.

Step S4: Calculate the clock drift amount of the controller according to the deviation of the working count value relative to the reference count value.

Step S5, it is judged whether the clock frequency of the controller is normal according to the clock drift amount.

In one embodiment, the processor also implements the following steps when executing the computer program: Step S11 , controlling the timing module to perform initial timing according to a preset time, and the initial timing is the first timing performed by the timing module when the controller is in an initial state. In step S12, the counting module is controlled to count the fixed period pulses when the timing module performs the initial timing, and interrupt the counting when the timing module completes the initial timing, so as to obtain the reference count value.

In one embodiment, the processor further implements the following steps when executing the computer program: Step S51, if the clock frequency of the controller is abnormal, perform a clock frequency fault processing operation. Step S52, if the clock frequency of the controller is normal, execute other functions and continue to detect whether the clock frequency of the controller is normal.

In one embodiment, the processor further implements the following steps when executing the computer program: Step S6, clearing the count of the counting module.

In one embodiment, a computer-readable storage medium is provided on which a computer program is stored, and when the computer program is executed by a processor, the following steps are implemented:

In step S1, a reference count value is obtained, where the reference count value is counted by a counting module within a preset time period of pulses of a fixed period.

Step S2, the timing module is controlled to perform timing work according to the preset time, and the timing frequency of the timing module is obtained by dividing the frequency of the controller clock frequency.

In step S3, the counting module is controlled to count the fixed period pulses when the timing module performs the timing work, and interrupt the counting when the timing module completes the timing work, thereby obtaining the work count value.

Step S4: Calculate the clock drift amount of the controller according to the deviation of the working count value relative to the reference count value.

Step S5, it is judged whether the clock frequency of the controller is normal according to the clock drift amount.

In one embodiment, when the computer program is executed by the processor, the following steps are further implemented: Step S11, the timing module is controlled to perform initial timing according to a preset time, and the initial timing is the first timing performed by the timing module when the controller is in an initial state. In step S12, the counting module is controlled to count the fixed period pulses when the timing module performs the initial timing, and interrupt the counting when the timing module completes the initial timing, so as to obtain the reference count value.

In one embodiment, when the computer program is executed by the processor, the following steps are further implemented: Step S51, if the clock frequency of the controller is abnormal, a clock frequency fault processing operation is performed. Step S52, if the clock frequency of the controller is normal, execute other functions and continue to detect whether the clock frequency of the controller is normal.

In one embodiment, when the computer program is executed by the processor, the following steps are further implemented: Step S6, clearing the count of the counting module.

Those skilled in the art can understand that all or part of the processes in the methods of the above embodiments can be implemented by instructing relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium , when the computer program is executed, it may include the processes of the above-mentioned method embodiments. Wherein, any reference to memory, storage, database or other media used in the various embodiments provided in this application may include at least one of non-volatile and volatile memory. Non-volatile memory may include read-only memory (Read-Only Memory, ROM), magnetic tape, floppy disk, flash memory, or optical memory, and the like. Volatile memory may include random access memory (RAM) or external cache memory. By way of illustration and not limitation, the RAM may be in various forms, such as static random access memory (Static Random Access Memory, SRAM) or dynamic random access memory (Dynamic Random Access Memory, DRAM).

In the description of this specification, description with reference to the terms "one embodiment," "other embodiment," etc. means that a particular feature, structure, material, or feature described in connection with that embodiment or example is included in at least one embodiment of the present invention or in the example. In this specification, schematic descriptions of the above terms do not necessarily refer to the same embodiment or example.

The technical features of the above embodiments can be combined arbitrarily. In order to make the description simple, all possible combinations of the technical features in the above embodiments are not described. However, as long as there is no contradiction in the combination of these technical features It is considered to be the range described in this specification.

The above-mentioned embodiments only represent several embodiments of the present application, and the descriptions thereof are specific and detailed, but should not be construed as a limitation on the scope of the invention patent. It should be pointed out that for those skilled in the art, without departing from the concept of the present application, several modifications and improvements can be made, which all belong to the protection scope of the present application. Therefore, the scope of protection of the patent of the present application shall be subject to the appended claims.

Claims (11)

1. A method for detecting a clock frequency of a controller, comprising:

acquiring a reference count value, wherein the reference count value is the count of the fixed-period pulse in a preset time by a counting module;

controlling a timing module to perform timing work according to the preset time, wherein the timing frequency of the timing module is obtained by frequency division of the clock frequency of the controller;

controlling the counting module to count the fixed period pulse when the timing module performs the timing work, and interrupting the counting when the timing module completes the timing work, so as to obtain a work count value;

calculating the clock drift amount of the controller according to the deviation of the work count value relative to the reference count value;

and judging whether the clock frequency of the controller is normal or not according to the clock drift amount.

2. The controller clock frequency detection method of claim 1, wherein the obtaining a reference count value comprises:

controlling the timing module to perform initial timing according to the preset time, wherein the initial timing is the first timing performed by the timing module when the controller is in an initial state;

and controlling the counting module to count the fixed period pulse when the timing module performs the initial timing, and interrupting the counting when the timing module completes the initial timing, so as to obtain the reference count value.

3. The controller clock frequency detection method according to claim 1 or 2, characterized by further comprising: setting the priority of the interrupt to a highest level.

4. The method for detecting the clock frequency of the controller according to claim 1, wherein after determining whether the clock frequency of the controller is normal according to the clock drift amount, the method further comprises:

if the clock frequency of the controller is abnormal, performing clock frequency fault processing operation;

and if the clock frequency of the controller is normal, executing other functions and continuously detecting whether the clock frequency of the controller is normal.

5. The method according to claim 4, wherein the performing a clock frequency failure handling operation comprises issuing an alarm message.

6. The method for detecting the clock frequency of the controller according to claim 1, wherein after determining whether the clock frequency of the controller is normal according to the clock drift amount, the method further comprises:

and clearing the count of the counting module.

7. A controller clock frequency detection apparatus, comprising:

the pulse generating module is used for transmitting fixed-period pulses;

the timing module is used for carrying out timing work according to preset time, and the timing frequency is obtained by frequency division of the clock frequency of the controller;

the counting module is connected with the pulse generating module and used for counting the pulses transmitted by the pulse generating module when the timing module performs the timing work and interrupting the counting when the timing module completes the timing work so as to obtain a work count value;

the acquisition module is used for acquiring a reference count value, wherein the reference count value is the count of the counting module on the fixed-period pulse within the preset time;

the calculation module is used for calculating the clock drift amount of the controller according to the work count value and the reference count value;

and the judging module is used for judging whether the clock frequency of the controller is normal or not according to the clock drift amount.

8. The apparatus of claim 7, wherein the timing module is a timer in the controller and/or the counting module is a counter in the controller.

9. The apparatus according to claim 7 or 8, wherein the obtaining module includes the timing module and the counting module, and the reference count value is obtained by counting the fixed-period pulses by the counting module when the timing module performs an initial timing according to a preset time, where the initial timing is a first timing performed by the timing module when the controller is in an initial state.

10. A computer device comprising a memory and a processor, the memory storing a computer program, characterized in that the processor, when executing the computer program, implements the steps of the method of any of claims 1 to 6.

11. A computer-readable storage medium, on which a computer program is stored, which, when being executed by a processor, carries out the steps of the method of any one of claims 1 to 6.

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