JPH07244296A - Active matrix drive type liquid crystal display device - Google Patents

Abstract

(57) [Summary] [Object] To specifically describe the purpose of the present invention, an active matrix drive type liquid crystal having a high aperture ratio and a high yield, a large screen and high definition, and excellent display quality. It is to provide a display device. In an active matrix type liquid crystal display device, an additional capacitance Cadd constituted by a variable capacitance element is connected between a pixel electrode EP and scanning signal electrodes Y1, ..., Yn,
This additional capacitance Cadd has a small capacitance value while the scanning signal electrode to which it is connected is selectively driven, and has a large capacitance value in other periods. [Effects] According to the present invention, the capacity connected to the gate wiring at the time of writing can be reduced, so that the display screen can be made larger and finer, and the influence of the parasitic capacitance of the thin film transistor can be reduced, so that the display quality can be improved. .

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an active matrix drive type liquid crystal display device using a thin film transistor (hereinafter abbreviated as TFT).

[0002]

2. Description of the Related Art An active matrix drive type liquid crystal display device is provided with a switching element corresponding to each of a plurality of pixel electrodes arranged in a matrix.
Since the liquid crystal in each pixel is theoretically always driven, the active matrix drive type has better contrast than the simple matrix type which employs the time-division drive method, and is a technology indispensable especially for color liquid crystal display devices. It has become.

A conventional active matrix drive type liquid crystal display device has a plurality of scanning signal electrodes extending in a first direction at predetermined intervals on one surface and a second direction extending at predetermined intervals in a second direction intersecting the scanning signal electrodes. A plurality of video signal electrodes, TFTs located near each intersection of the scanning signal electrodes and the video signal electrodes, a gate electrode is connected to the scanning signal electrode, and a drain (or source) electrode is connected to the video signal electrode.
A first pixel electrode, which is located in each region defined by two scanning signal electrodes and two video signal electrodes adjacent to each other, and is connected to a source (or drain) electrode of a TFT.
Having an insulating substrate and a counter electrode formed on one surface,
The counter electrode includes a second insulating substrate arranged to face the pixel electrode with a gap, and a liquid crystal layer sandwiched between the first insulating substrate and the second insulating substrate. There is.
Further, for the purpose of preventing the deterioration of image quality due to the parasitic capacitance between the gate and the source of the TFT, a storage capacitor Cstg is provided between the pixel electrode and the potential other than the counter electrode and the scanning signal electrode, or the storage capacitor Cstg is provided between the pixel electrode and It is generally practiced to provide an additional capacitance Cadd between the scanning signal electrode and the scanning signal electrode. An active matrix drive type liquid crystal display device provided with a storage capacitor Cstg is disclosed in, for example, JP-A-3-149520, and an active matrix drive type liquid crystal display device provided with an additional capacitor Cadd is disclosed in, for example, JP-A-5-204337. , Respectively.

[0004]

An active matrix drive type liquid crystal display device provided with a storage capacitor Cstg is
Since the storage capacitor Cstg is not connected to the scan signal electrode, high-speed scanning is possible when driving the scan signal electrode, which is suitable for a large screen and high definition, but the storage capacitor Cstg is not the counter electrode and the scan signal electrode. Therefore, there is a problem in that the electrode wiring for applying the electric potential is required, and the yield decreases depending on the aperture ratio of the pixel and the crossing area of the wiring. On the other hand, the active matrix drive type liquid crystal display device provided with the additional capacitance Cadd does not need a new electrode wiring to apply the potential of the additional capacitance Cadd, and therefore is excellent in the aperture ratio and the yield, but the scanning signal Additional capacitance Ca to electrode
Since dd is connected, high-speed scanning cannot be performed, and there is a problem that it is difficult to increase the definition and the size of the display screen.

For the purpose of reducing the load on the TFT and reducing the cost of the drive circuit for the video signal electrode, it is common practice to drive the counter electrode with an alternating current to reduce the video signal voltage. In this driving method, the product of the capacitance connected to the scanning signal electrode and the electrode resistance, the resistance value and the capacitance value of the counter electrode, and the like adversely affect the image quality.
When d is adopted, it is necessary to reduce the resistance of the scanning signal electrode and the counter electrode.

An object of the present invention is to provide an improved active matrix drive type liquid crystal display device which solves the above problems.

Specifically, it is an object of the present invention to provide an active matrix drive type liquid crystal display device having a high aperture ratio and a high yield, a large screen and high definition, and excellent display quality. It is in.

Other objects of the present invention will become apparent from the following description of the embodiments.

[0009]

The feature of the liquid crystal display device of the present invention that achieves the above object is that the additional capacitance Ca
The additional capacitance Cadd has a capacitance value that is substantially small during the period in which the scan signal electrode connected to the additional capacitance Cadd is driven, and that the capacitance value is substantially large during other periods. is there.

Specifically, the additional capacitance Cadd is composed of a variable capacitance element whose capacitance value changes according to the voltage applied between the scanning signal electrode and the pixel electrode to which it is connected, that is, the additional capacitance. Cadd has a small capacitance value while the scan signal electrode connected to it is driven,
In the other period, it is configured by a variable capacitance element whose capacitance value is substantially increased, or a switch is arranged between the additional capacitance Cadd and the scanning signal electrode connected to it, and the scanning signal electrode is Additional capacity Cadd during driving period
Is separated from the scanning signal electrode, and the additional capacitance Cad is provided during other periods.
d is connected to the scanning signal electrode.

The variable capacitance element used as the additional capacitance Cadd is an insulating film formed on a part of the pixel electrode, a semiconductor layer formed on the insulating film, and a semiconductor film formed extending on the semiconductor layer and projected onto the pixel electrode. In this case, it is preferable that the pixel electrodes and the scanning signal electrodes partially overlap each other. In this case, the semiconductor layer includes an i-type semiconductor layer portion that is not actively doped with impurities, and an n + -type semiconductor layer portion that is adjacent to the i-type semiconductor layer portion only below the scanning signal electrode and has a higher impurity concentration than the i-type semiconductor layer portion. And a semiconductor layer portion.

[0012]

The liquid crystal display device of the present invention has the additional capacitance Cadd, and the additional capacitance Cadd has a substantially small capacitance value while the scan signal electrode connected to the additional capacitance Cadd is being driven, and the other capacitance is substantially constant. Since the capacitance value is increased, the delay of the gate waveform is extremely small during the driving of the scan signal electrode, and high-speed scanning is possible, and the capacitance value of the additional capacitance Cadd is large and the parasitic capacitance of the TFT is increased during the other period. It is possible to eliminate the adverse effect of. In other words, the additional capacity Ca
The advantages of the active matrix drive type liquid crystal display device provided with dd are maintained, and a liquid crystal display device that solves the problem can be realized. Therefore, according to the present invention, the delay of the gate voltage waveform represented by the product of the wiring capacitance of the scanning signal electrode and the resistance is reduced, and the high-definition liquid crystal display device in which the selection period of the scanning signal electrode of one line is short, Good writing characteristics can be obtained even in a large-screen liquid crystal display device in which the wiring resistance of the scanning signal electrodes of the lines is large. Further, when the writing operation is completed and the scanning signal electrode is not selected, the capacitance value of the additional capacitance Cadd increases and reaches a desired capacitance value required for holding. It is possible to suppress voltage fluctuations and obtain good display characteristics without a brightness gradient or flicker.

Further, since the capacitance value of the scanning signal electrode in the selection period becomes small, the product of the capacitance connected to the scanning signal electrode and the electrode resistance can be made small without lowering the resistance of the scanning signal electrode. A driving method in which the electrodes are AC-driven to lower the video signal voltage can be adopted.

Further, since the capacitance characteristic of the combined capacitance composed of the parasitic capacitance of the TFT and the inserted auxiliary capacitance has a minimum value during white display, the ratio of the liquid crystal capacitance which also has a minimum value during white display and this combined capacitance. It is possible to keep the voltage fluctuation (feedthrough voltage) at the time of transition from the selected period of the gate selected to the non-selected period constant regardless of the image signal.

[0015]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The active matrix drive type liquid crystal display device of the present invention will be described in detail below with reference to the drawings showing the embodiments.

FIG. 1 is a schematic circuit diagram showing a typical embodiment of an active matrix drive type liquid crystal display device of the present invention.

In FIG. 1, 1 is an active matrix array, which is a plurality of scanning signal electrodes Y1, Y2, ..., Yn extending in a first direction (horizontal direction in the drawing) at a predetermined interval, and a preceding stage of the scanning signal electrode Y1. , The additional capacitance Cadd electrode Y0 arranged in parallel with the scanning signal electrode Y1 at a predetermined interval, the scanning signal electrodes Y1, Y2, ..., Yn and the additional capacitance C at a predetermined interval.
Second direction (vertical direction in the figure) crossing the add electrode Y0
, Xn extending in the vicinity of the scanning signal electrodes, the thin film transistor having a gate electrode connected to the scanning signal electrode and a drain electrode connected to the video signal electrode. The pixel electrode EP, which is disposed in each area defined by the TFT, two adjacent scanning signal electrodes and two adjacent video signal electrodes, and is connected to the source electrode of each thin film transistor, each pixel electrode and the pixel electrode The additional capacitance Cadd and the additional capacitance Cad formed by the variable capacitance element connected between the scanning signal electrode connected via the thin film transistor and the preceding scanning signal electrode.
An additional capacitance Cadd0 formed of a fixed capacitance element is connected between the pixel electrode EP located between the d electrode Y0 and the scanning signal electrode Y1 and the additional capacitance Cadd electrode Y0. EC is a counter electrode which is arranged to face each pixel electrode of the matrix array 1 through a liquid crystal layer, 2 is a vertical scanning circuit which drives the scanning signal electrodes Y1, Y2, ..., Yn, 3
And 4 are video signal drive circuits arranged on both sides of the matrix array 1 in the second direction to drive the video signal electrodes X1, X2, ..., Xn, and 5 is a counter electrode for applying a predetermined potential to the counter electrode EC. The voltage control circuit 6 is a circuit for generating a drive signal for each circuit from a signal from the host. R, G, and B given to the pixel electrode EP indicate pixel electrodes for each color of red, green, and blue.

The operation of FIG. 1 will be described with reference to FIG. 2 which is an enlarged view of a part of the active matrix array 1. The additional capacitor Cadd has a small capacitance value while the scanning signal electrode Y1 to which it is connected is selectively driven, and has a large capacitance value during another period, for example, when the scanning signal electrode Y2 is selectively driven. Is a variable capacitance element. While the scanning signal electrode Y1 is selected and driven, the thin film transistor TFT for writing to the additional capacitance Cadd is a non-writing period and is not affected by the parasitic capacitance, and there is no problem even if the capacitance of the additional capacitance Cadd is small. . Rather,
Since the capacitance value connected to the scanning signal electrode Y1 becomes small, the delay of the scanning signal voltage waveform can be made small and the scanning speed can be increased. Next, during the period in which the scanning signal electrode Y2 is selectively driven, the additional capacitance Cad
Since the capacitance value of d becomes large, the effect of reducing the influence of parasitic capacitance can be obtained. As described above, even though the liquid crystal display device of the active matrix drive type is provided with the additional capacitance Cadd, the capacitance value becomes small during the period in which the scanning signal electrode Y1 to which the additional capacitance Cadd is connected is selectively driven. , A display device having a large screen or a miniaturized screen with a large delay of the scanning signal voltage waveform by including a variable capacitance element whose capacitance value increases while the other scanning signal electrodes are selectively driven. It is possible to eliminate the disadvantage peculiar to the additional capacitance Cadd that cannot be applied.

Since the additional capacitance Cadd0 connected to the additional capacitance Cadd electrode Y0 is not scanned by the electrode Y0 and is maintained at a constant potential lower than the pixel electrode EP, for example, the ground potential, it is connected to the scanning signal electrode. The capacity may be set to be approximately the same as when the added capacity Cadd is large. As a result, the influence of the parasitic capacitance of the thin film transistor TFT connected to the scanning signal electrode Y1 can be reduced.

In order to reduce the load on the TFT and reduce the cost of the video signal electrode driver, it is generally practiced to drive the counter electrode with an alternating current to lower the video signal voltage. In this driving method, since the product of the capacitance connected to the scanning signal electrode and the electrode resistance, the resistance value and the capacitance value of the counter electrode, and the like adversely affect the image quality, when either the holding capacitance Cstg or the additional capacitance Cadd is adopted. Even in
It has been considered necessary to reduce the resistance of the scanning signal electrode and the counter electrode. However, according to the present invention, when the scanning signal electrode is driven, the additional capacitance Cadd becomes small, so that the product of the capacitance connected to the scanning signal electrode and the electrode resistance becomes small, so that the resistance of the scanning signal electrode is not lowered. Both have the effect of lowering the video signal voltage.

FIG. 3 shows an active matrix array 1
3 is a plan view showing a specific configuration of one pixel and its periphery, FIG. 4 is a sectional view taken along line IV-IV of FIG. 3, FIG. 5 is a sectional view taken along line VV of FIG. 3, and FIG. Sectional view taken along line VI-VI of FIG.
Is a sectional view taken along line VII-VII of FIG. 3, and FIG.
It is sectional drawing which follows the VIII line.

3 to 8, 100 is a first insulating substrate made of a transparent glass plate, and 101 and 102 are silicon oxide films formed on both sides of the first insulating substrate 100. Y1 and Y2 are scanning signal electrodes made of a metal selected from aluminum, chromium, tantalum, molybdenum, etc., which extend in one direction on one silicon oxide film 101 and are arranged in parallel at a predetermined interval in a direction perpendicular to the one direction. Video signal electrode X
An opening 103 is formed at a position where it crosses 1 and X2. EP21 is a pixel electrode made of a transparent conductive film such as a NES film formed in a region surrounded by the scanning signal electrodes Y1 and Y2 and the video signal electrodes X1 and X2 on the silicon oxide film 101, and 104 is on the silicon oxide film 101. And an insulating film made of, for example, silicon nitride, which partially extends on the scanning signal electrodes Y1 and Y2 and the pixel electrode EP21, and 105 is formed on the insulating film 104 with substantially the same pattern as the insulating film 104. I-type semiconductor layer made of amorphous silicon that is not doped with impurities, 106 is the i-type semiconductor layer 105
Is an n + type semiconductor layer formed on a selected surface of the amorphous silicon made of, for example, phosphorus. Insulation film 1
The stack of the 04, i-type semiconductor layer 105 and the n + -type semiconductor layer 106 extends in a direction perpendicular to the scanning signal electrodes Y1 and Y2 between the pixel signal electrodes X1 and X2, that is, between adjacent pixel electrodes. , A part of which extends on the scanning signal electrodes Y1 and Y2, and an island of the scanning signal electrode Y apart from the others.
1 and Y2 have portions extending above the pixel electrode EP21. Numerals 107 and 108 extend between adjacent pixel electrodes in a direction orthogonal to the scanning signal electrodes Y1 and Y2, and a part of them extend on the scanning signal electrodes Y1 and Y2, and are sequentially formed on the n + type semiconductor layer 106. The laminated chromium film and aluminum film having substantially the same pattern serve as the video signal electrodes X1 and X2.
Reference numerals 109 and 110 each have an island shape and extend from the scanning signal electrodes Y1 and Y2 to the pixel electrode EP21 and extend from the n + type semiconductor layer 106 to the pixel electrode EP21 or to the scanning signal electrode Y2. The laminated chromium film and aluminum film serve as one electrode of the additional capacitance Cadd21 and the source electrode of the thin film transistor TFT21, respectively. 11
Reference numeral 1 is a protective film which covers the exposed portion from the silicon oxide film 101 to the aluminum films 108 and 110 formed on the first insulating substrate 100, and is, for example, a silicon oxide film or a silicon nitride film having excellent transparency and moisture resistance. Is formed by. 11
2 is a first alignment film formed on the protective film 111, 113
Is the other silicon oxide film 102 of the first insulating substrate 100.
It is the first polarizing plate formed above. These form a thin film transistor array substrate for a liquid crystal display device.

Reference numeral 200 denotes a second insulating substrate made of a transparent glass plate, which is opposed to the first insulating substrate 100 at a predetermined interval, and 201 and 202 are oxidation layers formed on both surfaces of the second insulating substrate 200. It is a silicon film. Reference numeral 203 denotes a light-shielding film formed on one of the silicon oxide films 201 and having a high light-shielding property, for example, a chrome film or an aluminum film, and an opening 203a is provided at a portion facing the pixel electrode EP21, whereby a pixel portion and other portions are provided. And the i-type semiconductor layer 105 forming the thin film transistor has a light-shielding function. 204 is formed in the opening 203a of the light shielding film 203, and a part of the light shielding film 20
3 is a color filter extending over the film 3, 205 is a protective film formed on the light shielding film 203 and the color filter 204, for example, made of epoxy resin or acrylic resin, and EC is the protective film 2.
A counter electrode made of a transparent conductive film such as a Nesa film formed on 05, 206 is a second alignment film formed on the counter electrode EC, and 207 is the other silicon oxide film 202 of the second insulating substrate 200. It is the second polarizing plate formed above.

Reference numeral 300 denotes a liquid crystal layer filled in a gap between the first insulating substrate 100 and the second insulating substrate 200, and 400.
Is the other silicon oxide film 202 of the second insulating substrate 200.
It is a backlight arranged on the side. By the above, a liquid crystal panel used for an active matrix drive type liquid crystal display device is completed.

In the liquid crystal panel having such a structure, the thin film transistor TFT is, as shown in FIGS. 3, 4 and 5,
Near the intersection of the scanning signal electrode and the video signal electrode, the scanning signal electrode is a gate electrode, the insulating film 104 is a gate oxide film, and i
Type semiconductor layer 105 as a channel region and n + type semiconductor layer 10
6 is a source / drain region, the chromium film 107 and the aluminum film 108 on the n + type semiconductor layer 106 are drain electrodes, and the chromium film 109 and the aluminum film 110 on the n + type semiconductor layer 106 are source electrodes. There is.

Further, the additional capacitance Cadd is as shown in FIGS.
As shown in FIG. 5, the pixel electrode EP21 and the i-type semiconductor layer 10 formed in the island shape on the pixel electrode EP21 with the insulating film 104 interposed therebetween.
5, an n + type semiconductor layer 106 formed on the i type semiconductor layer 105 so as to partially overlap the pixel electrode EP21, a chromium film 1 connected to the n + type semiconductor layer 106 and the scanning signal electrode 1.
09 and the aluminum film 110. That is, the i-type semiconductor layer 105 and the insulating film 104 are dielectrics, the n + -type semiconductor layer 106 is one electrode, and the pixel electrode EP
A capacitive element having 21 as the other electrode is configured. In this capacitive element, the pixel electrode EP21 is provided on the n + type semiconductor layer 106 side.
When the potential is more positive, the capacitance value is determined by the overlapping area of the n + type semiconductor layer 106 and the pixel electrode EP21, the thickness of the i type semiconductor layer 105 and the insulating film 104, and the dielectric constant. On the contrary, the pixel electrode EP21 side is the n + type semiconductor layer 10
When the potential is higher than 6, a channel is formed near the surface of the i-type semiconductor layer 105 on the insulating film 104 side along the pixel electrode EP21, and this functions as one electrode in place of the n + type semiconductor layer 106. As a result, a capacitor having the insulating film 104 as a dielectric is formed. The capacitance of the capacitor is significantly increased because the dielectric is thin and the overlapping area of the pixel electrode EP21 and the channel is increased. n +
The change width of the capacitance value can be freely determined by decreasing the overlapping area between the type semiconductor layer 106 and the pixel electrode EP21 and increasing the overlapping area between the i-type semiconductor layer 105 and the pixel electrode EP21.

In FIG. 9, the overlapping area of the n + type semiconductor layer 106 and the pixel electrode EP21 is S, and the overlapping area of the i type semiconductor layer 105 and the pixel electrode EP21 is 1.5S, 3S, 4S and 6S. Of the n + type semiconductor layer 106 and the pixel electrode E
The relationship between the voltage Vg between P21 and the capacitance value of the additional capacitance Cadd is shown. As is apparent from the figure, it can be understood that as the overlapping area of the i-type semiconductor layer 105 and the pixel electrode EP21 increases, the capacitance value when the potential of the pixel electrode EP21 side is more positive than that of the n + type semiconductor layer 106. . Therefore, the overlapping area of the i-type semiconductor layer 105 and the pixel electrode EP21 may be arbitrarily determined in terms of the degree of influence of the parasitic capacitance of the thin film transistor TFT and the aperture ratio of the pixel.

If the additional capacitance Cadd is configured in this way, there is an effect that the capacitance does not change due to external light and stable capacitance characteristics are exhibited. That is, while the additional capacitance Cadd holds the written information, the additional capacitance Cadd has a large capacitance value, and a channel is formed in the i-type semiconductor layer 105 to function as one electrode. External light is incident on the liquid crystal panel and is repeatedly reflected inside the i-type semiconductor layer 1
Even when it reaches 05, since the portion of the i-type semiconductor layer 105 does not function as the dielectric of the capacitive element, a photoconductive current excited by light is not generated. Therefore, a stable display characteristic can be obtained without fluctuations in the potential due to the leakage of charges during the holding operation of the additional capacitance Cadd.

The thin film transistor array substrate for a liquid crystal display device shown in FIGS. 3 to 8 is manufactured by the following steps.

(1) Silicon oxide films 101 and 102 on both sides
First insulating substrate 100 made of a transparent glass plate having
To prepare.

(2) Scan signal electrodes Y1, ..., Yn are selectively formed on one silicon oxide film 101 of the first insulating substrate 100.
And the additional capacitance Cadd electrode Y0. There are two methods, that is, selective etching using a mask is performed at once, or selective etching is performed after a metal film is formed on the entire surface of the silicon oxide film 101.

(3) Pixel electrodes EP are formed at selected locations on the silicon oxide film 101. In this case as well, like the scanning signal electrodes Y1, ..., Yn and the additional capacitance Cadd electrode Y0, they can be formed by selective sputtering at once, or by selective etching after forming a metal film.

(4) The insulating film 104 and the i-type semiconductor layer 105 are formed at selected locations on the silicon oxide film 101, the scanning signal electrodes Y1, ..., Yn, the additional capacitance Cadd electrode Y0, and the pixel electrode EP. Also in this case, the insulating film and the semiconductor layer having a predetermined pattern can be sequentially formed by selective sputtering, or both can be selectively etched at the same time after forming the insulating film and the semiconductor layer. Is preferable in terms of accuracy of alignment and a small number of steps.

(5) An n + type semiconductor layer 106 is formed at a selected position on the i type semiconductor layer 105.

In this case, it may be formed at the same time as the i-type semiconductor layer 105, but since there is a part having a pattern different from that of the i-type semiconductor layer 105, additional etching is required, and either process may be used. Is the same.

(6) The chromium film 1 is formed on the n + type semiconductor layer 106, the scanning signal electrodes Y1, ..., Yn and the additional capacitance Cadd electrode Y0, the pixel electrode EP and the insulating film 104 at selected locations.
07 and 109 and aluminum films 108 and 110 are formed. Also in this case, the chromium film and the aluminum film having a predetermined pattern can be sequentially formed by selective sputtering or can be formed by two methods, that is, the chromium film and the aluminum film are formed and then both of them are simultaneously selectively etched. It is preferable that the positioning accuracy and the number of steps are small.

A thin film transistor array substrate for a liquid crystal display device can be realized by the above method. According to this manufacturing method, a mask for patterning the scanning signal electrodes Y1, ..., Yn and the additional capacitance Cadd electrode Y0, a mask for patterning the pixel electrode EP, a mask for patterning the insulating film 104 and the i-type semiconductor layer 105, n + Type semiconductor layer 1
It can be manufactured by using a total of 5 masks including a mask for patterning 06 and a mask for patterning a chromium film and an aluminum film.

FIG. 10 is a plan view showing a concrete structure of a pixel and its periphery of another embodiment of the active matrix array 1, and FIG. 11 is a sectional view taken along line XI-XI of FIG.
2 is a sectional view taken along line XII-XIIV in FIG. The thin film transistor array substrate for a liquid crystal display device shown in FIGS. 3 to 8 includes the scanning signal electrodes Y1, ..., Yn and the additional capacitance C.
, Xn are not present at the intersection of the add electrode Y0 and the video signal electrodes X1, ..., Xn, and the insulating film 104 and the i-type semiconductor layer 105 are formed on the entire lower side of the video signal electrodes X1 ,. Video signal electrode X1,
, Xn are formed by the transparent conductive film 114, and the source electrode and the drain electrode of the thin film transistor are formed by the transparent conductive film. With this configuration, there is an advantage that the manufacturing process can be reduced. That is, the thin film transistor array substrate for a liquid crystal display device shown in FIGS. 10 to 12 is manufactured in the next step.

(1) Silicon oxide films 101 and 102 on both sides
First insulating substrate 100 made of a transparent glass plate having
To prepare.

(2) Scan signal electrodes Y1, ..., Yn are selectively formed on one silicon oxide film 101 of the first insulating substrate 100.
And the additional capacitance Cadd electrode Y0. There are two methods, that is, selective etching using a mask is performed at once, or selective etching is performed after a metal film is formed on the entire surface of the silicon oxide film 101.

(3) An insulating film 104 and an i-type semiconductor layer 105 are formed at selected locations on the silicon oxide film 101, the scanning signal electrodes Y1, ..., Yn and the additional capacitance Cadd electrode Y0. Also in this case, the insulating film and the semiconductor layer having a predetermined pattern can be sequentially formed by selective sputtering, or both can be selectively etched at the same time after forming the insulating film and the semiconductor layer. Is preferable in terms of accuracy of alignment and a small number of steps.

(4) An n + type semiconductor layer 106 is formed at a selected place on the i type semiconductor layer 105.

In this case, it may be formed at the same time as the i-type semiconductor layer 105, but since there is a part having a pattern different from that of the i-type semiconductor layer 105, additional etching is required, and either process may be used. Is the same.

(5) The n + type semiconductor layer 106, the scanning signal electrodes Y1, ..., Yn, the additional capacitance Cadd electrode Y0, and the transparent conductive film 114 at a selected position on the insulating film 104. , Video signal electrodes X1, ..., Xn, source and drain electrodes of the thin film transistor, and electrodes of the additional capacitance Cadd. Also in this case, the transparent conductive film having a predetermined pattern can be formed by selective sputtering, or the transparent conductive film can be formed and then etched.

The thin film transistor array substrate for a liquid crystal display device shown in FIGS. 10 to 13 can be realized by the above method. According to this manufacturing method, a mask for patterning the scanning signal electrodes Y1, ..., Yn and the additional capacitance Cadd electrode Y0, a mask for patterning the insulating film 104 and the i-type semiconductor layer 105, and a mask for patterning the n + -type semiconductor layer 106. , Pixel electrode EP, video signal electrode X1, ..., X
n, the source and drain electrodes of the thin film transistor,
The transparent conductive film 1 for forming the electrode of the additional capacitance Cadd
It can be manufactured by a total of four masks for patterning 14.

FIG. 13 is a schematic circuit diagram showing another embodiment of the active matrix drive type liquid crystal display device of the present invention. 1 and 2 differs from the embodiment shown in FIG. 1 and FIG.
And a scan signal electrode Y1 connected to the switch SW, and the additional capacitance Cadd is a fixed capacitance element. And switch S
W is turned on / off so that it is turned off during a period when the scanning signal electrode Y1 connected to the additional capacitance Cadd is selectively driven, and is turned on during another period, for example, a period when the scanning signal electrode Y2 is selectively driven. . As a result, during the period when the selected scanning signal electrode is being driven, the capacitance becomes approximately 0 because the additional capacitance Cadd is separated from the scanning signal electrode Y1, and during other periods, the additional capacitance Cadd is applied to the scanning signal electrode. Are connected. Therefore, when scanning the scanning signal electrode, the delay of the scanning signal voltage waveform due to the additional capacitance Cadd is eliminated, and the influence of the parasitic capacitance of the thin film transistor TFT can be eliminated. This effect, particularly the point that the delay of the scanning signal voltage waveform can be made small, is that the capacitance during the period in which the selected scanning signal electrode is driven is close to 0. Therefore, compared with the embodiment shown in FIG. 1 and FIG. It becomes more prominent.

Although the entire liquid crystal panel is not shown in this embodiment, in the case of the configuration of FIG. 1, the additional capacitance Cadd connected to the electrode for the additional capacitance Cadd is directly connected without interposing the switch SW. Or switch S
It is easily understood by those skilled in the art that when connecting via W, the switch SW is not on / off controlled.

In this embodiment, since the additional capacitance Cadd is a fixed capacitance element, it is not necessary to use a semiconductor layer as a dielectric and only an insulating film is required. Therefore, the generation of a photoconductive current due to the incidence of external light is eliminated, and stable display characteristics can be realized.

FIG. 14 is a schematic circuit diagram showing another embodiment of the active matrix drive type liquid crystal display device of the present invention. This embodiment is different from the embodiment shown in FIGS. 1 and 2 in that the variable capacitance elements Cgsp and Cgsn are connected in antiparallel between the pixel electrode EP and the scanning signal electrode Y2 connected thereto via the thin film transistor TFT. There is. The variable capacitance elements Cgsp and Cgsn both have a channel region formed of an i-type semiconductor layer and a source region and a drain region formed of an n + type semiconductor layer, and have the same configuration, but they are in an antiparallel connection and are therefore in use. Are different from each other in that the bias states are opposite to each other.
Type variable capacitance element and the other variable capacitance element Cgsp is referred to as an N type variable capacitance element. The parallel connection of the P-type variable capacitance element Cgsp and the N-type variable capacitance element Cgsn provides the combined capacitance characteristic (Cgsp + Cgsn) shown in FIG.
This characteristic can be made proportional to the liquid crystal capacitance CLC by controlling the thickness and the type of the insulating film for the characteristics of the two variable capacitance elements. This brings about the following effects. That is, the voltage drop (feedthrough voltage) of the pixel electrode caused by the turning-off operation of the gate voltage Vg is
Since it changes depending on the difference voltage between the voltage VEP written in the pixel electrode EP and the potential of the counter electrode EC which normally has a constant value,
When the voltage of the pixel electrode differs depending on the image information, a DC voltage may be applied to the liquid crystal of each pixel. For this reason, an afterimage phenomenon may occur in which the previous image does not disappear after image rewriting. This is because the feedthrough voltage dVs is

[0050]

[Equation 1]

As shown in FIG. 1, the ratio of the parasitic capacitance Cgso of the thin film transistor TFT to the liquid crystal capacitance CLC is determined, and the liquid crystal capacitance CLC is determined by the voltage applied to the liquid crystal.
This is due to the fact that characteristics such as 5 are exhibited. According to the present embodiment, the combined capacitance characteristic Cg that determines the feedthrough voltage.
Since sp + Cgsn can obtain a characteristic substantially proportional to the characteristic of CLC as shown in FIG. 15, the feedthrough voltage can be made constant regardless of image information, and deterioration of the display image such as an afterimage does not occur. Of.

In particular, the combined capacitance characteristic Cgsp + Cgsn is expressed by the following equation.

[0053]

[Equation 2]

When the value is set to satisfy the above condition, the feedthrough voltage dVs always becomes a constant value shown by the following equation, and the afterimage is not generated.

[0055]

[Equation 3]

FIG. 16 is a plan view showing an example of the active matrix array shown in FIG. 14, and FIG. 17 is an XV of FIG.
It is a sectional view taken along the line II-XVII. FIG. 16 shows an arrangement in which an N-type variable capacitance element Cgsn and a P-type variable capacitance element Cgsp are added to those shown in FIG. As shown in FIG. 17, the P-type variable capacitance element Cgsp of these variable capacitance elements includes the insulating film 104 and the i-type semiconductor layer 105 as a dielectric, the n + -type semiconductor layer 106 connected to the pixel electrode EP21, and the scanning. The N-type variable capacitance element Cgsn is a capacitive element having the signal electrode Y1 as a pair of electrodes, and the insulating film 104 and the i-type semiconductor layer 105 are dielectrics, and the n + type semiconductor layer 106 connected to the scanning signal electrode Y1 and This is a capacitive element having the same configuration as Cadd using the pixel electrode EP21 as a pair of electrodes. Thus, by configuring both elements, the characteristics shown in FIG. 15 can be provided. The characteristics of these two variable capacitors are:
It can be adjusted by controlling the thickness and the dielectric constant of the insulating film 104 shown in FIG. 17 or by controlling the overlapping area of the upper and lower electrodes sandwiching the i-type semiconductor layer 105 and the insulating film 104.

Although the present invention has been described above by way of a representative embodiment, the present invention is not limited to this, and various modifications can be made.

[0058]

According to the present invention, since the capacity connected to the gate wiring at the time of writing can be reduced, the display screen can be made larger and finer, and the influence of the parasitic capacity of the thin film transistor can be reduced to improve the display quality. Can be achieved.

[Brief description of drawings]

FIG. 1 is a schematic circuit diagram showing a typical embodiment of an active matrix drive type color liquid crystal display device of the present invention.

FIG. 2 is a schematic circuit diagram showing a part of FIG. 1 in an enlarged manner.

FIG. 3 is a schematic plan view showing an example of an active matrix array used in the liquid crystal display device of the present invention.

FIG. 4 is a schematic sectional view taken along line IV-IV in FIG.

5 is a schematic cross-sectional view taken along the line VV of FIG.

6 is a schematic cross-sectional view taken along the line VI-VI of FIG.

7 is a schematic cross-sectional view taken along the line VII-VII of FIG.

8 is a schematic sectional view taken along the line VIII-VIII in FIG.

FIG. 9 is a diagram showing a relationship between an applied voltage and a capacitance value of an additional capacitor used in the present invention.

FIG. 10 is a schematic plan view showing another example of an active matrix array used in a liquid crystal display device.

11 is a schematic cross-sectional view taken along the line XI-XI of FIG.

12 is a schematic sectional view taken along line XII-XII in FIG.

FIG. 13 is a schematic circuit diagram showing another embodiment of an active matrix driving type color liquid crystal display device of the present invention.

FIG. 14 is a schematic circuit diagram showing another embodiment of an active matrix driving type color liquid crystal display device of the present invention.

FIG. 15 is a diagram showing a combined capacitance characteristic of a P-type variable capacitance element and an N-type variable capacitance element.

16 is a schematic plan view of an active matrix array used in the liquid crystal display device shown in FIG.

FIG. 17 is a schematic sectional view taken along line XVII-XVII in FIG.

[Explanation of symbols]

1 ... Matrix array, 2 ... Vertical scanning circuit, 3, 4 ...
Video signal drive circuit, 5 ... Counter electrode voltage control circuit, 6 ... Circuit for generating drive signal for each circuit, Y1, ..., Yn ... Scan signal electrode, Y0 ... Cadd electrode, X1, ..., Xn ... Video signal electrode, EP ... Pixel electrode, EC ... Counter electrode, Cadd, Ca
ddn ... Additional capacitance, TFT ... Thin film transistor, 100
... first insulating substrate, 104 ... insulating film, 105 ... i-type semiconductor layer, 106 ... n + semiconductor layer, 107, 109 ... chromium layer, 108, 110 ... aluminum layer, 112 ... first alignment film, 113 ... First polarizing plate, 200 ... Second insulating substrate, 203 ... Shading film, 204 ... Color filter, 206
Second alignment film, 207 Second polarizing plate, 300 Liquid crystal layer.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Kenjiro Kawauchi 7-1-1, Omika-cho, Hitachi-shi, Ibaraki Hitachi Ltd. Hitachi Research Laboratory

Claims (17)

[Claims] 1. A plurality of scanning signal electrodes extending in a first direction at predetermined intervals on one surface, a plurality of video signal electrodes extending in a second direction intersecting the scanning signal electrodes at predetermined intervals, a scanning signal electrode and an image. A thin film transistor, which is located near each intersection of signal electrodes, in which a control electrode is connected to a scanning signal electrode and one main electrode is connected to a video signal electrode, and two video signal electrodes adjacent to two adjacent scan signal electrodes. Of the pixel electrode connected to the other main electrode of the thin film transistor, each pixel electrode and two scanning signal electrodes located on both sides of the pixel electrode are connected to each other through the thin film transistor. Has a first insulating substrate connected to another scanning signal electrode and having an additional capacitance formed therein, and a counter electrode formed on one surface thereof, and the counter electrode has a gap in the pixel electrode. Then pair A second insulating substrate arranged to face each other, and a liquid crystal layer sandwiched between the first insulating substrate and the second insulating substrate, wherein the additional capacitance is connected A liquid crystal display device comprising a variable capacitance element whose capacitance value changes according to a voltage applied between the scanning signal electrode and the pixel electrode. 2. The variable capacitance element according to claim 1, wherein the capacitance value of the variable capacitance element when the potential of the scanning signal electrode is higher than that of the pixel electrode, and the capacitance value of the scanning signal electrode is lower than that of the pixel electrode. A liquid crystal display device which is smaller than the capacitance value of. 3. The variable capacitance element according to claim 1, wherein the variable capacitance element has a structure in which an insulating film, a semiconductor layer, and a part of the scanning signal electrode are sequentially laminated on a part of the pixel electrode. 2. A liquid crystal display device having a high-concentration region in a portion in contact with the scanning signal electrode. 4. A liquid crystal display device according to claim 3, wherein amorphous silicon is used as the semiconductor layer and silicon nitride is used as the insulating film. 5. The voltage applied between the scan signal electrode and the pixel electrode according to claim 1, 2, 3 or 4, and between the pixel electrode and the scan signal electrode to which the control electrode of the thin film transistor is connected. 2. A liquid crystal display device, comprising two auxiliary capacitance elements connected in parallel, the capacitance values of which change in opposite directions depending on the applied voltage. 6. A plurality of scanning signal electrodes extending in a first direction at predetermined intervals on one surface, a plurality of video signal electrodes extending in a second direction intersecting the scanning signal electrodes at predetermined intervals, a scanning signal electrode and an image. A thin film transistor, which is located near each intersection of signal electrodes, in which a control electrode is connected to a scanning signal electrode and one main electrode is connected to a video signal electrode, and two video signal electrodes adjacent to two adjacent scan signal electrodes. Of the pixel electrodes connected to the other main electrode of the thin film transistor, each pixel electrode and two scanning signal electrodes located on both sides of the pixel electrode, which are located in each region defined by Has a first insulating substrate connected to another scanning signal electrode and having an additional capacitance formed therein, and a counter electrode formed on one surface thereof, and the counter electrode has a gap in the pixel electrode. Then pair A second insulating substrate disposed so as to face each other, and a liquid crystal layer sandwiched between the first insulating substrate and the second insulating substrate. Each scanning signal electrode is sequentially driven from one side. Wherein the additional capacitance is composed of a capacitive element having a small capacitance value during a period in which the scan signal electrode connected to the additional capacitance is driven, and a large capacitance value during other periods. Liquid crystal display device. 7. The scanning device according to claim 6, wherein the capacitive element has a structure in which an insulating film, a semiconductor layer, and a part of the scanning signal electrode are sequentially laminated on a part of the pixel electrode, and the scanning of the semiconductor layer is performed. A liquid crystal display device having a high-concentration region in a portion in contact with a signal electrode. 8. The method according to claim 6, wherein a voltage applied between the scan signal electrode and the pixel electrode is provided between the pixel electrode and the scan signal electrode to which the control electrode of the thin film transistor is connected. 2. A liquid crystal display device, wherein two auxiliary capacitance elements whose capacitance values change in opposite directions are connected in parallel. 9. An insulating substrate, a plurality of scanning signal electrodes extending in a first direction at predetermined intervals on one surface of the insulating substrate, and a plurality of extending in a second direction intersecting the scanning signal electrodes at predetermined intervals. Of the video signal electrode, a thin film transistor located near each intersection of the scanning signal electrode and the video signal electrode, the control electrode being connected to the scanning signal electrode, and one main electrode being connected to the video signal electrode, and two adjacent thin film transistors. 2 adjacent to the scanning signal electrode
Located in each area defined by the individual video signal electrodes,
A pixel electrode connected to the other main electrode of the thin film transistor, and a scanning signal electrode different from each pixel electrode and two scanning signal electrodes located on both sides of the pixel electrode when the pixel electrode is connected via the thin film transistor. An additional capacitance connected between the pixel electrodes is formed, and the additional capacitance is composed of a variable capacitance element whose capacitance value changes according to the voltage applied between the scanning signal electrode and the pixel electrode to which the additional capacitance is connected. A thin film transistor array substrate for a liquid crystal display device, comprising: 10. A plurality of scanning signal electrodes extending in a first direction at predetermined intervals on one surface, a plurality of video signal electrodes extending in a second direction intersecting the scanning signal electrodes at predetermined intervals, a scanning signal electrode and an image. A thin film transistor, which is located near each intersection of signal electrodes, in which a control electrode is connected to a scanning signal electrode and one main electrode is connected to a video signal electrode, and two video signal electrodes adjacent to two adjacent scan signal electrodes. Of the pixel electrode connected to the other main electrode of the thin film transistor, each pixel electrode and two scanning signal electrodes located on both sides of the pixel electrode are connected to each other through the thin film transistor. Has a first insulating substrate connected to another scanning signal electrode and having an additional capacitance formed therein, and a counter electrode formed on one surface thereof, and the counter electrode has a gap in the pixel electrode. do it A second insulating substrate arranged to face each other, and a liquid crystal layer sandwiched between the first insulating substrate and the second insulating substrate are provided, and each scanning signal electrode is sequentially driven from one side. In the above, the additional capacitance is substantially disconnected from the scanning signal electrode during a period of being driven by the scanning signal electrode to which the additional capacitance is connected, and is in a state of being connected to the scanning signal electrode during other periods. A liquid crystal display device comprising: 11. The capacitor according to claim 10, wherein the capacitive element has a structure in which an insulating film, a semiconductor layer, and a part of the scanning signal electrode are sequentially stacked on a part of the pixel electrode, and the scanning of the semiconductor layer is performed. A liquid crystal display device having a high-concentration region in a portion in contact with a signal electrode. 12. A plurality of scanning signal electrodes extending in a first direction at predetermined intervals on one surface, a plurality of video signal electrodes extending in a second direction intersecting the scanning signal electrodes at predetermined intervals, a scanning signal electrode and an image. A thin film transistor, which is located near each intersection of signal electrodes, in which a control electrode is connected to a scanning signal electrode and one main electrode is connected to a video signal electrode, and two video signal electrodes adjacent to two adjacent scan signal electrodes. Of the pixel electrodes connected to the other main electrode of the thin film transistor, each pixel electrode and two scanning signal electrodes located on both sides of the pixel electrode, which are located in each region defined by And a first insulating substrate on which an additional capacitance is formed, which is connected to each scanning signal electrode via another switch, and a counter electrode formed on one surface, and the counter electrode is a pixel. Each of the scanning signal electrodes includes: a second insulating substrate which is arranged so as to face the electrodes with a gap; and a liquid crystal layer which is sandwiched between the first insulating substrate and the second insulating substrate. Is sequentially driven from one side, the liquid crystal display device is characterized in that the switch is in an off state while the scanning signal electrode is being driven, and is in an on state during the other period. 13. The capacitor according to claim 12, wherein the capacitive element has a structure in which an insulating film, a semiconductor layer, and a part of the scanning signal electrode are sequentially stacked on a part of the pixel electrode, and the scanning of the semiconductor layer is performed. A liquid crystal display device having a high-concentration region in a portion in contact with a signal electrode. 14. The capacitance according to claim 12, between the pixel electrode and the scanning signal electrode to which the control electrode of the thin film transistor is connected, the capacitance depending on the voltage applied between the scanning signal electrode and the pixel electrode. A liquid crystal display device, wherein two variable capacitance elements whose values change in opposite directions are connected in parallel. 15. A first electrode film formed on the surface of an insulating layer, an insulating film formed on the first electrode film, a semiconductor layer formed on the insulating film, and formed on the semiconductor layer. The second electrode that partially overlaps the first electrode film when projected onto the first electrode film.
And an electrode of the capacitor. 16. The capacitive element according to claim 15, wherein a high impurity region is formed in a portion of the semiconductor layer which is in contact with the second electrode. 17. A plurality of scanning signal electrodes extending in a first direction at predetermined intervals on one surface, a plurality of video signal electrodes extending in a second direction intersecting the scanning signal electrodes at predetermined intervals, a scanning signal electrode and an image. A thin film transistor, which is located near each intersection of signal electrodes, in which a control electrode is connected to a scanning signal electrode and one main electrode is connected to a video signal electrode, and two video signal electrodes adjacent to two adjacent scan signal electrodes. Of the pixel electrode connected to the other main electrode of the thin film transistor, each pixel electrode and two scanning signal electrodes located on both sides of the pixel electrode are connected to each other through the thin film transistor. Has a first insulating substrate connected to another scanning signal electrode and having an additional capacitance formed therein, and a counter electrode formed on one surface thereof, and the counter electrode has a gap in the pixel electrode. do it A second insulating substrate arranged to face each other and a liquid crystal layer sandwiched between the first insulating substrate and the second insulating substrate are provided, and each scanning signal electrode is first scanned from one side. In those that are sequentially driven except for the signal electrode, except for the one that is connected to the first scanning signal electrode among the above additional capacitances, the capacitance value is A liquid crystal display device comprising a variable capacitance element that is small and has a large capacitance value in other periods.