JPH05268519A - Title moving circuit - Google Patents

Abstract

PURPOSE:To improve the quality of a title when a display size is compressed in a vertical direction and the title is moved by providing a 1st vertical filter and a 2nd vertical filter whose delay time differs from that of the 1st vertical filter in the circuit. CONSTITUTION:The 1st vertical filter 21 is a (1/4, 1/2, 1/4) vertical filter and the 2nd vertical filter 22 is a (1/2, 1/2) vertical filter, and the delay time of the 1st vertical filter 21 and the 2nd vertical filter 22 differs by 1/2H. A video signal converted respectively into a digital video signal is fed respectively to the vertical filters 21, 22. A switching circuit selects the output of the vertical filter 21 for the odd numbered field of the video signal depending on a discrimination signal from a field discrimination circuit 10 and gives the selected signal to a memory 4 and the switching circuit selects the output of the vertical filter 22 for the even numbered field of the video signal depending on the discrimination signal from the field discrimination circuit 10 and gives the selected signal to the memory 4.

Description

Detailed Description of the Invention

[0001]

The present invention has an aspect ratio of 16: 9.
The present invention relates to a caption moving circuit mainly used in an image reproducing device having a display. Then, the present invention particularly compresses the display size of subtitles such as movie software in the vertical direction to 1/2 and moves the display position of the subtitles in the vertical direction,
It is an object of the present invention to provide a caption moving circuit that improves the display quality of captions.

[0002]

2. Description of the Related Art A TV receiver (hereinafter also referred to as a wide TV) equipped with a display having an aspect ratio of 16: 9, which has recently been introduced, is provided with a video signal of a Vista size or a cinema mode (an aspect ratio of 4: 3). When only the video area of the (signal for screen) is displayed on the full screen, if subtitles exist outside the video area (for example, if subtitles are inserted in the black band portion on the screen with an aspect ratio of 4: 3), The subtitle is 16:
It goes out of the screen of 9 and is not displayed. Therefore, a caption moving circuit that moves a caption signal existing outside the video area into the video area and displays the caption on the screen is required. The basic operation and purpose of the subtitle moving circuit are as shown in Japanese Patent Application No. 3-99365 and Japanese Patent Application No. 4-28988 by the present applicant. Further, the applicant has applied for a patent application filed on Mar. 13, 1992 as reference number H04000162 for a subtitle moving circuit that can move the subtitle display position by compressing the subtitle display size horizontally or vertically. is doing.

FIG. 4 shows a block diagram of a conventional subtitle moving circuit for moving a subtitle in the vertical direction by compressing the display size in the vertical direction to 1/2. A video signal that enters the input terminal 1 and includes a caption signal outside the video area is converted into a digital video signal by the A / D converter 2, and is supplied to the memory 4 via the vertical filter 3. The memory controller 5 writes and controls the memory 4 at the timing when the caption signal is present, and the caption signal is written in the memory 4. The written subtitle signal is read from the memory 4 by the memory controller 5 at a timing different from the writing (that is, the timing within the video area). The read caption signal is mixed with the digital video signal by the mixer (which is composed of a multiplexer) 7 by the character area signal obtained by the character detection circuit 6. This digital video signal is converted into an analog video signal by the D / A converter 8 and sent to the output terminal 9. When the signal obtained from the output terminal 9 is reproduced on the display, an image in which the caption is superimposed on the video portion and the caption is not missing can be obtained. The moving position of the subtitle in the vertical direction is determined by the read timing from the memory 4.

Next, the control of the memory 4 will be described.
Here, as the memory 4, a Fast in Fast out dual port memory (FiFo memory) is used. The memory controller 5 thins out the video signal of the nth field for each line and writes it in the memory, and reads the written signal from the memory in the (n + 1) th field. It is composed of a read control unit (read control unit). By thinning out and writing each line, 1/2 compression of the display size in the vertical direction is realized. The control of the memory 4 by the memory controller 5 is the same as that of the second embodiment of the above-mentioned patent application filed on Mar. 13, 1992: reference number H04000162, and therefore its explanation is omitted here.

Here, since the signal written in the memory 4 is read in the next field, the line control for writing and reading is properly performed according to the odd (Odd) field and the even (Even) field. You need to go to and keep the characters displayed correctly. A field discrimination circuit 10 is provided in order to perform this line control accurately. The field discriminating circuit 10 is supplied with the horizontal synchronizing signal (HD) and the vertical synchronizing signal (VD) of the video signal, and discriminates between the odd field and the even field of the video signal. Field correction is performed by correcting the line count value of the timing generation counter of at least one of the write control unit and the read control unit according to the determination signal from the field determination circuit 10 so that the character quality is maintained correctly. ing. Further, the vertical filter 3 is inserted to eliminate the vertical folding phenomenon. The vertical folding phenomenon means that when the subtitle size is compressed to 1/2 in the vertical direction by thinning out each line in the vertical direction, the information in the vertical direction of the subtitle is lost by 1/2, and This is a phenomenon in which the subtitles that have been made are difficult to identify.

According to the above principle, N fields and N +
FIG. 5 shows an algorithm for moving each subtitle signal existing in 1 field to N + 1 field and N + 2 field after 1 field. N field is Odd (odd) field, N + 1 field is Ev
It is assumed that an en (even number) field is set, and the caption signal is present in each field as a brightness level of 1 every 3 lines. This subtitle signal is a white line at level 1 and a black line at level 0 on the screen, and since two fields make up one screen, black and white horizontal lines are repeated every 12 lines.

In FIG. 4, the caption signal is used as an input signal (a signal at point A in FIG. 4). When the input signal passes through the vertical filter 3 (here, a vertical filter having coefficients of (1 / 2,1 / 2)), at the point B after passing, N
Field lines On, On + 1, On + 3, On + 4, ...
In the case of (n is an even number), the luminance level is halved (see FIG. 5), and the lines En and En + 1 of the N + 1 field are obtained.
, En + 3, En + 4, ..., but the brightness level is 1 /
It becomes 2. In the memory 4, it is assumed that the writing in the vertical direction is performed for every even line (the odd line is not written). N field lines On, On + 2, On + 4 at point B
, ... are line E of N + 1 field at point C
The lines En, En + 2, En + 4, ... Of the N + 1 field at the point B are read out to n, En + 1, En + 2, ..., and the lines On + 1, On + 2, of the N + 2 field at the point C. On + 3
, ... are read. At this time, the line reading at the time of reading the N + 2 field is performed by adding only one line to the reading of the N + 1 field (N + 1 at the point B).
The line En of the field is read to the line On + 1 of the N + 2 field at the point C. ). This is performed by correcting the line count value of the read timing generation counter in the read control unit according to the determination signal from the field determination circuit 10.

In this way, the input caption signal is output after the vertical display size is compressed to 1/2. The read line position at the point C (display position in the vertical direction of the subtitles on the screen) is an example shown in the figure, and can be arbitrarily changed by adjusting the read timing from the memory 4 as described above. (The same applies to FIG. 2 described later).

As shown in FIG. 5, O of the input signal (point A)
Twelve lines from the n line to the En + 5 line are compressed into 6 lines from the En line to the On + 3 line in the output signal (point C). As described above, the input signal is such that four horizontal lines of black and white and black and white repeat every 12 lines. On the other hand, in the output signal, 6 lines corresponding to 12 lines of the input signal have two luminance levels 1/2, two luminance levels 0, two luminance levels, and two luminance levels 1/2. It has become a continuation of the line. This is different from the input signal because three horizontal lines of black and white and white are repeated. Therefore, even if the display size of the subtitles can be compressed to 1/2 in the vertical direction, the quality of the compressed subtitles may be considerably deteriorated, and the subtitles may be difficult to read.

As described above, there are various other signal patterns in which the output signal is modified with respect to the input signal.
In some cases, the output signal may have more horizontal line information than the input signal, and in this case, the horizontal line is displayed as doubled, which again has a problem of degrading subtitle quality.

[0011]

SUMMARY OF THE INVENTION The problem to be solved by the present invention is to improve the quality of a subtitle that is moved by compressing the display size to 1/2 in the vertical direction without largely changing the configuration of the conventional circuit. The point is what kind of means should be taken to make the subtitle moving circuit that can be improved.

[0012]

In order to solve the above problems, the present invention provides a vertical filter to which a video signal including a caption signal is supplied, a memory to which an output of the vertical filter is supplied, and A field discriminating circuit for discriminating between an odd field and an even field of the video signal;
A memory controller comprising a write control unit for thinning out the video signal of the field for each line and writing the thinned signal in the memory, and a read control unit for reading the written signal in the (n + 1) th field from the memory. In a caption moving circuit that compresses the display size of the caption signal in the vertical direction to 1/2 and moves the display position of the caption signal in the vertical direction, the vertical filter includes a first vertical filter and a first vertical filter thereof. Vertical filter is a second vertical filter having a delay time different by ½ of one horizontal scanning period and a second vertical filter, and the video signals are supplied to the first and second vertical filters, respectively. And a switching circuit for switching the output of the second vertical filter for each field according to the discrimination signal from the field discrimination circuit and supplying the same to the memory. There is provided a subtitle moving circuit, characterized in that the.

[0013]

BEST MODE FOR CARRYING OUT THE INVENTION According to the present invention, a conventional vertical filter 3 comprises a first vertical filter and a second vertical filter having a delay time different from that of the first vertical filter by 1/2 of one horizontal scanning period (1H). And a video signal including a subtitle signal is supplied to each of the first and second vertical filters. The subtitle moving circuit is provided with a switching circuit that switches the outputs of the first and second vertical filters for each field according to the discrimination signal from the field discrimination circuit 10 and supplies them to the memory. Since the other configurations are the same as those in the conventional example, and the control of the memory 4 and the like are also the same as those in the conventional example, the description will focus on the first and second vertical filters and the switching circuit.

FIG. 1 shows an essential part of an embodiment of the present invention.
The first vertical filter 21 is a (1/4, 1/2, 1/4) type vertical filter, and the second vertical filter 22 is a (1/2, 1/2) type vertical filter. The first vertical filter 21 and the second vertical filter 22 have different delay times of (1/2) H. Each of the vertical filters 21 and 22 has an A / D converter 2
A video signal (including a caption signal outside the video area) converted into a digital video signal in (see FIG. 4) is supplied. The switching circuit 23 responds to the discrimination signal from the field discrimination circuit 10 in the odd (Odd) field of the video signal.
The output of the (1/4, 1/2, 1/4) type vertical filter 21 is selected and supplied to the memory 4. Further, the switching circuit 23 selects the output of the (1/2, 1/2) type vertical filter 22 in the even field of the video signal in response to the discrimination signal from the field discrimination circuit 10 to select the output of the memory 4. Supply to.

FIG. 2 shows the algorithm of this embodiment when the input signal at point A in FIG. 1 is the same as the input signal shown in FIG. This algorithm is also similar to the conventional example, in which the subtitle signals existing in the N field and the N + 1 field of the input signal are added N + 1 after one field.
This is an algorithm for moving to the field, N + 2 field and compressing the display size in the vertical direction to 1/2.

Since the N field is an odd field, the signal of the N field passes through the (1/4, 1/2, 1/4) type vertical filter 21 and is output to the point B. The signal of the brightness level 1 of the On line of the N field at the point A is
At point B, signals of luminance levels 1/4, 1/2, and 1/4 appear on the On, On + 1, and On + 2 lines, respectively.
The signal in the N + 1 field, which is an even field, is (1 /
The signal that has passed through the 2, 1/2) type vertical filter 22 is output to point B. The signal of the brightness level 1 of the En line of the N + 1 field at the point A is En, En + 1 at the point B.
On each line of, appear as signals of luminance level 1/2, 1/2 respectively.

The response at the point C, which is the output of the memory 4, is obtained by the same algorithm as in FIG. 5, and is the response to the 12 lines of the input, and the brightness levels of 6 lines En to On + 3 at the point C are shown. Becomes 1 / 4,1 / 2,1 / 4,0,1 / 2,1 / 2. In the output of the memory 4, this brightness level is 1 / 4,1 / 2,1 / 4,0,1 / 2,1 /
2 is repeated every 6 lines. As shown in the luminance distribution at point C in FIG. 2, line a has a luminance level of 1/2 and high luminance, next line b has a luminance level of 1/4 and low luminance, and line c has a luminance level.
1/2 for high brightness, d line for brightness level 1/4 for low brightness, e
Line has brightness level 0 and low brightness, f line has brightness level
The brightness is 1/2 and the g-line is high at the brightness level 1/2. Here, the f line and the g line have the same brightness level 1 /
Since it is 2, a high-intensity horizontal line display in which the f line and the g line are combined is obtained. Considering this one high-intensity horizontal line display combining the f-line and the g-line as the beginning of the repetition of the next six lines, high-intensity (a-line) between the six lines a to f -Low brightness (b line) -high brightness (c line) -low brightness (d line and e line) 4 horizontal lines are displayed. Therefore, at point C, four horizontal lines of high brightness, low brightness, high brightness, and low brightness are repeated every 6 lines. This coincides with the repetition of black and white and black and white (repetition of high brightness, low brightness, high brightness and low brightness) for every 12 lines of input at point A.

Therefore, even if the subtitle moving circuit compresses the display size in the vertical direction to ½ and moves the subtitle, the quality of the subtitle is significantly improved as compared with the conventional one.

The point of improving the subtitle quality is (1 / 4,1 /
The delay time between the (1,1 / 4) type vertical filter 21 and the (1 / 2,1 / 2) type vertical filter 22 is different by 0.5H. Figure 3
A block diagram of the (1/2, 1/2) type vertical filter 22 and the (1/4, 1/2, 1/4) type vertical filter 21 is shown in FIG. In FIG.
31, 35, 36 are 1H delay lines, 32, 33,
37 to 39 are multipliers, and 34 and 40 are adders. Figure 3
The transfer function ZTa and the delay time τa of the vertical filter 22 shown in (a) are ZTa = (1/2) + (1/2) Z ^- 1τa = 0.5H, which is shown in FIG. The transfer function ZTb of the filter 21 and the delay time τb are ZTb = (1/4) + (1/2) Z- ¹ + (1/4) Z ^- 2τb = 1.0H.

The two vertical filters are not limited to the embodiments, as long as the delay times differ by 0.5H. For example, the first vertical filter may be a through filter and the second vertical filter may be a (1 / 2,1 / 2) type vertical filter. Further, in the present invention, as compared with the conventional example, it is sufficient to use two vertical filters as the vertical filters and to provide a switching circuit for switching the outputs of the two vertical filters (the switching control signal includes the conventional field discrimination circuit). It suffices to use the discrimination signal), and it can be realized at low cost.

[0021]

As described above, the subtitle moving circuit according to the present invention can improve the subtitle quality when moving the subtitles by compressing the display size to 1/2 in the vertical direction. Furthermore, this subtitle moving circuit can be easily manufactured at low cost.

[Brief description of drawings]

FIG. 1 is a block diagram showing a main part of an embodiment.

FIG. 2 is a diagram for explaining an algorithm of an embodiment.

FIG. 3 is a block diagram showing a configuration of a vertical filter.

FIG. 4 is a block diagram showing a conventional caption moving circuit.

FIG. 5 is a diagram for explaining an algorithm of a conventional caption moving circuit.

[Explanation of symbols]

1 Input Terminal 2 A / D Converter 3 Vertical Filter 4 Memory 5 Memory Controller 6 Character Detection Circuit 7 Mixer 8 D / A Converter 9 Output Terminal 10 Field Discrimination Circuit 21 First Vertical Filter ((1 / 4,1 / (2,1 / 4) type vertical filter) 22 Second vertical filter ((1 / 2,1 / 2) type vertical filter) 23 Switching circuit

Claims (1)

[Claims] 1. A vertical filter to which a video signal including a caption signal is supplied, a memory to which an output of the vertical filter is supplied, and a field discrimination circuit for discriminating an odd field and an even field of the video signal. A memory controller comprising a write controller for thinning out the video signal of the nth field for each line and writing the thinned signal in the memory, and a read controller for reading the written signal in the (n + 1) th field from the memory. In a caption moving circuit for compressing the display size of the caption signal in the vertical direction to 1/2, and moving the display position of the caption signal in the vertical direction, the vertical filter is a first vertical filter, The first vertical filter includes two filters, that is, a second vertical filter having a delay time different by 1/2 of one horizontal scanning period, and And the second vertical filter, and supplies the video signal to the memory by switching the output of the first and second vertical filters for each field in accordance with the determination signal from the field determination circuit. A caption moving circuit having a switching circuit.