JP3363480B2 - Two-screen display method - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a two-screen display method of interlaced scanning for displaying a sub-screen on a part of a main screen. 2. Description of the Related Art Conventionally, an interlaced scanning dual-screen television receiver having a so-called picture-in-picture function has a child screen compressed to 1/9, 1/16 or the like in a part of a main screen. In order to display a screen, a signal of the child screen is formed by digital compression using a child screen memory (field memory), and this signal is replaced with a part of the signal of the parent screen to be synthesized with the signal of the parent screen. At this time, since a video signal such as a television signal is an interlace scanning signal,
It is necessary to determine the fields of the signals of both screens by the field determination described in JP-A-39472 (H04N 5/44) and the like, and to form a signal of the child screen in the same field as the parent screen based on the result of this determination. [0004] In order to form a signal of a sub-screen in the same field as that of the main screen, no matter what the field relationship between the main screen and the sub-screen, the signal fields of both screens become the same and the sub-screen memory In order to avoid overtaking of the read memory address with respect to the write memory address when the write field and the read field of the same become the same (hereinafter referred to as "memory address overtaking"), usually, as the child screen memory, two for each of the even and odd fields are used.
Requires one field memory. In order to reduce the capacity of the small screen memory,
Conventionally, it has been devised to detect the presence or absence of overtaking of a memory address and adjust the timing of writing and reading based on the detection result to avoid overtaking. In this case, 1 for each of the even and odd fields
It is sufficient to provide one field memory, and the memory capacity is reduced by half. Next, a conventional two-screen display method for detecting the presence / absence of overtaking of a memory address will be described with reference to FIGS. 3 to 5 applied to a two-screen television receiver. As shown in FIG. 3, the first video signal Sm supplied from the tuner or the external input terminal to the main screen video terminal 1 is transmitted via the video signal processing circuit 2 and the main screen contact 3m of the signal synthesizing switch 3. It is supplied to the RGB processing circuit 4. Then, the processing circuit 4 converts the video signal Sm into three primary color signals, and supplies this signal to the CRT 5 to display the parent screen in a normal size (1/1 times).
The second video signal Ss supplied from the tuner or the external input terminal to the small-screen video terminal 6 is, for example, 1/9.
Alternatively, the signal is supplied to the small-screen processing circuit 7 in order to form the signal of the small screen compressed to 1/16 and the switching signal SW of the changeover switch 3. At this time, since the signals of the child screen are formed in synchronization with the signals of the parent screen, the first and the first signals from the synchronization separation circuit and the like are output.
Synchronization signal SYN of each of second video signals Sm and Ss
Cm, SYNCs are also the main screen, the sub screen synchronization signal terminal 8,
9 to the processing circuit 7. The processing circuit 7 is configured as shown in FIG. 4. For example, the second video signal Ss is subjected to filtering by the horizontal low-pass filter 10 and the vertical low-pass filter 11 in order to form a 1/9 compressed small picture. Then, the horizontal and vertical directions of each field are time-compressed to 1/3. At this time, as shown in FIG. 5, the vertical direction of the even field of the solid line is three lines H as shown in FIG.
_{n, H n + 2, H} n + 4 is compressed by thinning out one line h _m, the vertical direction each 3 lines H dashed odd field
_{n + 1,} Hn _{+ 3,} and Hn _{+ 5} are compressed by thinning them to one line hm _{+ 1} . [0010] The small picture signal formed by time compression of the video signal Ss is converted into a digital signal by the A / D converter 12, and the small picture memory having a two-field memory configuration is written in accordance with the write control of the memory control circuit 13. 1
4 is written for each field. The synchronization signal SY of the synchronization signal terminals 8 and 9 is
NCm and SYNCs are supplied to the parent screen and child screen field determination units 15 and 16, respectively.
In step 16, the even and odd numbers of the respective fields of the video signals Sm and Ss are determined from the equivalent pulse and the like. The determination results of the two determination units 15 and 16 are supplied to a parent-child field and memory address overtaking determination unit 17, which determines video signals Sm and Ss based on the determination results of the determination units 15 and 16. , That is, the field relationship between the parent screen and the child screen, and whether the passing of the read address of the memory 14 with respect to the video signal Sm when the fields of the two screens are the same is detected by the memory address overtaking determination. I do. Then, based on the grasp of the field relationship between the parent and child screens and the detection of the address overtaking, the judging section 17 instructs the memory control section 13 to control the writing and reading to avoid the memory address overtaking. Based on this command, the memory control unit 13 controls writing and reading of the memory 14, and by this control, the signal of the child screen in the same field as the parent screen is read from the memory 14 at the timing of the child screen display position. Further, the signal read from the memory 14 is returned to an analog signal by the D / A converter 18, and this signal is supplied to the sub-screen contact 3s of the changeover switch 3 in FIG. Is done. Further, the memory control unit 13 forms a switching signal SW that is inverted at the sub-screen insertion position of each field, and supplies this signal SW to the switching switch 3. Then, only when the changeover switch 3 is in the sub-screen insertion position, the main screen contact 3m is switched to the sub-screen contact 3s, and a video signal for two-screen display in which a sub-screen of the same field is inserted in a part of the main screen. Is formed. When the presence or absence of the overtaking of the memory address is not detected, the control of the memory 14 may be instructed only by the determination of the field relationship of the parent and child screens by the determination unit 17 of FIG.
Is simple, but it is necessary to provide two field memories for each of the even and odd fields in the memory 14 as described above in order to avoid overtaking of the memory address. In the conventional two-screen display method, the signals of the even and odd fields of the child screen are formed from the even and odd fields of the second video signal, respectively, and the main screen is displayed. In order to select the signal of the child screen of the same field as the field of and to combine with the signal of the parent screen,
There is a problem that it is necessary to determine the field relationship between the first and second video signals, that is, the field relationship between the parent and child screens. The present invention enables a two-screen display to be performed without determining the field relationship between the parent and child screens. [0017] To achieve the above object Means for Solving the Problems] In the two-screen display method of the present invention, an even field, the previous <br/> SL of either the field of odd field Time compression in the horizontal direction for video signal 2
Two low-pass filters with different filter coefficients in the direct direction
Each line is compressed, and even compression is applied to both
Forming a field and signals of the odd field, the first
2 video signal even and odd fields
Prepare the signals for both fields of the inset screen,
Even number of parent screen based on field discrimination of video signal of
In each of the field and the odd field, a signal of a sub-screen in the same field as the main screen is selected, and a first video signal and a signal of the selected sub-screen are combined to form a video signal for two-screen display in each field. I do. [0018] SUMMARY OF case of two-screen display method of the present invention configured as described above, even-numbered, the second time compressing and vertically only in the horizontal direction in the video signal of one field in the odd
Of the one field
Are formed from the second video signal, and the signal of the child screen in the same field as the parent screen is selected and synthesized with the signal of the parent screen based on the field determination result of the parent screen. In this case, the field of the second video signal
Irrespective of the field, the signals of the child screens of both fields are always prepared, so that the same field is determined only based on the field determination of the parent screen without determining the field relationship of the parent and child screens.
Select the signal of the sub- screen of the field, and select the two screens of each field.
A video signal for display can be formed . An embodiment will be described with reference to FIGS. 1 and 2. In FIG. 1, the same reference numerals as those in FIGS. 3 and 4 denote the same components, 19 is a small screen processing circuit provided in place of the processing circuit 7 in FIGS. 3 and 4, and 20 corresponds to the low-pass filter 11 in FIG. The vertical low-pass filter includes two low-pass filters having different filter coefficients. Reference numerals 21a and 21b denote A / D converters 12 shown in FIG.
Are two A / D converters, and 22 is a memory control circuit corresponding to the control circuit 13 in FIG. Note that the field determination unit 16 in FIG. 4 is omitted. Since the determination of the parent-child field and the determination of the overtaking of the memory address are unnecessary, the determination unit 17 shown in FIG.
Has also been omitted. On the other hand, the small-screen memory 14 is formed to have a capacity of two fields in which one field memory is provided for each of the even and odd fields as in FIG. Then, the second video signal Ss supplied to the small-screen video terminal 6 is supplied to the vertical low-pass filter 20 via the same horizontal low-pass filter 10 as in the prior art, in order to compress it to 1/9. This filter 20 converts the output signal of the low-pass filter 10 into a filter 2 having different filter coefficients.
In parallel, the video signal Ss of the preset one of the even and odd fields, for example, the video signal Ss of the even field is time-compressed to simultaneously form the sub-screen signals of both fields. That is, the video signal S of the even field
s represents three solid lines H _n , H _{n + 2,}
Hn _{+ 4} is processed in parallel by two low-pass filters having different filter coefficients of the filter 20, and the signals of the even-numbered and odd-numbered field sub-pictures obtained by compressing three lines to one line are output for each even-numbered field of the video signal Ss. It is formed. Note that three broken lines H _{n + 1} , H _{n + 3,} H
_{n + 4} indicates a line of the video signal Ss in the odd field. The signals of the child screens in both fields of the low-pass filter 20 are converted into digital signals by A / D converters 21a and 21b and supplied to the memory 14. At this time, based on the synchronization signal SYNCs of the second video signal Ss at the synchronization signal terminal 9, the memory control unit 2
2 writes the output signals of the A / D converters 21a and 21b into the memory 14 for each field only in the even field of the second video signal Ss, and rewrites the sub-screen signals of both fields for each even field of the video signal Ss. While holding it in the memory 14. Next, in order to read out the signal of the sub-picture in the same field as the parent picture from the memory 14, the synchronization signal SYNCm of the first video signal Sm of the synchronization signal terminal 8 is determined by the determination unit 1.
5 to determine the field of the parent screen. The result of this determination is stored in the memory controller 22.
The control unit 22 selects and reads out a signal of the child screen in the same field as the parent screen from the memory 14. In this case, provides child picture signal of both fields in the memory 14 is held at all times because, without performing the determination of the conventional parent-child screen field relationship, selects the sub-screen signal in the same field as the main screen , 2-screen display for each field
Ru can form a video signal of use. By the way, the first and second video signals Sm,
If the fields of Ss match, in the even-numbered field in which the sub-screen memory 14 is rewritten, the memory address may be overtaken depending on the display position (read timing) of the sub-screen. In other words, even if the sub-screen memory 14 is a dual-port memory so that the writing and reading of the memory 14 can be performed simultaneously, particularly when the display position of the sub-screen is above the screen, the writing of the signal of the sub-screen may be interrupted. The memory address of the read is overtaken. In order to prevent the occurrence of the overtaking without performing the conventional complicated memory address overtaking determination, in this embodiment, the reading of the signal of the small picture is performed by the control unit 22 as described below. adjust. That is, when the field of the determination result of the determination unit 15 and the field of the second video signal determined from the synchronization signal SYNCs match, the control unit 22 reads from the small screen memory 14 regardless of the designation of the display position of the small screen. The reading of the signal of the child screen is shifted to the end side of the field, and the display position of the child screen is located below the screen where the overtaking of the memory address does not occur. The signal of the child screen read from the memory 14 is converted back to an analog signal by the D / A converter 18 and supplied to the child screen contact 3s of the changeover switch 3 in FIG. Further, the changeover switch 3 is switched by the changeover control signal SW of the memory control unit 23, and a two-screen display in which a child screen compressed to 1/9 of the same field is inserted into a part of the main screen similar to the case of FIG. Is formed. Therefore, the determination of the field relationship between the parent and child screens is omitted, and the conventional determination of overtaking of the complicated memory address is also omitted. In addition, the memory capacity of the child screen memory 14 is reduced to the minimum required two fields and the two-screen display is performed. Can be performed. In the case of Figure 1, as it is apparent from a comparison of FIGS. 2 and 5, similar to the conventional one each of the frame 6 line H _n
Because to H _{n + 5} from 2 lines h _m, h _{m + 1} is formed,
Deterioration of image quality due to inter-frame correlation is extremely small. In the above embodiment, the case where the small picture is formed by compressing it to 1/9 has been described.
In the case of forming by compression to 16, the same processing as in the embodiment can be performed. Since the present invention is configured as described above, the following effects can be obtained. Even fee
Field, only the second video signal of one field in the odd field, the time compression and vertical way in the horizontal direction
The second video of one field.
To form a signal of both fields of Oh signal only or Raco screen,
Even and odd fields of the main screen
First, prepare signals for both fields of the inset screen, and
Based on the field determination result of the signal e, the signal of the child screen in the same field as the parent screen is selected and combined with the signal of the parent screen.Therefore, only the field determination of the parent screen is performed without determining the field relationship between the parent and child screens. Based on parent screen and
Select the sub-screen signal of the same field, every field
Can be formed , and the interlaced scanning two-screen display processing can be performed by a simple method.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram of an embodiment of a two-screen display method according to the present invention. FIG. 2 is an explanatory diagram of signal formation of a child screen in FIG. 1; FIG. 3 is a block diagram of a two-screen display television receiver. FIG. 4 is a block diagram for explaining a conventional display method applied to FIG. 3; FIG. 5 is an explanatory diagram of signal formation of a child screen in FIG. 4; [Explanation of Signs] Sm First video signal Ss Second video signal 14 Child screen memory 15 Field determination unit for parent screen

Claims (1)

(57) [Claim 1] A sub-picture formed by compressing an interlaced scanning second video signal is partially added to a parent picture based on an interlaced scanning first video signal. In the two-screen display method for displaying, a field of one of an even field and an odd field is displayed.
For the second video signal of Rudo, a horizontal time
Compressed two vertical filters with different filter coefficients in the vertical direction
Line compression is performed by each of the filters, and the even and odd field signals of the sub- screen are formed by the two compressions, and the even field of the second video signal is formed.
Field and the odd field each
Field signal and prepares a master image based on the field discrimination of the first video signal.
For each of the even field and the odd field of the screen, a signal of a child screen in the same field as the parent screen is selected, and the first video signal and a signal of the selected child screen are combined to display two screens in each field. A two-screen display method comprising forming a video signal.