JPH05158069A - Liquid crystal display - Google Patents

Abstract

PURPOSE:To improve the yield of production and to provide the higher fineness and higher opening ratio by forming the liquid crystal display device into a multilayered structure in which picture element electrodes, the source lines and gate lines of picture element transistors and the picture element electrodes are divided into three layers by insulating films. CONSTITUTION:Source lines 7 to constitute a 1st wiring layer and metallic wirings 8 connecting the picture element electrodes 10 and drain parts are formed. An etching liquid of indium tin oxide film (ITO) penetrates and corrodes from the spacings between the 2nd interlayer insulating films 9 in some cases at the time of patterning the picture element electrodes 10 if the wirings are formed of Al to be normally used as the metallic wirings of low resistance and, therefore, a metal having acid resistance, for example, chromium, is selected as the metallic wirings 8. The film of an insulator, such as quartz, is formed again as the 2nd interlayer insulating film 9 and is opened with contact holes. A transparent conductive film consisting of the ITO, etc., is formed as the picture element electrodes 10 to obtain the contact of the drain parts and the metallic wirings 8. Finally, the film of the insulator is formed as a moisture resistant protective film 11, by which the substrate is completed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device.

[0002]

2. Description of the Related Art FIG. 4 is a plan view of a conventional pixel portion of an active matrix type liquid crystal display device using a conventional thin film transistor, and FIG. 3 is a sectional view taken along line BB 'of FIG. As shown in FIG. 3, the source line 7 serving as the first wiring layer of the pixel transistor and the pixel electrode 10 serving as the third wiring layer are formed in the same layer. The wiring of the thin film drive circuit is formed by the first wiring layer.

Explaining the substrate manufacturing process, first, polycrystalline silicon (hereinafter abbreviated as p-Si) is formed on a quartz substrate.
After the film is deposited, it is patterned. Next, the gate oxide film 4 is grown by thermal oxidation of the p-Si film, and CVD is performed again.
After that, a p-Si film is deposited, the resistance value is reduced by thermal diffusion of impurities, and patterning is performed to form the gate electrode 5 to be the second wiring layer. Impurity ions are implanted using the gate electrode 5 as a mask to form a thin film transistor, an interlayer insulating film 6 is deposited to form a contact hole, and then the pixel electrode 10 and the metal wiring 7 are repeatedly vacuum-deposited and patterned. Formed by. Finally,
The moisture resistant protective film 11 is formed to complete the substrate.

[0004]

However, the conventional technique has the following problems because the source line 7 of the pixel transistor and the pixel electrode 10 are formed in the same layer. First, a short circuit may occur between the source line 7 and the pixel electrode 10 due to misalignment or residual etching. Secondly, the electric field generated by the current flowing through the source line 7 may act on the liquid crystal to cause abnormal display. Thirdly, in order to solve the above problems, it is necessary to provide a space of about 4 μ between the source line 7 and the pixel electrode 10 as shown in FIG. 4, which hinders high definition and high aperture ratio. Has become.

The object of the present invention is to solve the above problems,
It is intended to improve yield, achieve high definition and high aperture ratio.

[0006]

In the active matrix type liquid crystal display device using a thin film transistor for driving a pixel, a source line and a second wiring layer which are a first wiring layer of a pixel transistor are provided. This is achieved by forming a multi-layer structure in which the gate line and the uppermost pixel electrode, which is the third wiring layer, are divided into three layers by an insulating film.

[0007]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to FIG. 2 which is a structural plan view of a pixel portion and FIG. 1 which is a sectional view taken along the line AA '.

Although the steps up to the formation of the thin film transistor are the same as the conventional steps, the steps will be described from the beginning. First, a p-Si film is formed on a quartz substrate in a low pressure CVD furnace at 800 to 2000.
Å Gate oxide film 4 of 1000 to 2000 Å by thermal oxidation of p-Si film after deposition and patterning
Grow. A p-Si film is deposited thereon in a low pressure CVD furnace, and impurities such as phosphorus are thermally diffused to reduce the resistance value. This is patterned to form the gate electrode 5. Using the gate electrode 5 as a mask, ions of impurities such as boron and phosphorus are ion-implanted to form the source part 2 and the drain part 3, and the part where no impurity is ionized becomes the channel part 1. Next, the film thickness is 4000 to 150
A first interlayer insulating film 6 of 00Å is formed of quartz or the like, and a contact hole is opened. The process up to this point is the same as the conventional process.

The formation of each layer thereafter is performed by repeating vacuum deposition and patterning.

First, FIG. 1 shows the pixel transistor portion. The source line 7 serving as the first wiring layer and the pixel electrode 10
A metal wiring 8 for connecting the drain portion and the drain portion is formed. At this time,
When wiring is made of Al, which is usually used as a low-resistance metal wiring, an etching solution for a transparent conductive indium oxide film (abbreviated as ITO) used as a pixel electrode when patterning the pixel electrode 10 later is described later. A metal having acid resistance (for example, chromium) is selected as the metal wiring 8 because it may penetrate and corrode from the gap of the second interlayer insulating film 9 which is used. An insulator such as quartz is again formed as the second interlayer insulating film 9, and a contact hole is opened. A transparent conductive film such as ITO is formed as the pixel electrode 10 to make contact with the metal wiring 8 connected to the drain portion.
At this time, the drain portion 3 and the pixel electrode 10 may be directly connected without the metal wiring 8. In this case, the contact hole is opened separately.

As shown in FIG. 2, when the pixel electrode and the source line or the gate line are partially overlapped with each other through the insulating film, the source line 7 is overlapped with the pixel electrode 10 with a width of about 8 μ, for example. If the area is 2μ, the inter-pixel size is 4μ. In the conventional structure, if the width of the source line 7 is 4 μm and the distance between the source line 7 and the pixel electrode 10 is 4 μm in FIG. 4, the dimension between pixels is 12 μm. The size can be reduced to 1/3. In addition, since a path for transmitted light is normally provided between the source line 7 and the pixel electrode 10, a black stripe (light-shielding layer) is required on the counter substrate side. According to this structure, the structure shown in FIGS. 1 and 2 is used. Since the source line 7 and the gate line 5 play the role of a light-shielding layer, the black stripe is not required on the counter substrate side, and the alignment accuracy required when assembling the panel is greatly eased.

The drive circuit section will be described with reference to FIG. 6 which is a structural plan view and FIG. 5 which is a CC ′ sectional view thereof. The thin film transistor body is formed up to the first interlayer insulating film 6 at the same time as the pixel portion. After wiring the source line 7 to be the first wiring layer, the second interlayer insulating film 9 is formed. Next, contact holes are collectively formed in the three layers of the gate oxide film 4, the first interlayer insulating film 6 and the second interlayer insulating film 9 to form a fourth metal wiring made of a low resistance material such as Al. 12 is formed. FIG. 5 shows the source / drain region 3.
And the fourth metal wiring 12 are directly connected to each other, but they may be connected to each other via the first wiring layer 8 as shown in FIG.

Finally, an insulator such as quartz or polyimide film is formed as the moisture resistant protective film 11 to complete the substrate of the liquid crystal display device.

[0014]

According to the present invention, the interlayer insulating film prevents a short circuit between the pixel electrode and the source line and an abnormal display caused by the electric field of the source line acting on the liquid crystal, so that the quality can be improved. In addition, since the pixel electrode and the source line can be formed so as to overlap with each other, the pitch can be reduced, and since the source line and the gate line can be used together with the black stripe, high definition and high resolution can be achieved. Effective for increasing the aperture ratio.

When the thin film drive circuit has a multi-layer wiring structure, the interval between the transistors can be reduced, which is suitable for miniaturization. Since the interlayer insulating film on the gate line 5 has two layers, short-circuiting between the fourth metal wiring 12 and the gate line 5 is reduced, and the quality is improved.

[Brief description of drawings]

FIG. 1 is a sectional view of a pixel portion according to an embodiment of the present invention (A- in FIG. 2).
A'section).

FIG. 2 is a plan view of a pixel portion according to an embodiment of the present invention.

FIG. 3 is a cross-sectional view of a pixel portion in a conventional liquid crystal display device (cross section BB ′ in FIG. 4).

FIG. 4 is a plan view of a pixel portion of a conventional liquid crystal display device.

FIG. 5 is a partial cross-sectional view of a drive circuit according to an embodiment of the present invention (cross section CC ′ in FIG. 6).

FIG. 6 is a plan view of a part of a drive circuit according to an embodiment of the present invention.

[Explanation of symbols]

 1 Channel part of thin film transistor 2 Source part of thin film transistor 3 Drain part of thin film transistor 4 Gate oxide film 5 Second wiring layer 6 First interlayer insulating film 7 First wiring layer (source line) 8 First wiring layer 9 Insulation interlayer film 10 Third wiring layer (pixel electrode) 11 Moisture resistant protective film 12 Fourth wiring layer

Claims (3)

[Claims] 1. An active matrix type liquid crystal display device using a thin film transistor for driving a pixel, wherein a source line serving as a first wiring layer of a pixel transistor, a gate line serving as a second wiring layer, and a third wiring. A liquid crystal display device having a multi-layer structure in which an uppermost pixel electrode which is a layer is divided into three layers by an insulating film. 2. The liquid crystal display device according to claim 1, wherein the pixel electrode and the source line or the gate line partially overlap with each other through an insulating film. 3. A liquid crystal display device in which a thin film drive circuit having a multilayer wiring structure including a first wiring layer, a second wiring layer, a fourth wiring layer and an intermediate insulating film between them is formed on the same substrate as an active substrate. ..