JPH04360577A - Photoelectric conversion device - Google Patents

Abstract

PURPOSE:To provide a photoelectric conversion device having low after image characteristics by reducing the density of a interface level formed at a metal/ semiconductor junction. CONSTITUTION:In a photoelectric conversion device having a structure in which an amorphous silicon layer 103 is laminated on a pixel electrode 102, an impurity concentration in the electrode 102 is that in the layer 103 or less. Numeral 101 denotes a substrate.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a photoelectric conversion device, and more particularly to a photoelectric conversion device with reduced photoconductive afterimages. The photoelectric conversion device of the present invention can be applied to, for example, a one-dimensional line sensor, a solid-state image sensor in which a photoelectric conversion film is laminated on a substrate on which a scanning circuit, a drive circuit, etc. are formed.

0002

[Prior Art] Photoelectric conversion elements using non-single crystal semiconductors are widely known, and among them, amorphous semiconductors mainly made of silicon and microcrystalline semiconductors can be manufactured at low temperatures and have a large area. Because it is easy to fabricate, it is used as a photoelectric conversion member for one-dimensional line sensors and stacked solid-state image sensors.

One of the structures of these photoelectric conversion elements is one in which a Schottky junction is formed between a pixel electrode and an intrinsic semiconductor layer (I layer). In manufacturing a conversion device, since the semiconductor layer has a high resistance, there is an advantage that the element isolation process required in the PIN structure can be omitted. An example is shown in FIG. This device has a pixel electrode 30 on a base 301.
2 is formed, an I-type amorphous silicon 303 is formed, and then an electrode 304 is formed. Here, sputtering method and vacuum evaporation method have been generally used as the electrode forming method.

0004

[Problems to be Solved by the Invention] However, such conventional photoelectric conversion devices have the disadvantage that there is a large density of interface states formed at the metal/semiconductor junction, resulting in a large photoconductive afterimage. are doing.

SUMMARY OF THE INVENTION In view of the problems of the prior art, it is an object of the present invention to provide a photoelectric conversion device with low afterimage characteristics by reducing the density of interface states formed at a metal/semiconductor junction. .

[0006]

[Means and Operations for Solving the Problems] In order to solve the above problems, the present invention provides a photoelectric conversion device having a structure in which a non-single crystal semiconductor layer is stacked on a pixel electrode. The present invention, which is characterized in that the concentration is lower than the impurity concentration in the non-single crystal semiconductor layer, focuses particularly on the concentration of impurities contained in the pixel electrode and the concentration of impurities contained in the semiconductor layer. be. The inventors believe that the afterimage characteristics largely depend on the density of levels formed by impurities such as oxygen, carbon, and nitrogen present in the semiconductor, and that the interface levels that affect the afterimage characteristics are generated by the process described below. This became clear. Generally, 1019 to 1021 impurities/cm3 are present in electrodes formed by conventional electrode forming methods such as sputtering, electron beam evaporation, and resistance heating evaporation. Further, the concentration of impurities present in amorphous silicon produced by the commonly used plasma CVD method is about 1018 to 1019 (particles/cm3). Therefore, when amorphous silicon is deposited on a pixel electrode to form a junction, impurities in the pixel electrode are incorporated into the amorphous silicon in the initial stage of film formation, so the impurity concentration at the interface is higher than that in the bulk of the amorphous silicon. The impurity concentration in the vicinity increases, which also increases the interface state density, leading to an increase in photoconductive afterimages.

In contrast, according to the present invention, the impurity concentration at least near the interface of amorphous silicon does not become higher than the impurity concentration in the bulk, and the afterimage caused by the interface states, which has been a problem in the past, can be drastically reduced. .

In realizing the present invention, it is effective to use the CVD method or the ultra-high vacuum sputtering method as a means for forming the pixel electrode. The ultra-high vacuum sputtering method referred to here means that the degree of vacuum in the vacuum container before film formation is 10-9.
(Torr) or less. In general electrode forming methods, the cause of impurities entering the electrode is particularly the influence of water remaining in the vacuum container, and therefore the above sputtering method is effective in reducing impurities. In addition, compared to general physical electrode formation methods such as sputtering and vapor deposition, electrode formation methods that utilize chemical reactions such as the CVD method have greater selectivity to products, so there is less contamination by impurities, and Effective for realizing inventions.

The present invention uses Pt, Au, W as the pixel electrode.
, Mo, Ti, Cr, Al, and other metals can be used. Further, the pixel electrode does not necessarily have to have a single layer structure, and may have a multilayer structure, for example, a combination of the above-mentioned metals and their oxides, nitrides, alloys, and the like. In this case, the electrodes may be formed using any method except for the uppermost layer where semiconductor layers are stacked.

Further, in the present invention, it is preferable to use silicon and a compound containing silicon and at least one of germanium and carbon as the non-single crystal semiconductor material.

[0011]

EXAMPLES Next, the present invention will be explained using examples, but the present invention is not limited to the following examples.

(Embodiment 1) FIG. 1 shows a sectional view of the vicinity of the light receiving section of a photoelectric conversion device according to an embodiment of the present invention. Glass substrate 101
After forming a 1000 Å film of tungsten on top by CVD method,
A plurality of pixel electrodes 102 were formed by patterning using a normal photolithography method. At this time, when forming the tungsten film, the raw material gas WF6: 2.0S
CCM, SiF4: 0.8SCCM, reaction pressure: 0.
The test was carried out under the conditions of 1 Torr and substrate temperature: 350°C. Next, by high-frequency plasma CVD method, I-type amorphous silicon 103 was deposited with a thickness of 8000 Å and P-type microcrystalline silicon 104 was deposited with a thickness of 30 Å.
A film with a thickness of 0 Å was continuously formed, and finally ITO 105 was formed with a thickness of 1000 Å as a transparent electrode. The conditions for producing the I layer and P layer at this time are shown in Table 1 below.

[0013]

[Table 1]

In addition, a conventional photoelectric conversion device was fabricated for comparison using the same steps as in the above example except that tungsten pixel electrodes were formed by a normal sputtering method.

The oxygen (impurity) concentration distribution and afterimage characteristics of the photoelectric conversion device of the present invention and the conventional photoelectric conversion device obtained as described above were evaluated. FIG. 2 shows the results of SIMS analysis. As shown in the figure, the oxygen concentration in the bulk of amorphous silicon is 1019 (particles/
cm3), but in the device of the present invention, the oxygen concentration near the pixel electrode interface is clearly drastically reduced compared to the conventional device. Furthermore, as a result of comparing the afterimage characteristics, the photoconductive afterimage of the device of the present invention was approximately 1/5 of that of the conventional device, confirming the superiority of the present invention.

(Example 2) In this example, a photoelectric conversion device is
This is an embodiment in which it is laminated on a scanning circuit and a readout circuit. FIG. 3 is a schematic cross-sectional view of the vicinity of the light receiving section of the device of this embodiment, FIG. 4 is an equivalent circuit diagram of one pixel, and FIG. 5 is an equivalent circuit diagram of the entire device of this embodiment. In FIG. 3, an n- layer 202 serving as a collector region is formed by epitaxial growth on an n-type silicon substrate 201, and a p base region 203 and an n+ emitter region 204 are formed in the n- layer 202 to form a bipolar transistor. The p base region 203 is separated from adjacent pixels, and a gate electrode 206 is formed between horizontally adjacent p base regions with an oxide film 205 in between. Therefore, a p-channel MOS transistor is constructed by using the adjacent p base regions 203 as source and drain regions, respectively. Gate electrode 206 also functions as a capacitor for controlling the potential of p base region 203.

Furthermore, after forming the insulating layer 207, an emitter electrode 208 and a base electrode 208' are formed. After that, an insulating layer 209 is formed, and then a pixel electrode 21 is formed.
1 of Cr and 212 of Pt are deposited and separated for each pixel. At this time, Cr 211 is produced using a normal sputtering method, and Pt 212 is produced using an ultra-high vacuum sputtering method. Further, here, Cr of the electrode 211 is electrically connected to the base electrode 208'.

Next, by high frequency plasma CVD method, I
A type amorphous silicon 213 and an n-type amorphous silicon carbide 214 are successively formed to form ITO for a transparent electrode 215. Further, a collector electrode 216 is ohmically connected to the back surface of the substrate 201.

Therefore, the equivalent circuit of one pixel is a bipolar transistor 731 made of crystalline silicon as shown in FIG.
A p-channel MOS transistor 732, a capacitor 733, and a photoelectric conversion element 7 similar to the first embodiment
34 is connected to the terminal 73 for applying a potential to the base.
5, a terminal 736 for driving a p-channel MOS transistor 732 and a capacitor 733, and a sensor electrode 7
37, an emitter electrode 738, and a collector electrode 739.

FIG. 5 shows the one-pixel cell 7 shown in FIGS. 3 and 4.
40 is a circuit configuration diagram in which 40 are arranged in a 3×3 two-dimensional matrix. In the figure, a collector electrode 741 of one pixel cell 740 is provided for each pixel, and a sensor electrode 742 is provided for each pixel.
are provided for each pixel. Furthermore, the gate electrodes and capacitor electrodes of the pMOS transistors are connected to drive wiring lines 743, 743', 743'' for each row, and are connected to a vertical shift register (V.S.R.) 744. The vertical wiring lines 746, 746', and 746'' for signal reading are connected to the respective vertical wiring lines 746, 746', and 746'' for signal reading. Vertical wires 746, 746', 746'' are switches 747, 74 for resetting the charges of the vertical wires, respectively.
7', 747'' and readout switch 750, 750',
750”. Reset switch 747,
The gate electrodes of 747' and 747'' are commonly connected to a terminal 748 for applying a vertical reset pulse, and the source electrodes are connected to a terminal 749 for applying a vertical line reset voltage. Readout switch 750 ，
The gate electrodes 750' and 750'' are connected to the wiring 751, respectively.
, 751', 751'' to the horizontal shift register (H
．． S. R) 752, and its drain electrode is connected to an output amplifier 757 via a horizontal readout wiring 753. The horizontal readout line 753 is connected to a switch 754 for resetting the charge of the horizontal readout line.

The reset switch 754 is connected to a terminal 755 for applying a horizontal wiring reset pulse and a terminal 756 for applying a horizontal wiring reset voltage. The output of amplifier 757 is then taken out from terminal 758.

The operation will be briefly explained below using FIGS. 3, 4 and 5.

Incident light is absorbed by the light absorption layer 213 in FIG. 3, and generated carriers are accumulated in the base region 203. When the drive pulse output from the vertical shift register 744 in FIG. 5 appears on the drive wiring 743, the base potential rises through the capacitor, and signal charges corresponding to the amount of light are transferred from the pixels in the first row to the vertical wirings 746, 746', 746. ” are taken out respectively.

Next, when scanning pulses are sequentially output from the horizontal shift register 752 to switches 751, 751', and 751'', switches 750, 750', and 750'' are turned ON and OFF in sequence.
FF control is performed, and the signal passes through the amplifier 757 to the output terminal 7.
It is taken out at 58. At this time, the reset switch 754 is turned on while the switches 750, 750', and 750'' are turned on in order, and the residual charge on the horizontal wiring 753 is removed.

Next, the vertical line reset switch 747,
747', 747'' are turned on, and the vertical wirings 746,
746' and 746'' are removed. Then, when a negative pulse is applied from the vertical shift register 744 to the drive wiring 743, the pMOS transistor of each pixel in the first row is turned on, and the base of each pixel is Residual charges are removed and initialization is performed.

Next, the drive pulse output from the vertical shift register 744 appears on the drive wiring 743', and the pixel signals of the second row are similarly taken out. Next, the signal charges of the pixels in the third row are extracted in the same manner.

The apparatus operates by repeating the above operations.

[0028]

[Effects of the Invention] As described above, according to the present invention,
By reducing the level density at the semiconductor/metal interface due to impurity migration from the electrode, which has been a problem in the past, it becomes possible to create a photoelectric conversion device with low afterimages.

[Brief explanation of the drawing]

FIG. 1 is a schematic longitudinal sectional view showing a first embodiment of a photoelectric conversion device of the present invention.

FIG. 2 is a depth profile of oxygen concentration obtained by SIMS analysis of a photoelectric conversion film of a photoelectric conversion device.

FIG. 3 is a schematic vertical cross-sectional view showing a second embodiment of the photoelectric conversion device of the present invention.

FIG. 4 is an equivalent circuit diagram of one pixel of a second embodiment of the photoelectric conversion device of the present invention.

FIG. 5 is an overall equivalent circuit of a second embodiment of the photoelectric conversion device of the present invention.

FIG. 6 is a schematic vertical cross-sectional view showing a conventional photoelectric conversion device.

[Explanation of symbols]

101 Glass substrate 102 W pixel electrode 103 I-type amorphous silicon 104 P-type microcrystalline silicon 105 ITO electrode 201 N-type silicon substrate 202 N- layer 203 P base region 204 N+ emitter region 205 Oxide film 206 Gate electrode 207 Insulating layer 208 Emitter electrode 208' Base electrode 209 Insulating layer 211 Cr pixel electrode 212 Pt pixel electrode 213 I-type amorphous silicon 214 N-type amorphous silicon carbide 215
Transparent electrode 216 Collector electrode 731 Bipolar transistor 732
P-channel MOS transistor 733 Capacitor 734 Photoelectric conversion device 735 Terminal 736 Terminal 737 Sensor electrode 738 Emitter electrode 739 Collector electrode 740 1 pixel cell 741 Collector electrode 742 Sensor electrode 743, 743', 743'' Drive wiring 744
Vertical shift register (V.S.R) 746, 74
6', 746" Vertical wiring 747, 747', 7
47" Reset switch 748 Terminal 749 Terminal 750, 750', 750" Readout switch 751, 751', 751" Wiring 752
Horizontal shift register (H.S.R) 753 Horizontal readout wiring 754 Reset switch 755 Terminal 756 Terminal 757 Amplifier 758 Terminal

Claims (6)

[Claims] 1. A photoelectric conversion device having a structure in which a non-single crystal semiconductor layer is stacked on a pixel electrode, characterized in that an impurity concentration in the pixel electrode is equal to or lower than an impurity concentration in the non-single crystal semiconductor layer. photoelectric conversion device [Claim 2]
2. The photoelectric conversion device according to claim 1, wherein the pixel electrode is manufactured by chemical vapor deposition. 3. The photoelectric conversion device according to claim 1, wherein the pixel electrode is manufactured by an ultra-high vacuum sputtering method. 4. The photoelectric conversion device according to claim 1, wherein the impurity is at least one of oxygen, carbon, and nitrogen. 5. The photoelectric conversion device according to claim 1, wherein the non-single crystal semiconductor layer contains at least silicon. 6. The non-single crystal semiconductor layer includes a charge storage portion,
The photoelectric conversion device according to claim 1, characterized in that the photoelectric conversion device is laminated on a substrate on which at least one of a drive circuit, a scanning circuit, and a readout circuit is formed.