JPH0359540A - Manufacturing method of liquid crystal display device - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed description of the invention]

INDUSTRIAL APPLICATION FIELD 1 This invention relates to a liquid crystal display device, and particularly to a method for manufacturing an active matrix type liquid crystal display device using thin film transistors and the like. [Prior Art] An active matrix type liquid crystal display device includes a plurality of pixels 1! arranged in a matrix. A nonlinear element (switching element) is provided corresponding to each pole. Theoretically, the liquid crystal in each pixel is always open (duty ratio 1.0), so compared to the so-called simple matrix method, which uses a time-division drive method, the active method has better contrast, which is especially important for color. It is becoming an indispensable technology. A typical switching element is a thin film transistor (TPT). In a conventional method for manufacturing an active matrix type liquid crystal display device, as shown in Japanese Patent Laid-Open No. 63-5379, source electrodes, drain electrodes, and pixel electrodes are independently patterned.

[Problem to be Solved by the Invention J] However, in this method of manufacturing a liquid crystal display device, the number of times a pattern is formed on the resist increases;
This poses problems in terms of yield and throughput, and also increases manufacturing costs. Oxidation of the source electrode surface or poor coating of the pixel electrode may result in a poor connection between the source electrode and pixel electrode, and when the liquid crystal panel is turned on, the poor connection will appear dark, impairing display quality. In addition, when the surface of the metal film on the first layer of the video signal line oxidizes, the contact resistance with the metal film on the second layer increases, and when the LCD panel is turned on, the line along the video signal line becomes oxidized. There was a problem that the image appeared dark, and a problem of poor printing, in which the initial image did not disappear for a while due to a residual DC voltage component that occurred because the electrons injected into the protective film were not removed. This invention was made to solve the above-mentioned problems, and aims to provide a method for manufacturing a liquid crystal display device that improves yield and throughput, provides good display quality, and reduces manufacturing costs. do. [Means for Solving the Problems] In order to achieve this object, the present invention provides a method for manufacturing an active matrix liquid crystal display device in which a thin film transistor and a pixel electrode are constituent elements of a pixel. A transparent conductive film to constitute an electrode is provided, a metal film is provided on the transparent conductive film, a resist is applied on the metal film, and a pattern of the pixel electrode, video signal line, source electrode, and drain electrode is formed on the resist. The prestige. After selectively etching the metal film, selectively etching the transparent conductive film, removing the resist, providing an insulating film constituting a protective film, and removing the insulating film of the pixel electrode portion, The metal film on the pixel electrode portion is removed.

[Function 1] In this method of manufacturing a liquid crystal display device, by forming a pattern on the resist once, pixel electrodes, video signal lines,
Since the source electrode and the drain electrode can be formed, the number of times a pattern is formed on the resist can be reduced. Since a multilayer metal film (Cr, A1, etc.) that forms the video signal line is formed on the transparent pixel electrode film (IT○ or 5nO2), contact resistance is reduced and electrical connection failures due to oxide film or poor coating are avoided. disappears. Since there is no protective film on the pixel electrode to trap electrons, no unbalanced residual DC component is generated, so there is no risk of burn-in defects when the liquid crystal panel is turned on. Embodiments An active matrix color liquid crystal display device to which the present invention is applied will be described below. Note that throughout the explanation of the liquid crystal display device, parts having the same functions are given the same reference numerals, and repeated explanation thereof will be omitted. FIG. 2A is a plan view showing one pixel and its surroundings of an active matrix color liquid crystal display device to which the present invention is applied, and FIG. 2B is a cross section taken along the line IIB-IIB in FIG. 2A and a seal portion of the display panel. A diagram showing a cross section of the vicinity,
FIG. 2C is a cross-sectional view taken along the NC-NC cutting line in FIG. 2A. Moreover, FIG. 3 (main part plan view) shows a plan view when a plurality of pixels shown in FIG. 2A are arranged. (Pixel Arrangement) As shown in Figure 2A, each pixel is connected to two adjacent scanning signal lines (gate signal lines or horizontal signal lines) GL and two adjacent video signal lines (drain signal lines or vertical signal lines). I
Within the intersection area with DL (within the area surrounded by four signal lines)
It is located in Each pixel has a thin film transistor TPT and a transparent pixel electrode ITO.
I and a storage capacitor element Cadd. Scanning signal line GL
extend in the column direction, and a plurality of them are arranged in the row direction. The video signal lines DL extend in the row direction, and a plurality of video signal lines DL are arranged in the column direction. (Overall cross-sectional structure of display section) As shown in FIG. 2B, a thin film transistor TPT and a transparent pixel electrode ITO1 are formed on the lower transparent glass substrate 5UBI side with respect to the liquid crystal LC, and the upper transparent glass substrate 5
On the UBZ side, a color filter FIL and a light shielding film BM forming a light shielding black matrix pattern are formed. The lower transparent glass substrate 5UBI is, for example, 1.1 [m
It is composed of a thickness of about ml. The central part of Figure 2B shows a cross section of one pixel,
The left side shows the cross section of the left edge of the transparent glass substrates 5UBI and 5UB2 where external lead wiring exists, and the right side shows the cross section of the right edge of the transparent glass substrates 5UB1.5UB2 where no external lead wiring exists. It shows. The sealing material SL shown on the left and right sides of FIG. 2B is configured to seal the liquid crystal LC, and the transparent glass substrates 5UBI, 5 excluding the liquid crystal sealing opening (not shown)
It is formed along the entire circumference of UB2. The sealing material SL is made of, for example, epoxy resin. Common transparent pixel electrode IT on the upper transparent glass substrate 5UBZ side
○2 is silver paste material SI in at least one place
L is connected to an external lead wiring formed on the UBI side of the lower transparent glass substrate 5. This external lead wiring includes a gate electrode GT, a source electrode SDI, and a drain electrode SD2.
are formed in the same manufacturing process as each. Alignment film ○RII, 0RI2, transparent pixel electrode ITOL, common transparent pixel electrode IT○2, protective film psv1, PSV2,
Each layer of the insulating film GI is formed inside the sealing material SL. Polarizing plate POLI. POL2 is formed on the outer surface of the lower transparent glass substrate 5UBI and the upper transparent glass substrate 5UB2, respectively. The liquid crystal LC has a lower alignment film 0RI that sets the direction of the liquid crystal molecules.
It is sealed between I and the upper alignment film ○RI2, and the seal part S
It is sealed by L. The lower alignment film 0RII is formed on the protective film PSVI on the lower transparent glass substrate 5UBl side. A light shielding film BM, a color filter FIL, and a protective film P are provided on the inner surface (liquid crystal LC side) of the upper transparent glass substrate 5UB2.
SV2, a common transparent pixel electrode ITO2 (COM), and an upper alignment film 0RI2 are sequentially stacked. This liquid crystal display device is constructed by separately forming layers on the lower transparent glass substrate 5UBl side and the upper transparent glass substrate 5UB2 side, and then overlapping the upper and lower transparent glass substrates 5UBI and 5UB2, and sealing the liquid crystal LC between them. Can be assembled. (Thin film transistor TPT> The thin film transistor TPT operates in such a way that when a positive bias is applied to the gate electrode GT, the channel resistance between the source and drain becomes small, and when the bias is reduced to zero, the channel resistance becomes large.Thin film transistor of each pixel TPT is 3 within a pixel.
It is divided into two (plurality) of thin film transistors (divided thin film transistors) TFTI, TFT2, and TFT3. Each of the thin film transistors TPTI to TFT3 has substantially the same size (channel length and width are the same). Each of the divided thin film transistors TPTI to TFT3 mainly has a gate electrode GT.
. Gate insulating film GI, i type (intrinsic, 1ntrinsic,
The i-type semiconductor layer AS is made of amorphous silicon (Si) (not doped with conductivity type determining impurities), and a pair of source electrode SDI and drain electrode SD2. Note that the source and drain are originally determined by the bias polarity between them, and in the circuit of this liquid crystal display device, the polarity is reversed during operation, so it should be understood that the source and drain are interchanged during operation. However, in the following description, for convenience, one side will be fixedly expressed as a source and the other side as a drain. (Gate electrode GT) The gate electrode GT is the same as that shown in FIG. 4 (I conductive film gl in FIG. 2A,
As shown in detail in the plan view depicting only the second conductive film g2 and the i-type semiconductor layer AS, it has a shape that projects vertically from the scanning signal line GL (upward in FIGS. 2A and 4). (branched into a T-shape). Gate fiiGT is thin film transistor TFTI-TFT
It is configured to protrude to each formation region of No. 3. The respective gate electrodes GT of the thin film transistors TPT1 to TFT3 are integrated (as a common gate electrode).
It is formed continuously with the scanning signal line GL. The gate electrode [xGT is formed by a single-layer first conductive film g1 so as not to create a large step in the formation region of the thin film transistor TPT. For example, a chromium (Cr) film formed by sputtering is used as the king conductive film g1.
It is formed with a film thickness of about 0 [person]. As shown in FIGS. 2A, 2B, and 4, this gate electrode GT is formed to be thicker than the i-type semiconductor layer AS so as to completely cover it (as viewed from below). Therefore, when a backlight BL such as a fluorescent lamp is attached below the lower transparent glass substrate 5UB1, the gate electrode GT made of opaque or ROM forms a shadow, and the backlight light does not shine on the i-type semiconductor layer AS. , a conductive phenomenon caused by light irradiation, that is, deterioration of the off-characteristics of the thin film transistor TPT, becomes less likely to occur. Note that the original size of the gate electrode GT is the minimum required size to span between the source electrode SDI and drain electrode SD2 (including the alignment margin between the gate electrode GT, the source electrode SDI, and the drain electrode SD2). )@, and its depth length that determines the channel width W is determined by the ratio of the distance (channel length) L between the source electrode SDI and drain electrode SD2, that is, the factor W/L that determines the mutual conductance gII+. It depends on what you do. The size of the gate electrode GT in this liquid crystal display device is of course made larger than the original size mentioned above. Note that if we consider only from the gate and light shielding function of the gate electrode GT, the gate electrode GT and the scanning signal line GL
may be integrally formed in a single layer, in which case aluminum (Al) containing silicon is used as the opaque conductive material.
), pure aluminum, aluminum containing palladium (Pd), etc. can be selected. (Scanning signal line OL> The scanning signal line GL is composed of a composite film consisting of a first conductive film g1 and a second conductive film g2 provided on top of the first conductive film g1. The I-th conductive film g1 of this scanning signal line GL is Gate electrode G
It is formed in the same manufacturing process as the first conductive film g1 of T, and is configured integrally. The second conductive film g2 is formed using, for example, an aluminum film formed by sputtering, and has a thickness of about 1000 to 5500 [λ]. The second conductive film g2 is configured to reduce the resistance value of the scanning signal, WGL, and to increase the signal transmission speed (improve the writing characteristics of pixel information). Furthermore, the width of the second conductive film g2 of the scanning signal line GL is configured to be smaller than the width of the first conductive film g1. That is, the side wall of the scanning signal line GL has a gradual step shape. (Insulating film GI) The insulating film GI is used as a gate insulating film for each of the thin film transistors TPT1 to TFT3. The insulating film GI is formed on the gate electrode GT and the scanning signal line GL. For example, the insulating film GI is plasma C.
Using a silicon nitride film formed by VD,
Formed with a film thickness comparable to that of a human body. (I-type semiconductor layer As> As shown in FIG. 4, the i-type semiconductor layer AS is used as a channel formation region for each of the thin film transistors TFTI-TFT3 divided into a plurality of parts.I-type semiconductor layer AS
s is formed of an amorphous silicon film or a polycrystalline silicon film, and is formed to have a thickness of approximately 1800 [in]. This i-type semiconductor JIAS is manufactured by changing the composition of the supplied gas.
Continuing with the formation of the insulating film GI used as the gate insulating film made of i, N, in the same plasma CVD apparatus,
Moreover, it is formed without being exposed to the outside from the plasma CVD apparatus. Further, a P-doped N+ type semiconductor layer do (FIG. 2B) for ohmic contact is similarly formed continuously to a thickness of about 400 [layers]. After that,
The lower transparent glass substrate 5UBI is taken out from the CVD apparatus, and the N+ type semiconductor MdO and the i-type semiconductor layer As are patterned into independent island shapes as shown in FIGS. 2A, 2B, and 4 using photo processing technology. be done. As shown in detail in FIGS. 2A and 4, the i-type semiconductor layer AS is also provided between the scanning signal line GL and the video signal line DL at an intersection (crossover section). The i-type semiconductor H at this intersection! jAs is configured to reduce short circuits between the scanning signal line GL and the video signal line DL at the intersection. (Source electrode SDI, drain electrode 5D2)>The source electrode SDI and drain electrode SD2 of each of the thin film transistors TPTI to TFT3 divided into a plurality of
As shown in detail in FIG. A, FIG. 2B, and FIG. 5 (a plan view depicting only the third conductive films d1 to d3 in FIG. 2A), they are spaced apart from each other on the i-type semiconductor layer AS. It is provided. Each of the source electrode SDI and drain electrode SD2 is
A first conductive film d1, a second conductive film d2, and a third conductive film d3 are sequentially stacked one on top of the other from the lower layer side in contact with the N+ type semiconductor layer do. First conductive film d of source electrode SDI
1. The second conductive film d2 and the third conductive film d3 are formed in the same manufacturing process as the first conductive film d1, second conductive film d2, and third conductive film d3 of the drain electrode SD2. The first conductive film d1 is a chromium film formed by sputtering,
It is formed with a film thickness of 500 to 1000 [A] (in this liquid crystal display device, the film thickness is about 600 [A]). The thicker the chromium film is, the greater the stress will be, so 200
0 [Form the film within a range that does not exceed the thickness of a human body. The chromium film has good contact with the N+ type semiconductor layer do. The chromium film constitutes a so-called barrier layer that prevents aluminum of the second conductive film d2, which will be described later, from diffusing into the N+ type semiconductor layer dO. As the first conductive film d1, in addition to the chromium film, a high melting point metal (
Mo, Ti, Ta, W) films, high melting point metal silicide (M
oSi2. It may also be formed using a Ti5iz, TaSi2, WSi, ) film. After patterning the first conductive film d1 by photo processing, the N+ type semiconductor layer dO is removed using the same photo processing mask or using the first conductive film d1 as a mask. In other words, the N+ type semiconductor layer d remaining on the i type semiconductor IAs
o, the portion other than the first conductive film d1 is removed by self-alignment. At this time, the N+ type semiconductor layer do is etched so that its entire thickness is removed, so the i type semiconductor layer A
S is also etched to some extent on its surface, but the degree of etching can be controlled by the etching time. It is formed by battering to a film thickness of 3000 to 5500 [A] (in this liquid crystal display device, a film thickness of about 3500 [A]). The aluminum film has less stress than the chromium film, and can be formed to a thick film thickness.
is configured to reduce the resistance value of. As the second conductive film d2, silicon or copper (Cu) may be used in addition to the aluminum film.
) may be formed using an aluminum film containing as an additive. After patterning the second conductive film d2 by photo processing technology,
A third conductive film d3 is formed. This third conductive film d3 is a transparent conductive film (Induim-
It consists of Tin-Oxide I T○Ninesa film),
It is formed with a film thickness of 1000 to 2000 [lambda] (in this liquid crystal display device, a film thickness of about 1200 [λ]). This third conductive film d3 includes a source electrode SDI and a drain electrode SD2.
In addition to configuring the video signal line DL, the transparent pixel electrode ITOI is also configured. Each of the first conductive films d1 of the electrode SD2
The conductive film d2 and the third conductive film d3 extend further inward (into the channel region). In other words, the first conductive film d1 in these parts is configured to be able to define the gate length of the thin film transistor TPT independently of the second conductive film d2 and the third conductive film d3. The source electrode SDI is connected to the transparent pixel electrode IT○1. The source electrode SD1 has a step shape in the i-type semiconductor layer AS (a step corresponding to the sum of the thickness of the first conductive film gl, the thickness of the N+ type semiconductor MdO, and the thickness of the i-type semiconductor layer AS). It is structured along. Specifically, the source electrode SDI includes a first conductive film d1 formed along the step shape of the i-type semiconductor layer AS, and a transparent pixel electrode IT○1 above the first conductive film d1. A second conductive film d2 whose connected side is formed in a small size, and a third conductive film d1 connected to the first conductive film d1 exposed from the second conductive film d2.
It is composed of a conductive film d3. The second conductive film d2 of the source electrode SDI cannot be formed thickly because the chromium film of the first conductive film dl increases stress, and cannot overcome the step shape of the i-type semiconductor layer AS.
It is configured to overcome the type semiconductor layer AS. In other words, step coverage is improved by forming the second conductive film d2 thickly. Since the second conductive film d2 can be formed thickly, the resistance value of the source electrode SDI (drain electrode S
The same applies to D2 and the video signal line DL). Since the third conductive film d3 cannot overcome the step shape caused by the i-type semiconductor layer AS of the second conductive film d2, by reducing the size of the second conductive film d2, the exposed first conductive film d is configured to connect to. The first conductive film di and the third conductive film d3 not only have good adhesion, but also have a small step shape at the connection between them, making it possible to reliably connect the source electrode SDI and the transparent pixel electrode ITOI. can. (Transparent pixel electrode I To 1> The transparent pixel electrode ITOI is provided for each pixel and constitutes one of the pixel electrodes of the liquid crystal display section. The transparent pixel electrode ITOI is formed by thin film transistors TPTI to TFT3 that are divided into a plurality of pixels. 3 corresponding to each of
The transparent pixel electrodes are divided into three divided transparent pixel electrodes E1, E2, and E3. The divided transparent pixel electrodes El to E3 are each connected to the source electrode SD1 of the thin film transistor TPT. Each of the divided transparent pixel electrodes E1 to E3 is patterned to have substantially the same area. In this way, the thin film transistor TPT of the pixel is divided into a plurality of thin film transistors TFTI to TFT3, and each of the divided transparent pixel electrodes E1 to E3 is connected to each of the divided thin film transistors TPTI to TFT3. Even if a part of the pixel (for example, the thin film transistor TFTI) becomes a point defect, it is no longer a point defect when looking at the entire pixel (the thin film transistor TPT2
and thin film transistor TFT3 are not defective), so
The probability of point defects can be reduced, and defects can be made difficult to see. Moreover, by configuring each of the divided transparent pixel electrodes E1 to E3 with substantially the same area, the divided transparent pixel electrode E
It is possible to make the respective liquid crystal capacitances Cpix formed by each of the pixels 1 to E3 and the common transparent pixel electrode ITO2 uniform. (Protective film PSVI> A protective film PSVI is provided over the thin film transistor TPT and the transparent pixel electrode T○1. The protective film PSVI is mainly formed to protect the thin film transistor TPT from moisture etc. The protective film PSVI is made of, for example, a silicon oxide film or a silicon nitride film formed using a plasma CVD device, and is formed with a film thickness of about 8000 [λ]. ( Light-shielding film BM> A shielding film BM is provided on the upper transparent glass substrate 5UBZ side to prevent external light (light from above in FIG. 2B) from entering the i-type semiconductor layer AS used as a channel formation region.
is provided, and the shielding film BM has a pattern as shown by hatching in FIG. Note that FIG. 6 is a plan view depicting only the third conductive film d3 made of an ITO film, the color filter FIL, and the light shielding film BM in FIG. 2A. The light-shielding film BM is formed of a film having a high light-shielding property, such as an aluminum film or a chromium film, and in this liquid crystal display device, the chromium film is formed by sputtering to a thickness of about 1300 mm. Therefore, i of thin film transistors TFTI to TFT3
The type semiconductor layer AS is sandwiched between the upper and lower light shielding films BM and the thick gate electrode GT, and that portion is not exposed to external natural light or backlight light. The light shielding film BM is formed around the pixel as shown by the hatched area in FIG. There is. Therefore, the outline of each pixel becomes clear due to the light shielding film BM, and the contrast is improved. In other words, the light shielding film BM serves as a black matrix and shields light for the i-type semiconductor layer As.In addition, a backlight can be attached to the upper transparent glass substrate 5UB2 side, and the lower transparent glass substrate 5UBI can be set as the viewing side (externally exposed side). (Common transparent pixel electrode I To 2> Common transparent pixel electrode IT○2 is connected to the lower transparent glass substrate 5U
Opposing the transparent pixel electrode ITOI provided for each pixel on the BI side, the optical state of the liquid crystal LC changes in response to the potential difference (electric field) between each pixel electrode IT○1 and the common transparent pixel electrode ITO2. do. The configuration is such that a common voltage Vcow is applied to this common transparent pixel electrode ITO2. The common voltage Vcom is an intermediate potential between the low-level active voltage V d min and the high-level drive voltage V d max applied to the video signal line DL. (Color filter FIL> The color filter FIL is constructed by coloring a dyed base material made of a resin material such as acrylic resin with dye.The color filter FIL has a dot for each pixel at a position facing the pixel. (Only the 73rd conductive film layer d3 and the color filter FIL are drawn, and each of the R, G, and B color filters FIL has cross hatching at 45°, 135°, respectively). The color filter FIL has a transparent pixel electrode IT○1 (E1 to E3) as shown in FIG.
The light shielding film BM is formed to be thick so as to cover all of the transparent pixel electrode work T○1, and the light shielding film BM is formed inside the peripheral part of the transparent pixel electrode work T○1 so as to overlap with the color filter FIL and the edge part of the transparent pixel electrode work T○1. There is. Color filter FIL can be formed as follows. First, a dyed base material is formed on the surface of the upper transparent glass substrate 5UB2, and the dyed base material other than the red filter formation area is removed using a fluorescent dyeing technique. Thereafter, the dyed base material is dyed with a red dye and subjected to a fixing treatment to form a red filter R. Next, a green filter G and a blue filter B are sequentially formed by performing similar steps. (Protective film PSV2> The protective film PSV2 is provided to protect the color filter FIL from damage. The protective film PSV2 is made of a transparent resin material such as acrylic resin or epoxy resin. (Pixel arrangement) Liquid crystal display As shown in FIGS. 3 and 7, a plurality of pixels in the section are arranged in the same column direction as the direction in which the scanning signal line GL extends, and the pixels in the pixel columns Xi, X2°X3, X4... Each pixel column Xi, X2.X3.X
4. Each pixel of... is a thin film transistor TF
The arrangement positions of TI-TFT3 and divided transparent pixel electrodes El-E3 are configured to be the same. In other words, odd pixel row Xi
, Odd pixel columns Xi, X3. . . , adjacent even-numbered pixel columns X2 . X4. . . are arranged in odd-numbered pixel columns XI, X3 . . . are divided into line pairs, that is, pixel columns X2, . X4. In each pixel, thin film transistors TPT1 to TFT3 are arranged on the right side, and transparent pixel electrodes E1 to E3 are arranged on the left side. Then, pixel row X2. Each pixel of X4°... is connected to pixel rows XI, X3. ... are shifted (shifted) by half a pixel interval in the column direction. In other words, if each pixel interval of pixel row X is 1.0 (1,0 pitch), then the next pixel row or each pixel interval is 1.0
and is shifted by 0.5 pixel interval (0.5 pitch) in the column direction with respect to the previous pixel column X. The video signal line DL extending in the row direction between each pixel is configured to extend in the column direction by a half pixel interval (0.5 pitch) between each pixel column X. As a result, as shown in FIG. 7, the pixel in the previous pixel row Pixels on which color filters are formed (for example, 1 pixel column
The RGB color filters FIL are arranged in a triangular arrangement. Color filter FI
The triangular arrangement structure of RGB of L can improve the color mixing of each color, and therefore can improve the resolution of a color image. Moreover, since the video signal line DL extends in the column direction by only half a pixel interval between each pixel column X, it does not intersect with the adjacent video signal line DL. Therefore, video signal line D
It is possible to eliminate the routing of L and reduce its occupied area, and it is also possible to eliminate detours of the video signal line DL and eliminate the multilayer wiring structure. (Whole Equivalent Circuit of Display Device) An equivalent circuit of this liquid crystal display device is shown in FIG. XiG, Xi+IG, . . . are video signal lines DL connected to pixels in which the green filter G is formed. XiB, Xi+IB, . . . are video signal lines DL connected to the pixels in which the blue filter B is formed. Xi+IR, Xi+2R, . . . are red filters R. These video signal lines DL are selected by a video signal motion circuit. Yi is the pixel column Xi shown in FIGS. 3 and 7.
This is the scanning signal IGL that selects the . Similarly, Yi+1. Yi+2. . . , each of pixel rows X2 . X3. . . . is a scanning signal line OL that selects each of the following. These scanning signal lines GL are connected to a vertical scanning circuit. (Structure of storage capacitor element Cadd) Each of the divided transparent pixel electrodes E1 to E3 is bent into an L-shape so as to overlap the adjacent scanning signal line OL at the end opposite to the end connected to the thin film transistor TPT. It is formed as follows. As is clear from FIG. 2C, this superposition is achieved by using a storage capacitance element (capacitance element)
Configure Cadd. The dielectric film of this storage capacitor element Cadd is composed of the same layer as the pure edge film GI used as the gate insulating film of the thin film transistor TPT. As is clear from FIG. 4, the storage capacitor element Cadd is formed in the portion of the gate line GL where the first conductive film g1 is widened. Note that the second conductive film d2 at the portion intersecting with the video signal line DL is made thin in order to reduce the probability of short circuit with the video signal line DL. In a part between each of the divided transparent pixel electrodes E1 to E3 that are overlapped to form the storage capacitor element Cadd and the electrode PLI, a transparent pixel is formed when the transparent pixel electrode crosses the step shape, similar to the source electrode SD1. In order to prevent the electrode 'fTO1 from being disconnected, an island region made up of the second conductive film d2 and the second conductive film d2 is provided. This island area is configured to be as small as possible so as not to reduce the area (aperture ratio) of the transparent pixel @ Yokocho TO1. (Equivalent circuit of storage capacitor element Cadd and its operation) 2nd A
FIG. 9 shows an equivalent circuit of the pixel shown in the figure. In FIG. 9, Cgs is a parasitic capacitance formed between the gate electrode GT and source electrode SDI of the thin film transistor TPT. The dielectric film of the parasitic capacitance icgs is an insulating film GI. Cpix is a liquid crystal capacitor formed between the transparent pixel electrode IT○1 (PIX) and the common transparent pixel electrode IT○2 (COM). The dielectric film of liquid crystal capacitor Cpix is liquid crystal LC1
They are a protective film PSVI and alignment films 0RII and 0RI2. Vlc is a midpoint potential. When the thin film transistor TPT switches, the storage capacitance element Cadd has a midpoint potential (pixel electrode potential) Vlc.
It works to reduce the influence of gate potential change ΔVg on. This situation can be expressed by a formula. It becomes as follows. ΔVlc= (Cgs/(Cgs+Cadd+Cpix
)) xΔVg Here, Δv1c represents the change in midpoint potential due to ΔVg. This variation ΔVlc causes a direct current component applied to the liquid crystal LC, but the larger the holding capacitance Cadd is, the smaller its value can be. Further, the storage capacitor element Cadd also has the effect of lengthening the discharge time, so that video information is stored for a long time after the thin film transistor TPT is turned off. Reducing the DC component applied to the liquid crystal LC can improve the life of the liquid crystal LC and reduce so-called burn-in, in which the previous image remains when switching between liquid crystal display screens. As mentioned above, since the gate electrode GT is made large enough to completely cover the i-type semiconductor layer AS, the source electrode SDI
, the overlap area with the drain electrode SD2 increases, the parasitic capacitance Cgs increases, and the midpoint potential Vl
The opposite effect occurs in that c becomes more susceptible to the influence of the gate (scanning) signal Vg. However, by providing the storage capacitor element Cadd, this disadvantage can also be eliminated. The storage capacitance of the storage capacitor element Cadd is 4 to 8 times the liquid crystal capacitance Cpix (4・Cpix
<Cadd< 8 ・Cpix), superposition capacity i
8 to 32 times that of cgs (8・Cgs<Cadd<
Set to a value of about 32 Cgs). (Connection method of holding capacitor element Cadd electrode line) As shown in FIG. (Vcom). As shown in FIG. 2B, the common transparent pixel electrode iT○2 is connected to an external lead wire by a silver paste material SL at the peripheral edge of the liquid crystal display device. Moreover, part of the conductive layer (gl and g2) of this external wiring is connected to the scanning signal line GL.
It consists of the same manufacturing process. As a result, the final stage scanning signal line (capacitive electrode line) GL is connected to the common transparent pixel electrode I.
It can be easily connected to T○2. Alternatively, as shown by the dotted line in FIG. 8, the final stage (first stage) scanning signal line (capacitive electrode line) GL may be connected to the first stage (final stage) scanning signal line GL. Note that this connection can be made by internal wiring within the liquid crystal display section or external wiring. (DC Cancellation by Scanning Signal of Storage Capacitor Element Cadd) This liquid crystal display device is based on the DC cancellation method (DC cancellation method) described in Japanese Patent Application No. 62-95125 previously filed by the applicant of the present application. As shown in FIG. 10 (time chart), by controlling the opening voltage of the scanning signal line GL, the DC component applied to the liquid crystal LC can be further reduced. In FIG. 1O, Vi is the drive voltage of an arbitrary scanning signal line GL, and V i +1 is the opening voltage of the scanning signal line GL at the next stage. Vee is a low-level opening voltage V d 1 applied to the video signal line DL.
IIin, Vdd is a high-level opening voltage Vdmax applied to the video signal line DL. Each time t=t 1~
The voltage change Δ■1 to Δv4 of the midpoint potential Vie (see FIG. 9) at t4 is the total capacitance of the pixel C=Cgs+C
When pix + Cadd, it is expressed by the following formula. ΔV□= (Cgs/C)V2 ΔV2=+(Cgs/C)(V1+V2)−(Cadd
/C)・V 2 ΔV, = −(Cgs/C)・Vi +(Cadd/C)・(V1+V2) ΔV4= −(Cadd/C)・Vl Here, the opening voltage applied to the scanning signal line GL If is sufficient (see Note below), the DC voltage applied to the liquid crystal LC is expressed by the following equation. Therefore, when Cadd·V 2 =Cgs−V 1, the DC voltage applied to the liquid crystal LC becomes O. [Note 1: At times t1 and t2, the change in the opening voltage Vi affects the midpoint potential Vlc, but during the period from 2 to t3, the midpoint potential Vlc is brought to the same potential as the video signal potential through the signal line Xi. (Sufficient writing of video signals) The potential applied to the liquid crystal LC is almost determined by the potential immediately after the thin film transistor TPT is turned off (the off period of the thin film transistor TPT is overwhelmingly longer than the on period). Therefore, liquid crystal L
In calculation of the DC component applied to C, the period tl-t3 can be almost ignored, and it is sufficient to consider the potential immediately after the thin film transistor TPT is turned off, that is, the influence of the transition at times t3 and t4. Note that the polarity of the video signal is inverted for each frame or line, and the DC component due to the video signal itself is zero. In other words, in the DC cancellation method, the reduction in the midpoint potential Vlc caused by the parasitic capacitance EtCgs is compensated for by the storage capacitor C
add and the next stage scanning signal line (capacitance electrode 1s) GL can be pushed up by the opening voltage, and the DC component applied to the liquid crystal LC can be made extremely small. As a result, the life of the liquid crystal LC of the liquid crystal display device can be improved. Of course, to improve the light shielding effect, the gate electrode GT
When Cadd is increased, the storage capacitance element Cadd is increased accordingly.
It is only necessary to increase the holding capacity of . Next, a method for manufacturing a liquid crystal display device according to the present invention will be explained with reference to FIG. First, as shown in FIG. 1(a), a film of 800 [A] is coated on both sides of a lower transparent glass substrate 5UB1 made of 7059 glass (trade name) with a thickness of 1.1 [mo+]. After DPI is provided by dip treatment, baking is performed at 500° C. for 60 minutes. Next, the film thickness is 1.100 [person] on the Si○2 film DPI.
A first conductive film GL made of chromium is provided by sputtering. Next, by selectively etching the first conductive film g1 using a photolithography technique using a mixed solution of ceric ammonium nitrate solution and perchloric acid as an etching solution, the scanning signal, the first M of the IGL, and the gate are etched. Form electricity. Next, after removing the resist with stripping liquid 5502 (trade name), 0□ ashing is performed for 1 minute. Next, a second conductive film g2 made of aluminum-palladium, aluminum-silicon, aluminum-silicon-titanium, aluminum-silicon-copper, etc. and having a thickness of 1000 [A] is provided by sputtering. next,
By selectively etching the second conductive film g2 using a photolithography technique using a mixed acid of phosphoric acid, nitric acid, and acetic acid as an etching solution, a second layer of the scanning signal [GL] is formed. Next, SF and gas are introduced into a dry etching device to remove residues such as silicon, and then the resist is removed. Next, add ammonia gas to the plasma CVD equipment.
By introducing silane gas and nitrogen gas, the film thickness is 3500 [A]
After forming an i-type amorphous silicon film, plasma CVD
Hydrogen gas and phosphine gas were introduced into the device, and the film thickness was 4.
The i-type semiconductor layer AS is formed by selectively etching the N+ type silicon film and the i-type amorphous silicon film by photolithography using SF, . . . Next, after removing the resist, the silicon nitride film is selectively etched by photolithography using SF6 as a dry etching gas to form an insulating film Gl. Asher is performed for 1 minute, immersed in a mixed acid of hydrochloric acid and nitric acid for 1 minute, washed with water, dried, and then baked in an N2 atmosphere.Next, it is made of an amorphous IT○ film with a film thickness of 1200 [people]. A first conductive film dll is provided by sputtering. Next, a second conductive film d12 made of chromium with a film thickness of 600 [A] is provided by sputtering. Next, an aluminum-palladium, aluminum A third conductive film d13 made of Mu silicon, aluminum-silicon-titanium, aluminum-silicon-copper, etc. is provided by sputtering. Next, as shown in FIG. Pixel electrode ITOI, video signal line D
Patterns of L, source electrode SDI, and drain electrode SD2 are formed, and the third conductive film d13 is selectively etched using a mixed acid of phosphoric acid, nitric acid, and acetic acid as an etching solution, and ceric ammonium nitrate is used as an etching solution. After selectively etching the second conductive film d12 using a mixed solution of a solution and perchloric acid, the first conductive film dll is selectively etched using a mixed acid of hydrochloric acid and nitric acid as an etching solution. By this, the transparent pixel electrode ITOI, the video signal line DL, the source electrode SDI, and the drain electrode SD2
form. Next, before removing the resist, C(1, SF6 is introduced into the dry etching apparatus to selectively etch the N+ type silicon film.
A type semiconductor IWdO is formed. Next, 120℃, N
After baking in 2 atmospheres for 20 minutes, it is treated with a mixed acid of phosphoric acid, nitric acid, and #acid. Next, after removing the resist, the first conductive film d made of the amorphous IT○ film is baked at 230°C in a N2 atmosphere for 60 minutes.
Crystallize ll. Next, as shown in FIG. 1(c), ammonia gas, silane gas, and nitrogen gas are introduced into the plasma CVD apparatus to form a silicon nitride film having a thickness of 1 [xl]. Next, as shown in FIG. 1(d), the silicon nitride film is selectively etched by photolithography using SF as a dry etching gas, thereby forming a protective film PSVI and forming a transparent pixel electrode. The insulating film in the IrO2 portion is removed. In addition, the protective film PSVI
may be composed of a phenol-curable epoxy resin. Etching at this time is performed using a 02 asher. next,
After etching the third conductive film d13 of the transparent pixel electrode IrO2 portion using a mixed acid of phosphoric acid, nitric acid, and acetic acid as an etching solution, a mixed solution of ceric ammonium nitrate solution and perchloric acid was used as an etching solution. The second conductive film d12 of the transparent pixel electrode IrO2 portion is etched using the etching method. Next, after removing the resist, the alignment film 0RII
will be established. In this method of manufacturing a liquid crystal display device, by simply forming a pattern on the resist, the transparent pixel electrode ITOI,
Since the video signal line DL, the source electrode SDI, and the drain electrode SD2 can be formed, the number of times patterns are formed on the resist can be reduced, which improves yield and throughput and reduces manufacturing costs. . Further, since the second conductive film d12 made of chromium is provided between the first conductive film dll made of the IT○ film and the third conductive film d13 made of aluminum-palladium, etc., the third conductive film d12 made of chromium is provided.
Since the conductive film d13 does not react with the first conductive film dll, the third conductive film d13 does not become a high resistance film. moreover,
Since the first conductive film dll below the protective film PSV1 is covered with the second conductive film d12 and the third conductive film d13, the first conductive film dll is not reduced when providing the protective film PSVI. , the periphery of the protective film PSVI and the video signal line D
Since the adhesion with L is good, reliability is good. In addition, a first conductive film d is applied to the transparent pixel electrode IT○1, the video signal line DL, the source electrode SDI, and the drain (alkaline liquid).
Since dll is not exposed, the first conductive film dll will not be dissolved due to a battery reaction that occurs when the ITO film, aluminum film, and alkaline solution coexist. Furthermore, the N+ type semiconductor layer do is shaped, baked at 120° C. in an N2 atmosphere for 20 minutes, and then treated with a mixed acid of phosphoric acid, nitric acid, and acetic acid, so that the third conductive film d13 becomes a ridge. can be prevented. If the protective film PSVI is made of an organic film, the insulating film GI will not be etched by the 02 asher, so an interlayer short between the pixel electrode and the gate electrode will not occur, and the pixel electrode can be divided, so the panel Since it is possible to make point defects less noticeable when the display is turned on, the yield of display quality is improved. As above, the invention made by the present inventor has been specifically explained based on the above embodiments, but this invention is not limited to the above embodiments, and can be modified in various ways without departing from the gist thereof. Of course. For example, in the above embodiment, an inverted staggered structure is shown in which gate electrode formation→gate insulating film formation→semiconductor layer formation→source/drain electrode formation, but the present invention can also be applied to a staggered structure in which the vertical relationship or the order of formation is reversed. It is valid. Further, in the above embodiment, the second conductive film d12 made of chromium and the third conductive film d13 made of aluminum-palladium or the like are provided as metal films, but the present invention is not limited thereto. Effects of the Invention 1 As explained above, in the method for manufacturing a liquid crystal display device according to the present invention, transparent pixel electrodes, video signal lines, source electrodes, and drain electrodes can be formed by forming a pattern on a resist once. Since the number of times a pattern is formed on the resist can be reduced, yield and throughput can be improved, and manufacturing costs can be reduced. In addition, since the metal film that forms the pixel electrode and source electrode is continuously deposited, the contact resistance between the pixel electrode and the source electrode is reduced, which prevents defects such as locally dark appearance when the liquid crystal panel is fully lit. Since there is no protective film on the pixel electrode, the influence of the residual DC voltage component is reduced, so there is no longer a problem of poor printing in which the initial image does not disappear for a while like an afterimage. Since the metal film forming the video signal line is continuously formed, the contact resistance is reduced, and the wiring resistance of the video signal line can also be reduced. As described above, the effects of this invention are remarkable.

[Brief explanation of drawings]

FIG. 1 is an explanatory diagram of a method for manufacturing a liquid crystal display device according to the present invention, and FIG. 2A is a plan view of a main part showing one pixel of a liquid crystal display section of an active matrix color liquid crystal display device to which the present invention is applied. , FIG. 2B is IIB-I in FIG. 2A.
A sectional view of the part cut along the IB cutting line and the surrounding area of the seal part, FIG. 2C is a sectional view taken along the NC-NC cutting line of FIG. 2A,
3 is a plan view of a main part of a liquid crystal display section in which a plurality of pixels shown in FIG. 2A are arranged, FIGS. 4 to 6 are plan views depicting only predetermined layers of pixels shown in FIG. 2A, and FIG. The figure is a plan view of the main part depicting only the pixel electrode layer and color filter layer shown in Figure 3,
Fig. 8 is an equivalent circuit diagram showing the liquid crystal display section of an active matrix color liquid crystal display device, and Fig. 9 is an equivalent circuit diagram showing the liquid crystal display section of an active matrix type color liquid crystal display device.
FIG. 10 is an equivalent circuit diagram of the pixel shown in the figure, and a time chart showing the perturbation voltage of the scanning signal line by the DC cancellation method. SUB...Transparent glass substrate GL...Scanning signal line DL...Video signal line GI...Insulating film GT...Gate electrode AS...I-type semiconductor layer SD...Source electrode or drain electrode psv...
Protective film BM... Light shielding film LC... Liquid crystal TPT... Thin film transistor IT○... Transparent pixel electrodes g, d... Conductive film Cadd... Holding capacitor element Cgs... Parasitic capacitance Cpix...・Liquid crystal capacity No. ■ Figure TOI- Transparent image f, connected No. ■ Figure ITOI--I sing a transparent rabbit

Claims (1)

[Claims] 1. In a method for manufacturing an active matrix liquid crystal display device in which a thin film transistor and a pixel electrode are constituent elements of a pixel, a transparent conductive film to constitute the pixel electrode is provided, and a metal film is formed on the transparent conductive film. a resist is applied on the metal film, patterns of the pixel electrode, video signal line, source electrode, and drain electrode are formed on the resist, the metal film is selectively etched, and the transparent conductive film is etched. selectively etching, removing the resist, providing an insulating film constituting a protective film, removing the insulating film of the pixel electrode portion, and then removing the metal film of the pixel electrode portion. A method for manufacturing a liquid crystal display device.