JPH0345955B2 - - Google Patents

Abstract

PURPOSE:To enable switching of a print size with simple constitution by changing oscillation frequency of an oscillator for generating sampling time prior to the number of samples. CONSTITUTION:An input video signal is converted into a digital signal by an A/D convertor 2 and inputted to a vertical interporating device 11, which controls a vertical interpolation through a size switching signal 13. When a print size is small, said device 11 will not perform the interpolation, and ony when the size is large, it performs the interpolation. The size switching signal 13 controls a timing generator 12 and changes oscillation frequency of the generator 12 so that the number of samples will be changed. An output of the generator 12 controls sampling timing of a picture of the convertor 2, and the picture is processed 3, transmitted to a printer 4 and printed.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to an image processing device, and particularly to an image processing device that can change the number of samples for sampling an analog video signal.

[Prior Art] FIG. 1 shows a block diagram of an example of the configuration of a conventional video printer for processing video images. An input video signal 1 is converted into a digital signal by an A/D converter 2, processed into a print signal by an image processing circuit 3, and printed by a printer 4.

Next, assume that this device is used to change the print size. Figure 2 shows a state where the number of sample points of the image data is doubled and the print size is doubled (four times the area). Figure 3 shows the configuration block diagram of the video printer in this case. show. In FIG. 3, the same (corresponding) configuration as in FIG. 2 is indicated by the same reference numerals, and the input video signal 1 is
The converter 2 converts the data into a digital signal, and the interpolation circuit 10 interpolates the data. The interpolated data is processed into printer signals by the image processing circuit 3 and printed by the printer 4. In the interpolation circuit 10, image data 7, 6 are obtained from each image data 5, 6 in FIG.
It is converted to 8,9. Image data 7 is the same as image data 5, image data 9 is the same as image data 6, and intermediate image data 8 is interpolated with each image data 5 and 6. In the case of linear interpolation, Take the sum of image data 5 and 6 and convert this to 2
The image data 8 is obtained by dividing by . The configuration described above performs interpolation to switch the print size of an image.

However, such interpolation requires memory, adders, and dividers to perform addition and division of at least two pixels in both the horizontal and vertical directions of the screen.
The disadvantages are that the hardware is complicated and expensive, and the timing of data processing is also complicated.

〔the purpose〕

The present invention has been made in view of the above-mentioned problems, and allows changing the number of samples and sample frequency on a horizontal scanning line excluding the horizontal blanking period with a simple configuration, and allows changing the number of samples and sampling frequency in accordance with changes in print size. The objective is to provide an image processing device that can extract data in both horizontal and vertical directions.

Specifically, an object of the present invention is to provide an image processing apparatus for printing an analog video signal including a horizontal synchronizing signal, in which a first
A memory for storing a variable value and a second variable value corresponding to the number of sampling points on the horizontal scanning line, generating means for generating clock pulses of a plurality of frequencies, and starting counting of the clock pulses in synchronization with the horizontal synchronization signal. counting means; sampling means for sampling the analog video signal from when the counting means reaches a first variable value until it reaches a second variable value; instructing means for instructing switching of the print size; A changing means for changing the number of sampling points on a horizontal scanning line by changing the frequency and the first variable value and the second variable value; and an interpolating means for performing interpolation processing in the vertical direction of the analog video signal in accordance with the instruction. An object of the present invention is to provide an image processing device having the following features.

〔Example〕

The present invention will be explained below based on the drawings. Fourth
The figure is a block diagram of an embodiment of the present invention, and the same (corresponding) structures as in FIGS. 1 and 3 are designated by the same reference numerals. An input video signal 1 is converted into a digital signal by an A/D converter 2, and a vertical interpolator 11
is being input. The presence or absence of vertical interpolation is selected by the control of the size switching signal 13, and the vertical interpolator 11 operates so that no interpolation is performed when the print size is small, and interpolation is performed when the print size is large. The output of this vertical interpolator is processed into a printing signal by the image processing circuit 3, and then sent to the printer 4.
Printed in .

Further, the size switching signal 13 controls the timing generator 12 so that for a small print size, the number of horizontal samplings is small, and for a large print size, the number of horizontal samplings is large. . This output of the timing generator 12 controls the image sampling timing of the A/D converter 2.

As explained above, in the case of a normal print size, the number of samples in the horizontal direction of the image is small, and no interpolation is performed in the vertical direction. When the print size increases, the number of horizontal samplings of the image increases in accordance with the print size, and interpolation in the vertical direction is also performed. Therefore, the print size can be switched using the print size switching signal 13.

FIG. 5 shows an example of the circuit configuration of the timing generator 12. This figure shows an example in which sampling is performed in the horizontal direction, and 14 is a vertical synchronizing signal VD synchronized with the video signal, and 18 is a start signal for A/D conversion. 15 and 17 are each D-
FF (D-type flip-flop) circuit, 16 is
A NAND circuit (gate), 19 is an AND circuit, and each of these circuits outputs the signals from the AND circuit 19 to A/2 as shown in the timing chart of each signal in FIG.
After the D conversion start signal 18 rises, two vertical synchronizing signals 14 and VD are output. As a result, one frame of the TV signal to be interlaced is extracted from the A/D conversion signal in synchronization with the vertical synchronization signal.

20 is a horizontal synchronization signal synchronized with the video signal
HD, 21, 25 are AND circuits, 22 is
A preset circuit for presetting M preset values, 23 and 27 are presettable down counters, 24 is an inverter, and 26 is a preset circuit for presetting N preset values.

The presettable counter 23 counts M horizontal synchronizing signals HD, as shown in the signal timing chart of FIG. 7, and sets this to a number corresponding to vertical blanking. In addition, presettable
The counter 27 counts N horizontal synchronizing signals HD, which becomes the number of vertical image samplings. Therefore, due to the configuration of each circuit 21 to 27, N horizontal synchronization signals, which are equal to the number of samples in the vertical direction of the image, can be obtained from the AND circuit 25.

Also, 28 and 34 are inverters, and 29
is a NAND circuit, 30 is a delay line DL with a tap, 31 is an OR circuit, and 32 and 33 are AND circuits. With the above configuration, as shown in the signal timing chart of Fig. 8, the signals from the OR circuit 31 are , an oscillation output synchronized with the output signal of the inverter 28 can be obtained. That is, the NAND circuit 29 and the delay line 30 constitute a gated oscillator. This oscillation frequency is determined by the size switching signal 13
The frequency is selected by selecting the tap output of the tapped delay line 30. That is,
For normal print sizes, tap _T2 is used to lower the oscillation frequency, and for large prints, tap _T1 is used to increase the oscillation frequency.

Furthermore, 35 and 39 are AND circuits, respectively.
36 is a preset circuit for setting the preset value L, 37 and 41 are presettable down counters, 38 is an inverter, 39 is an AND circuit,
40 is a preset circuit for setting a preset value P. The above presettable down counter 37
counts the preset value L. This means that the horizontal blanking time is set from the horizontal synchronizing signal HD, and since the oscillation frequency changes depending on the print size, the horizontal blanking time is made constant by changing the preset value L of the preset circuit 36. Further, the presettable down counter 41 counts the preset value P and sets the number of samplings in the horizontal direction. A timing chart of each of these signals is shown in FIG.
That is, the number of horizontal samplings is determined by changing the preset value P as the print size is changed.

As explained above, when the A/D conversion start signal 18 is input, the vertical synchronization signal VD
A control signal pulse 42 can be generated to sample the input video signal 1 in the horizontal direction for one frame synchronized with the video signal 1 during a period excluding vertical and horizontal blanking periods. In addition, the number of samplings in the horizontal direction is changed by the print size switching signal 13,
Furthermore, it is possible to sample the same horizontal video signal.

Note that in order to increase the print size by X, the oscillation frequency is increased by X, and the horizontal counters 37 and 4 are
The preset value of 1 may be multiplied by X.

[Other Examples]

FIG. 10 shows another circuit configuration example of the timing generator 12, in which the same (corresponding) configurations as those in FIG. 5 are denoted by the same reference numerals, and redundant explanation will be omitted.

In this embodiment, the video signal is sampled in the vertical direction, and 43 is an AND circuit, and 44 is an AND circuit.
is a preset circuit that sets a preset value 2R,
45 is a presettable down counter. Each of the circuits 43 to 45 has a preset value 2R counted by a presettable down counter 45, as shown in the signal timing chart of FIG.
2R vertical synchronization signals are obtained from the AND circuit 43. The meaning of 2R preset values is that if the number of samples in the horizontal direction is R, in order to sample one frame of a television signal, two fields must be sampled, and one line in the vertical direction starts with two vertical periods. This shows that it is possible to sample data for several minutes. Therefore, to perform R samplings in the horizontal direction, a vertical period twice as long as R is required. Also, since changing the print size means changing the sampling point in the horizontal direction, this preset value of 4
This is possible by changing 4.

Next, the circuit configuration from the AND circuit 21 to the presettable counter 27 determines sampling in the vertical direction, similar to the case of sampling in the horizontal direction in FIG. 5.

Further, the circuit configuration from the inverter 28 to the OR circuit 31 also constitutes an oscillator whose phase is synchronized with the horizontal synchronization signal, as in the case of horizontal sampling in FIG. 46 is preset value 2
A preset circuit for setting Q is shown, with 47 being a presettable up counter and 48 being a presettable down counter. Presettable
The up counter 47 counts the vertical synchronizing signal and makes its output the preset value of the presettable down counter 48.

The presettable down counter 48 is
The oscillation output of the OR circuit 31 is counted down from the preset value, and when it reaches 0, a sampling pulse 42' is output. Note that, as mentioned above, sampling in the vertical direction can sample two fields, so 1/2 of the output of the presettable up counter 47, i.e.
The value obtained by removing 1 LSB (least significant bit) is used as the preset value of the presettable down counter 48. Further, the preset value of the preset circuit 46 of the presettable up counter 47 is also Q.
The number of units sold in 2Q is twice that of the previous year. A timing chart of each of these signals is shown in FIG.

If the number of vertical synchronization signals after the A/D start signal 18 is input is S, then the sampling pulse 42' is the oscillation output of the OR circuit 31 output after the horizontal synchronization signal from the AND circuit 25 is input. ,
Occurs when (Q+S/2) pieces are counted. In addition,
This S takes on a number that satisfies Q≦S<R.

The sampling start point, sampling frequency,
All of the sampling points and the number of sampling points can be easily changed, and even if the print size changes, the range on the screen where the video signal is captured can be made the same.

Furthermore, as the print size changes, interpolation is performed in the vertical direction, making it possible to extract data in the vertical direction in response to changes in the number of sampling points in the horizontal direction. No need for memory, adders, dividers, etc.
In the horizontal direction, it is possible to minimize resolution degradation, resulting in high-quality prints.

[Brief explanation of drawings]

Fig. 1 is a block diagram of an example of the configuration of a conventional video printer, Fig. 2 is an explanatory diagram when the sample points of image data are doubled, Fig. 3 is a block diagram of the configuration of a video printer in that case, and Fig. 4 The figure is a block diagram of an embodiment of the video printer of the present invention.
Figure 5 is a circuit configuration diagram of the timing generator;
9 to 9 are timing charts of each signal, FIG. 10 is another circuit configuration diagram of the timing generator, and FIGS. 11 and 12 are timing charts of each signal, respectively. 1...Video signal, 2...A/D converter, 3...
... Image processing device (video printer), 14 ... Printer, 11 ... Vertical interpolator, 12 ... Timing generator, 13 ... Size switching signal, 14 ... Vertical synchronization signal, 20 ... Horizontal synchronization signal, 30 ...Delay line with tap, 42'...Sampling pulse.

Claims (1)

[Claims] 1. In an image processing device that prints an analog video signal including a horizontal synchronization signal, a first variable value corresponding to a sampling start point on a horizontal scanning line in the video signal and a second variable value corresponding to the number of sampling points on the horizontal scanning line in the video signal. a memory for storing each variable value, a generating means for generating clock pulses of a plurality of frequencies, a counting means for starting counting of the clock pulses in synchronization with the horizontal synchronizing signal, and a clock pulse starting after the counting means reaches the first variable value. sampling means for sampling the analog video signal until two variable values are reached; instruction means for instructing to switch the print size; and changing the frequency of the clock pulse and the first variable value and the second variable value in accordance with the instruction. An image processing apparatus comprising: a changing means for changing the number of sampling points on a horizontal scanning line; and an interpolating means for performing interpolation processing in the vertical direction of the analog video signal in accordance with the instruction.