JPH0328582Y2 - - Google Patents
Info
- Publication number
- JPH0328582Y2 JPH0328582Y2 JP16719684U JP16719684U JPH0328582Y2 JP H0328582 Y2 JPH0328582 Y2 JP H0328582Y2 JP 16719684 U JP16719684 U JP 16719684U JP 16719684 U JP16719684 U JP 16719684U JP H0328582 Y2 JPH0328582 Y2 JP H0328582Y2
- Authority
- JP
- Japan
- Prior art keywords
- push
- power amplifier
- transmission line
- pull power
- pull
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 230000005540 biological transmission Effects 0.000 claims description 40
- 239000003990 capacitor Substances 0.000 claims description 24
- 230000000903 blocking effect Effects 0.000 claims description 10
- 238000006243 chemical reaction Methods 0.000 description 19
- 238000010586 diagram Methods 0.000 description 8
- 230000000694 effects Effects 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
Landscapes
- Microwave Amplifiers (AREA)
- Amplifiers (AREA)
Description
【考案の詳細な説明】
〔産業上の利用分野〕
本考案は、テレビジヨン放送等において、高周
波電力を増幅するために使用される多段プツシユ
プル電力増幅器に関する。[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a multistage push-pull power amplifier used for amplifying high frequency power in television broadcasting and the like.
従来、この種の多段プツシユプル電力増幅器
は、プツシユプル電力増幅器の各段間の接続を不
平衡回路によつて接続している。
Conventionally, in this type of multi-stage push-pull power amplifier, each stage of the push-pull power amplifier is connected by an unbalanced circuit.
これは、各段のプツシユプル電力増幅器の出力
はその対地インピーダンスが高くなつているた
め、次段のプツシユプル電力増幅器の入力にその
まま平行線路を介して接続すると、平行線路がア
ンテナとして作用してエネルギ放射を起こすため
である。したがつて、従来は対地インピーダンス
を低くした同軸ケーブル等を用いてプツシユプル
増幅器の出力と次段のプツシユプル増幅器の入力
とを接続している。すなわち、一旦平衡−不平衡
変換回路によつて不平衡信号に変換して出力し、
これを不平衡−平衡変換回路によつて再び平衡信
号に変換して次段のプツシユプル電力増幅器に入
力させていた。 This is because the output of the push-pull power amplifier in each stage has a high impedance to ground, so if it is directly connected to the input of the push-pull power amplifier in the next stage via a parallel line, the parallel line acts as an antenna and radiates energy. This is to cause Therefore, conventionally, a coaxial cable or the like with low ground impedance is used to connect the output of a push-pull amplifier and the input of the next-stage push-pull amplifier. That is, it is first converted into an unbalanced signal by a balanced-unbalanced conversion circuit and outputted.
This was converted back into a balanced signal by an unbalanced-balanced conversion circuit and inputted to the push-pull power amplifier in the next stage.
第３図はこの従来の多段プツシユプル電力増幅
器の一例を示す回路図であり、第４図はその実装
図である。すなわち、プツシユプル電力増幅器１
のコレクタには、コレクタ電圧端子４から先端高
周波短絡スタブ３を通してコレクタ電圧を供給
し、先端高周波短絡スタブ３の電源側は高周波短
絡コンデンサ５によつて高周波的に接地する。そ
して、プツシユプル電力増幅器１のコレクタ出力
に１対の伝送線路２を接続し、伝送線路２の両線
間に整合用並列コンデンサ６を接続して平衡−不
平衡変換回路８とのインピーダンス整合を取り、
伝送線路２の出力端を直流阻止コンデンサ７を介
して平衡−不平衡変換回路８に接続する。平衡−
不平衡変換回路８は平衡信号に不平衡信号に変換
出力して不平衡−平衡変換回路９に入力させる。
不平衡−平衡変換回路９は、入力信号を平衡信号
に変換して直流阻止コンデンサ７および伝送線路
２を介してプツシユプル電力増幅器１のベースに
入力させる。伝送線路２の両線間には整合用並列
コンデンサ６が接続され、直流阻止コンデンサ７
と伝送線路２の接続点には、ベースバイアス電圧
端子１０から先端高周波短絡スタブ３を通してプ
ツシユプル電力増幅器１のベースバイアス電圧が
供給されている。なお、先端高周波短絡スタブ３
のベースバイアス電圧端子１０側は高周波短絡コ
ンデンサ５によつて高周波的に接地されている。 FIG. 3 is a circuit diagram showing an example of this conventional multi-stage push-pull power amplifier, and FIG. 4 is its implementation diagram. That is, push-pull power amplifier 1
A collector voltage is supplied to the collector from the collector voltage terminal 4 through the high frequency shorting stub 3 at the tip, and the power supply side of the high frequency shorting stub 3 at the tip is grounded at high frequency by the high frequency shorting capacitor 5. Then, a pair of transmission lines 2 are connected to the collector output of the push-pull power amplifier 1, and a matching parallel capacitor 6 is connected between both lines of the transmission line 2 to achieve impedance matching with the balanced-unbalanced conversion circuit 8. ,
The output end of the transmission line 2 is connected to a balanced-unbalanced conversion circuit 8 via a DC blocking capacitor 7. Equilibrium -
The unbalanced conversion circuit 8 converts and outputs the balanced signal into an unbalanced signal, and inputs the signal to the unbalanced-balanced conversion circuit 9.
The unbalanced-balanced conversion circuit 9 converts the input signal into a balanced signal and inputs the signal to the base of the push-pull power amplifier 1 via the DC blocking capacitor 7 and the transmission line 2. A matching parallel capacitor 6 is connected between both lines of the transmission line 2, and a DC blocking capacitor 7 is connected between both lines of the transmission line 2.
The base bias voltage of the push-pull power amplifier 1 is supplied to the connection point between the transmission line 2 and the transmission line 2 from the base bias voltage terminal 10 through the high frequency shorting stub 3 at the tip. In addition, the tip high frequency shorting stub 3
The base bias voltage terminal 10 side of is grounded at high frequency by a high frequency short circuit capacitor 5.
上述の従来回路は、第４図に示すように、平衡
−不平衡変換回路８，９の実装面積が必要であ
り、回路面積が大きくなる欠点がある。また、平
衡−不平衡変換回路８，９には通常同軸ケーブル
が使用され、その特性インピーダンスは一定であ
るため、伝送線路２、整合用並列コンデンサ６等
で構成する整合回路のインピーダンス設計が制約
され、広帯域設計を行うことが困難である問題が
あつた。
As shown in FIG. 4, the conventional circuit described above requires a mounting area for the balanced-unbalanced conversion circuits 8 and 9, and has the disadvantage of increasing the circuit area. In addition, coaxial cables are usually used in the balanced-unbalanced conversion circuits 8 and 9, and their characteristic impedance is constant, so the impedance design of the matching circuit consisting of the transmission line 2, parallel matching capacitor 6, etc. is restricted. However, there was a problem in which it was difficult to perform broadband design.
本考案者は、短い間隔で伝送線路を接続するこ
とにより、この従来回路で用いられたプツシユプ
ル電力増幅器間の平衡−不平衡変換回路や不平衡
−平衡変換回路を省略することができることを見
出し、これにより実装面積と部品点数を削減し、
整合回路の設計度の自由度を高めることができる
多段プツシユプル電力増幅器を提供するものであ
る。 The present inventor discovered that by connecting transmission lines at short intervals, it is possible to omit the balanced-unbalanced conversion circuit and unbalanced-balanced conversion circuit between the push-pull power amplifiers used in this conventional circuit, This reduces the mounting area and number of parts,
The present invention provides a multi-stage push-pull power amplifier that can increase the degree of freedom in designing a matching circuit.
本考案は、第１および第２のプツシユプル増幅
器が縦続接続された回路を含み、前記第１のプツ
シユプル電力増幅器の出力にそれぞれ接続された
対をなす二つの第１の伝送線路およびその二つの
第１の伝送線路間を接続する整合用並列コンデン
サと、前記第２のプツシユプル電力増幅器の入力
にそれぞれ接続された対をなす二つの第２の伝送
線路およびその二つの第２の伝送線路間を接続す
る整合用並列コンデンサと、前記第１のプツシユ
プル電力増幅器にコレクタ電圧を供給するために
上記第１の伝送線路に接続された第１の先端高周
波短絡スタブと、前記第２のプツシユプル電力増
幅器のベース電圧を供給するために上記第２の伝
送線路に接続された第２の先端高周波短絡スタブ
とを備えた多段プツシユプル電力増幅器におい
て、前記第１の伝送線路の出力側と前記第２の伝
送線路の入力側との間はきわめて狭い間隔を設け
て配置され、この狭い間隔にかけわたされ電極が
直接に各伝送線路に接するように配置された直流
阻止コンデンサを備えたことを特徴とする。
The present invention includes a circuit in which first and second push-pull amplifiers are connected in cascade, and a pair of first transmission lines respectively connected to the outputs of the first push-pull power amplifiers; a matching parallel capacitor that connects one transmission line, two second transmission lines that form a pair each connected to the input of the second push-pull power amplifier, and a connection between the two second transmission lines. a first tip high frequency shorting stub connected to the first transmission line for supplying a collector voltage to the first push-pull power amplifier; and a base of the second push-pull power amplifier. A multi-stage push-pull power amplifier comprising a second tip high frequency shorting stub connected to the second transmission line for supplying voltage, wherein the output side of the first transmission line and the second transmission line are connected to each other. A DC blocking capacitor is disposed with an extremely narrow interval from the input side, and the DC blocking capacitor is disposed across this narrow interval so that its electrode is in direct contact with each transmission line.
次に、本考案について図面を参照して詳細に説
明する。
Next, the present invention will be explained in detail with reference to the drawings.
第１図は、本考案の一実施例を示す回路図、第
２図はその実装図である。すなわち、プツシユプ
ル電力増幅器１のコレクタには、コレクタ電圧端
子４から先端高周波短絡スタブ３を通してコレク
タ電圧を供給し、先端高周波短絡スタブ３の電源
側は高周波短絡コンデンサ５によつて高周波的に
接地する。そして、プツシユプル電力増幅器１の
コレクタ出力に１対の第１の伝送線路２を接続
し、伝送線路２の両線間に整合用並列コンデンサ
６を接続してインピーダンス整合をとり、第１の
伝送線路２の出力端は直流阻止コンデンサ７を介
して第２の伝送線路２′の入力端にわずかな間隔
を介して直接接続する。 FIG. 1 is a circuit diagram showing an embodiment of the present invention, and FIG. 2 is an implementation diagram thereof. That is, a collector voltage is supplied to the collector of the push-pull power amplifier 1 from the collector voltage terminal 4 through the high frequency shorting stub 3 at the tip, and the power supply side of the high frequency shorting stub 3 at the tip is grounded at high frequency by the high frequency shorting capacitor 5. Then, a pair of first transmission lines 2 are connected to the collector output of the push-pull power amplifier 1, and a matching parallel capacitor 6 is connected between both lines of the transmission line 2 to achieve impedance matching. The output end of the second transmission line 2' is directly connected to the input end of the second transmission line 2' via a DC blocking capacitor 7 with a short distance therebetween.
第２の伝送線路２′の出力側は第２のプツシユ
プル電力増幅器１′のベースに入力させ、第２の
伝送線路２′の両線間には整合用並列コンデンサ
６が接続されてインピーダンス整合が取られる。
なお、第２の伝送線路２′の入力端には、ベース
バイアス電圧端子１０から先端高周波短絡スタブ
３を通して第２のプツシユプル電力増幅器１′の
ベースバイアス電圧が供給されている。なお、先
端高周波短絡スタブ３のベースバイアス電圧端子
１０側は高周波短絡コンデンサ５によつて高周波
的に接地されている。本実施例においては、第１
のプツシユプル電力増幅器１の出力インピーダン
スをわずかな間隔を介して第２のプツシユプル電
力増幅器１′の入力インピーダンス直接整合させ
て、従来の平衡−不平衡変換回路８、不平衡−平
衡変換回路９を省略した。この平衡−不平衡変換
回路８、不平衡−平衡変換回路９を用いなくとも
伝送線路２と伝送線路２′とをわずかな間隔で直
接直流阻止コンデンサ７で接続することによりエ
ネルギ放射をおこすことなく、平衡信号のまま伝
達できる。このため、実装面積を縮小し、インピ
ーダンス整合設計上の自由度を大きくし、広帯域
化を図ることができる。 The output side of the second transmission line 2' is input to the base of the second push-pull power amplifier 1', and a parallel matching capacitor 6 is connected between both lines of the second transmission line 2' to achieve impedance matching. taken.
The input end of the second transmission line 2' is supplied with the base bias voltage of the second push-pull power amplifier 1' from the base bias voltage terminal 10 through the high frequency shorting stub 3 at the tip. Note that the base bias voltage terminal 10 side of the high-frequency short-circuiting stub 3 at the tip is grounded at high frequencies by a high-frequency short-circuiting capacitor 5 . In this example, the first
The output impedance of the second push-pull power amplifier 1 is directly matched to the input impedance of the second push-pull power amplifier 1' through a small interval, thereby omitting the conventional balanced-to-unbalanced conversion circuit 8 and unbalanced-to-balanced conversion circuit 9. did. Even without using the balanced-to-unbalanced conversion circuit 8 and the unbalanced-to-balanced conversion circuit 9, the transmission line 2 and the transmission line 2' can be directly connected with a small interval by the DC blocking capacitor 7, thereby eliminating energy radiation. , it can be transmitted as a balanced signal. Therefore, the mounting area can be reduced, the degree of freedom in impedance matching design can be increased, and a wide band can be achieved.
以上のように、本考案においては、プツシユプ
ル電力増幅器相互間の接続において、平衡−不平
衡変換回路、不平衡−平衡変換回路等を介在させ
ないで直流阻止コンデンサによつて直接接続した
ので、部品点数が削減され実装面積が縮小され
る。さらに整合回路設計上の制約が緩和されて設
計の自由度が向上した広帯域化を図ることができ
る。
As described above, in the present invention, the push-pull power amplifiers are connected directly by DC blocking capacitors without intervening balanced-unbalanced conversion circuits, unbalanced-balanced conversion circuits, etc., so the number of components is reduced. This reduces the mounting area. Furthermore, restrictions on matching circuit design are relaxed, and a wide band can be achieved with increased design freedom.
第１図は本考案の一実施例を示す回路図。第２
図は上記実施例の実装図。第３図は従来のプツシ
ユプル電力増幅器の一例を示す回路図。第４図は
第３図の実装図。
１，１′……第１、第２のプツシユプル電力増
幅器、２，２′……第１、第２の伝送線路、３…
先端高周波短絡スタブ、４……コレクタ電圧端
子、５……高周波短絡コンデンサ、６……整合用
並列コンデンサ、７……直流阻止コンデンサ、８
……平衡−不平衡変換回路、９……不平衡−平衡
変換回路、１０……ベースバイアス電圧端子。
FIG. 1 is a circuit diagram showing an embodiment of the present invention. Second
The figure is an implementation diagram of the above embodiment. FIG. 3 is a circuit diagram showing an example of a conventional push-pull power amplifier. Figure 4 is an implementation diagram of Figure 3. 1, 1'...first and second push-pull power amplifiers, 2,2'...first and second transmission lines, 3...
Tip high frequency short circuit stub, 4...Collector voltage terminal, 5...High frequency short circuit capacitor, 6...Parallel capacitor for matching, 7...DC blocking capacitor, 8
... Balanced-unbalanced conversion circuit, 9... Unbalanced-balanced conversion circuit, 10... Base bias voltage terminal.
Claims (1)
続された回路を含み、前記第１のプツシユプル電
力増幅器の出力にそれぞれ接続された対をなす二
つの第１の伝送線路およびその二つの第１の伝送
線路間を接続する整合用並列コンデンサと、前記
第２のプツシユプル電力増幅器の入力にそれぞれ
接続された対をなす二つの第２の伝送線路および
その二つの第２の伝送線路間を接続する整合用並
列コンデンサと、前記第１のプツシユプル電力増
幅器にコレクタ電圧を供給するために上記第１の
伝送線路に接続された第１の先端高周波短絡スタ
ブと、前記第２のプツシユプル電力増幅器のベー
ス電圧を供給するために上記第２の伝送線路に接
続された第２の先端高周波短絡スタブとを備えた
多段プツシユプル電力増幅器において、 前記第１の伝送線路の出力側と前記第２の伝送
線路の入力側との間はきわめて狭い間隔を設けて
配置され、 この狭い間隔にかけわたされ電極が直接に各伝
送線路に接するように配置された直流阻止コンデ
ンサを備えた ことを特徴とする多段プツシユプル電力増幅器。[Claims for Utility Model Registration] A circuit including a circuit in which first and second push-pull amplifiers are connected in cascade, and a pair of first transmission lines each connected to the output of the first push-pull power amplifier; A matching parallel capacitor connecting the two first transmission lines, a pair of second transmission lines connected to the inputs of the second push-pull power amplifier, and the two second transmission lines. a matching parallel capacitor connecting the lines; a first high-frequency shorting stub connected to the first transmission line for supplying a collector voltage to the first push-pull power amplifier; and the second push-pull power amplifier. A multi-stage push-pull power amplifier comprising a second tip high frequency shorting stub connected to the second transmission line to supply a base voltage of the power amplifier, the output side of the first transmission line and the second The transmission line is arranged with an extremely narrow interval between the input side of the transmission line and the input side of the transmission line, and is characterized by being equipped with a DC blocking capacitor whose electrode is arranged across this narrow interval so that its electrode is in direct contact with each transmission line. Multi-stage push-pull power amplifier.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16719684U JPH0328582Y2 (en) | 1984-11-02 | 1984-11-02 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16719684U JPH0328582Y2 (en) | 1984-11-02 | 1984-11-02 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6183320U JPS6183320U (en) | 1986-06-02 |
| JPH0328582Y2 true JPH0328582Y2 (en) | 1991-06-19 |
Family
ID=30724999
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16719684U Expired JPH0328582Y2 (en) | 1984-11-02 | 1984-11-02 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0328582Y2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP7133486B2 (en) | 2019-01-16 | 2022-09-08 | 日立Astemo株式会社 | signal transmission device, signal transmission system |
-
1984
- 1984-11-02 JP JP16719684U patent/JPH0328582Y2/ja not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6183320U (en) | 1986-06-02 |
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