JPH03250875A - Output detection method and circuit for charge coupling element - Google Patents

Abstract

PURPOSE:To improve the S/N by expanding a signal resulting from an output signal of a charge coupling element subject to band limit into a Fourier series and extracting only a component corresponding to a signal charge from the output signal. CONSTITUTION:An output detection circuit of a charge coupling element (CCD) is provided with a CCD 1, an analog band pass filter 2, a sample-and-hold circuit 3, a quantizer 4, a computing element 5 and a buffer 6. Then an output signal of the CCD 1 is subject to band limit by using the analog band pass filter 2 whose center frequency is a transfer clock pulse frequency, and the output waveform subject to band limit is expanded into a Fourier series using the transfer clock pulse frequency as the fundamental wave for each period corresponding to each picture element to obtain the Fourier coefficient of the fundamental wave component and the amplitude of the output signal of the charge coupling element is obtained from the coefficient to extract only the component corresponding to the signal charge. Thus, the output signal with improved S/N is obtained.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention provides a charge coupled device output detection method and circuit that removes noise contained in the output signal of a charge coupled device and detects only desired signal components with high precision. In particular, the present invention relates to noise removal from a signal from a gated charge-integrating output circuit.

[Prior art]

FIG. 7 is a schematic diagram showing an example of an output circuit of a charge coupled device (hereinafter referred to as CCD).

This output circuit is known as a gated charge integration type output angle circuit, and includes a CCD transfer channel 1 formed on a semiconductor substrate, a buffer circuit 2, and a reset transistor 3.

Further, a detection diode 5 is provided near one of the transfer electrodes 4 of the CCD transfer channel 1 to detect transferred signal charges and convert them into an output voltage. Transfer lock φ1. The signal charge transferred to the transfer electrode 4 by the application of φ2 is transferred to the transfer lock φ1. It flows into the detection diode 5 every cycle of φ2 and changes its potential.

This potential change is taken out to the outside via the buffer circuit 2.

Further, a transfer lock φ1. A reset I pulse φr is applied at a period equal to φ2. This reset I pulse φ
When the reset transistor 3 is turned on by r, the potential of the detection diode 5 is reset.

FIG. 8 is a waveform diagram for explaining the operation of the gated charge integrating type output angle circuit described above, in which the reset I pulse φr is applied from time to to time tl, and when reset I and transistor 3 are turned on, , the potential of the detection diode 5 rises to the train voltage of the reset transistor 3 +■. Next, reset transistor 3 at the clock time.
When turned off, the potential of the detection diode 5 changes to two capacitances: a capacitance 7 corresponding to the sum of the detection diode 5 and the gate capacitance of the buffer circuit 2, and the gate-source capacitance of the reset transistor 3. A constant reference potential V determined by become. Next, at time t3, charge is transferred and flows into the detection diode 5, and its potential changes to obtain the output voltage Vs.

By the way, time t. While the reset transistor 3 is conductive from time t to time t, the reset transistor 3 generates a certain amount of noise E.

Reference potential■. is affected by this noise EN, and for example, every time the cent pulse φr is applied.

It fluctuates rapidly, and the output S/N deteriorates. This fluctuating potential ■8 is reset noise.

In addition, the reset transistor 3 is not the only noise source, but the buffer circuit 2 is also a noise source that generates random noise. The random noises E and I generated by the buffer circuit 2 are called 1/f noises because their amplitudes are proportional to the reciprocal of the frequency f. As a method of reducing the influence of this reset noise and 1/f noise and improving the S/N, the reference potential ■ is set at time t5□.

is clamped to a constant potential, and then at time t4 the output voltage V
The method of sampling s is known as the double correlation sampling method (Japanese Unexamined Patent Publication No. 116374/1983).
. In addition, as a noise suppression method aiming at the same effect, the CCD output signal is passed through a bandpass filter whose center frequency is the CCD transfer lock frequency, and then synchronously detected using a carrier signal synchronized with the CCD transfer lock and output. A circuit has been devised to detect the
Publication No. 75).

According to this circuit, in the frequency region that is the passband of the bandpass filter, the noise is reduced, so the S/
N improved signals are obtained.

(Problem to be solved by the invention:- In the conventional example described above, the noise that can be removed by the double correlation sampling method is limited to cent noise and the low frequency component of 11fN sound. When attempting to remove noise, time t and time t
The reference potential and signal potential, which are clamped to a constant potential in step 4, are affected by random noise that is uncorrelated with each other, and the S/N of the output signal deteriorates. The random noise in this case is 1/f
noise and other high frequency noise components.

In other words, although the double correlation sampling method can remove the low frequency components of the reset noise 8 and 1/f noise generated by the lyser 71 and the transistor 3, it cannot remove the other components, resulting in a poor S/N ratio. It's inconvenient. actual,
When the CCD is driven at high speed, high frequency noise such as ringing greatly affects the S/N ratio.

In addition, in the synchronous detection method using a band-pass filter, the slowly changing low frequency components that are correlated between each pixel are also suppressed by the filter, making it impossible to adequately express the gradation when handling image signals with gradation. There is this inconvenience.

Furthermore, in circuit systems that directly sample and hold waveforms,
In general, the CCDII force waveform has a shape close to a short waveform, and therefore, during high-speed driving, the circuit system is required to have strict frequency characteristics that take into account the rising characteristics of the waveform.

This invention can remove reset noise, high-frequency random noise, etc. contained in a CCD output signal while maintaining the gradation of the image signal, improve the S/N ratio, and alleviate the frequency characteristics of the circuit system. An object of the present invention is to provide an output detection method for a charge-coupled device that can perform the following steps.

[Means to solve the problem]

The output detection method of a charge-coupled device according to the present invention receives an output signal with an amplitude corresponding to a reference potential and a signal charge every cycle of a transfer clock pulse from a charge-coupled device having a gated charge-integrating output circuit. The signal is band-limited by a band-pass filter whose pass band is one period of the transfer clock pulse, and this band-limited signal is expanded into a Fourier series whose fundamental frequency is one period of the transfer clock pulse, and the signal is converted from the output signal to the signal. This method extracts only the components corresponding to electric charges.

Further, the output detection circuit of a charge-coupled device according to the present invention has the following features:
a charge-coupled device having a gated charge integrating output circuit that outputs a signal with an amplitude corresponding to a reference potential and a signal charge every cycle of a transfer clock pulse; An analog bandpass filter that limits the band to a component with a center frequency, an AD converter that samples the band-limited signal at predetermined time intervals, quantizes it, and converts it into a digital signal, and expands the digital signal into a Fourier series. and an arithmetic unit that extracts only the component corresponding to the signal charge.

[Operation] According to the present invention, the output signal of the charge-coupled device is band-limited by a band-pass filter whose center frequency is the transfer clock pulse frequency, and the output waveform on the band side is
For each interval corresponding to each pixel, the transfer clock pulse frequency is expanded into a Fourier series with the fundamental wave as the fundamental wave component, and the Fourier coefficient of the fundamental wave component is obtained. From this coefficient, the amplitude of the output signal of the charge-coupled device is obtained. Only the corresponding components are extracted.

Therefore, the reset I of the gated charge integration type output circuit
- An output signal with an improved S/N ratio can be obtained in which the effects of random noise such as reset noise and 1/f noise generated by transistors are eliminated.

[Example] An output detection method of a charge-coupled device according to the present invention will be described with reference to the waveform diagram shown in FIG. In addition, the first
In the figure, (a) is the reset pulse φr input to the gate electrode of the reset transistor mentioned above, and (bl is C
Transfer lock φ1 manually applied to CD transfer electrode, diagram (C)
is the CCD output signal.

Now, if the waveform section corresponding to each pixel (N pieces) of the CCD is section 1 to section N, and the period of the waveform is transferred and the period of lock φ1 is 1/f0, then n (
n・1, 2. ..., the transfer lock frequency f with respect to time t within the Nth interval. The Fourier expansion Vn(t) with the fundamental wave as Vn(t) = a ,,o/2+Σa 1I11cOs
2 πkf, t+Σb,, kS1n2πkfOt...
■It becomes. The higher-order term in equation (2) is caused by the reset noise of the reset transistor mentioned above and random noise such as 1/f noise.

Next, the desired CCD output signal V corresponding to the nth pixel is
n' (t) is the CCD at the nth pixel in FIG.
Corresponding to the fundamental wave component (component of =1 at 2〇) of the output voltage Vn(t), Vn' (t) = a n+cOs2πfot+l)?
It is expressed as I+51n2πfat -...■, and its amplitude Vamp(n) is amp(n)=(a Tl+
"=-b n+") """'■.

That is, the amplitude of the desired CCD output signal V a 1ll
p (n) can be obtained from 2) by determining the first-order Fourier coefficients when transferring the n-th section of the CCD output waveform and performing Fourier expansion at the lock frequency fo, that is, the coefficients ari+ and bal+ of 2). can.

Clock frequency f. In principle, lower frequency components (including DC components) are also removed at the stage when formula (2) is defined.

Next, a method of extracting only the fundamental wave f00th order from equation (2) will be described. In order to obtain the Fourier coefficient of the fundamental wave f00th order from equation (2), the orthogonality of the trigonometric functions shown below is used.

=27T ・δmn ...■ cos2πmft 5in2πnft d = 0 ...■ (However, δmn: Cloff-Nker symbol, T=1/f) Then, the following integral over the interval T Ct , t+1/fo) think.

Then, by substituting formula ■ into formula ■ and formula ■, and considering formula ■ and 2■, c(n)=a+++ ・・・■5
(n)=b,,+...■. Therefore, the amplitude of the desired CCD output signal ■ ats p
(n) is νamp(n) from the formulas ■ and 2■, ■
= (C(n)"±5(n)2)I" -... [phase].

Next, if we consider the time t of 2〇 as M numerical sequence and the integral of 2■ and 2■ as Σ, we get Vn(iΔj) = a no/2 Σa 11kcos
2 yr kfoiΔt+Σbfiksin2 πf
oiΔt...0 3 (n) -8, Vn (iΔt) sin2 πfo
iΔ1 −■ (however, MΔt = T = I/f).

From the above, the CCD output waveform shown in FIG.
data is sampled, and the amplitude Vamp(n) is determined independently for each of the N pixels using the formula [phase]~@. This amplitude V a m p (n) is the desired CCD output signal.

Since the frequency f0 and the interval ΔL of the “cos” and “sin” terms of 2@ and @ are both known, Vn(i
Δt) can be calculated as a weight function.

It is important here that the amplitude νa m p (n) is determined independently for the N pixels.

By the way, according to the method of the present invention, as described above, the transfer lock frequency f. Lower frequency components can be removed. However, this is within the interval corresponding to each pixel, and if the desired CCD output signal itself has a low frequency change, it is preserved. In other words, components that change slowly within each pixel section and have no correlation between pixels are removed, and components that change slowly over the entire pixel,
In other words, components that have correlation between pixels are preserved.

Also, the transfer lock frequency f. The same applies to components higher than . This situation is shown in FIG.

In the figure, high frequency noise and low frequency noise are removed, but the original low frequency components of the signal shown by broken lines are not removed.

Further, the waveform of the CCD output signal has a shape close to a rectangular wave as shown in FIG. 1(C). That is, it contains a relatively large high frequency component with respect to the transfer lock frequency f0. Therefore, if sampling is performed at the timing shown in Figure 1, the edge portions of the waveform (Vn (0), Vn (2
In the portion Δt), the sample value of the signal becomes ambiguous. This is an effect called aliasing that occurs when the signal components include components that are extremely high compared to the sampling frequency. In fact, a square wave has an infinite frequency at its rise/fall. Therefore, in order to suppress this, the center frequency is transferred to the lock frequency r.

The CCD output signal is filtered by a band pass filter set to obtain a CCD output waveform as shown in FIG. This filter processing also has the effect of removing 1/f noise that has large components in the low frequency range. CCD
Since in principle there should be no component higher than the clock frequency fo in the output signal, the desired information will not be lost even if it is passed through a band pass filter. Conditions for the frequency characteristics of the processing circuit system from this point on can be determined in consideration of the frequency fO.

Next, an output detection circuit for a charge coupled device according to the present invention will be described with reference to the block diagram shown in FIG.

In the figure, the CCD output signal output from the CCDI is filtered by an analog band pass filter 2 whose cant-off frequency is the transfer lock frequency fo, and then supplied to a sample hold circuit 3. The filter characteristics of the bandpass filter 2 are shown in FIG.

The sample and hold circuit 3 samples the input waveform at intervals Δt every section 1-N, as shown in FIG. 3 described above. The sampled signal is converted into a digital signal by the quantizer 4 and sent to the arithmetic unit 5. The sample and hold circuit 3 and the quantizer 4 constitute an AD conversion section.

The arithmetic unit 5 calculates C(n) and S from the above-mentioned equations 0 to
(n) is calculated, and the amplitude V a m p (n) is obtained from the above-mentioned formula (2) from C(n) and S (n), and outputted through the Hanwha 6.

The calculation procedure in this calculation unit 5 will be explained with reference to the flowchart shown in FIG.

First, in order to calculate the first section 1 of N waveform sections corresponding to each pixel of CCDI, n, (n=L2...
, N) to the initial value r1. ni se no (・do (step SL).

Next, within the section, the CCD waveform is
1 (i=01,...9M
-1) is set to the first sampling point "0" (step 32).

Next, the CC of the sampling point is calculated using the above equation 0.
The D output voltage n(iΔt) is determined and data sampling is performed (step S3).

Next, it is determined whether or not 'I = M-1' (S4). This is to determine whether or not M samplings have been completed within the relevant section. If not, advance the value of i (step s5) and find the CCD output voltage Vn (iΔt) at the next sampling point (step knob S3).This series of processing from steps 33 to s5 is performed until all M samplings are Repeats until finished.

When M sampling is completed, C(n) and S (
Step s6) to calculate n), and further the above formula [phase]
An amplitude value Vanρ(n) is obtained from (step S7), and this amplitude value Vamp(n) is output or stored (step S8).

Next, it is determined whether 'n=N' (step S9).

This is to determine whether or not the calculation processing in all N side waveform sections corresponding to each pixel of CCD 1 has been completed.If not, the value of n is incremented (Step 5IO) and the process proceeds to Step S2. Go back and process the next section. When the processing for all N sections is completed, a ``Yes'' determination is made in step S9, and the arithmetic processing ends.

(Effects of the Invention) According to the present invention, in a charge-coupled device having a gated charge-integrating output circuit, it is possible to eliminate the influence of random noise such as reset transistor noise, 1/f noise, etc. An output signal with improved S/N can be obtained.

In addition, aliasing caused by sampling can be suppressed,
Furthermore, the frequency characteristics of the circuit system can be relaxed, and a highly accurate signal detection system can be realized.

[Brief explanation of drawings]

1 to 3 are waveform diagrams for explaining the output detection method of a charge-coupled device according to the present invention. FIG. 4 is a block diagram showing an embodiment of the output detection circuit of a charge-coupled device according to the present invention. Fig. 5 is a characteristic diagram of the bandpass filter in Fig. 4, Fig. 6 is a flowchart for explaining the operation of the arithmetic unit in Fig. 4, and Fig. 7 is a schematic diagram showing an example of a gated charge integration type output circuit. , FIG. 8 is a waveform diagram for explaining the operation of FIG. 7.

Claims (2)

[Claims] (1) Receive an output signal with an amplitude corresponding to the reference potential and signal charge every cycle of the transfer clock pulse from a charge-coupled device having a gated charge-integrating output circuit, and apply this signal to each cycle of the transfer clock pulse. The band is limited by a band-pass filter serving as a pass band, and this band-limited signal is expanded into a Fourier series whose basic frequency is one period of the transfer clock pulse, and only the component corresponding to the signal charge is extracted from the output signal. A method for detecting the output of a charge-coupled device, characterized in that: (2) a charge-coupled device having a gated charge-integrating output circuit that outputs a signal with an amplitude corresponding to the reference potential and the signal charge every cycle of the transfer clock pulse; an analog bandpass filter that limits the band to a component with the pulse frequency as the center frequency; an AD converter that samples the band-limited signal at a predetermined time interval and then quantizes it and converts it into a digital signal; 1. An output detection circuit for a charge-coupled device, comprising: an arithmetic unit that expands into a series and extracts only a component corresponding to the signal charge.