JPH03228023A - Liquid crystal display device and its production - Google Patents

Abstract

PURPOSE:To prevent the degradation in the light transmittance of picture element parts by providing holes at least at the points to be formed with transparent picture element electrodes of a protective film for protecting thin-film transistors and providing the transparent picture element electrodes in these hole parts. CONSTITUTION:The protective film PSV 1 is formed mainly to protect the thin-film transistors TFTs against moisture, etc. The film having high transparency and good moisture resistance is used for this film. The protective film PSV 1 is formed of a silicon oxide film or silicon nitride film. The transparent picture element electrodes ITO 1 are provided for each of the respective picture elements in the picture element electrode hole PXH parts of the protective film PSV1 to constitute a part of the picture element electrodes in the liquid crystal display part. Since the transparent picture element electrodes are formed after the formation of the protective film in such a manner, the exposing of the transparent picture element electrodes to a plasma atmosphere is obviated and since the protective film is formed before the formation of the transparent picture element electrodes, the remaining of the etching of the ITO films at the time of the formation of the protective film does no longer exist. The generation of the white turbidity of the protective film is, therefore, obviated. The degradation in the light transmittance of the picture element parts is thus obviated.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a liquid crystal display device, and particularly to an active matrix type liquid crystal display device using thin film transistors and the like, and a method for manufacturing the same. 2. Description of the Related Art An active matrix type liquid crystal display device is one in which a nonlinear element (switching element) is provided corresponding to each of a plurality of pixel electrodes arranged in a matrix. Theoretically, the liquid crystal in each pixel is constantly driven (duty ratio 1.0), so the active method has better contrast than the so-called simple matrix method, which uses a time-division drive method, especially for color LCDs. It is becoming an indispensable technology for display devices. A typical switching element is a thin film transistor (TPT).
). In conventional active matrix type liquid crystal display devices, ITO film (transparent conductive film Indium-Tin
A protective film made of silicon nitride is provided on the transparent pixel electrode made of -Oxide. Note that an active matrix liquid crystal display device using thin film transistors is described in, for example, [12.5-inch active matrix color liquid crystal display with redundant configuration], Nikkei Electronics, pp. 193-2.
10. Published by Nikkei McGraw-Hill on December 15, 1986, known for its publication. (Problem to be Solved by the Invention 1) In such a liquid crystal display device, since charges are accumulated in the protective film, burn-in may become a defect. Also, when manufacturing such a liquid crystal display device, In addition, since the transparent pixel electrode is exposed to a plasma atmosphere during the formation of the protective film, the transparent pixel electrode may be reduced, the transparent pixel electrode may become cloudy, and the light transmittance of the pixel portion may decrease. When sputtering the ITO film that makes up the electrode, the ITO film crystallizes locally and remains after etching, so if a protective film is formed, the protective film becomes cloudy and the light transmittance of the pixel area decreases. This invention has been made to solve the above-mentioned problems, and provides a liquid crystal display device that does not suffer from burn-in, and a liquid crystal display device that does not cause a decrease in the light transmittance of the pixel portion. (Means for Solving the Problem 1) In order to achieve this object, the present invention uses an active matrix method in which a thin film transistor and a pixel electrode are one component of a pixel. In the liquid crystal display device, a hole is provided at least at a location where a transparent pixel electrode is to be formed in the protective film for protecting the thin film transistor, and a transparent pixel electrode is provided in the hole. In a method for manufacturing an active matrix type liquid crystal display device as one component, a protective film is provided to protect the thin film transistor, and a hole is formed in at least a portion of the protective film where a transparent pixel electrode is to be formed. , a transparent pixel electrode is provided in the hole. (Function) In this liquid crystal display device, there is no protective film on the transparent pixel electrode. In addition, in the manufacturing method of this liquid crystal display device, the transparent pixel electrode is provided with a protective film. Since the transparent pixel electrode is formed after the formation of the transparent pixel electrode, the transparent pixel electrode is not exposed to the plasma atmosphere, and since the protective film is formed before the formation of the transparent pixel electrode, there is no etching residue of the ITO film when the protective film is formed. [Example 1] Hereinafter, the structure of the present invention will be explained together with an example in which the invention is applied to an active matrix color liquid crystal display device. 1 is a plan view showing one pixel and its surroundings of an active matrix color liquid crystal display device to which the present invention is applied, and FIG. A diagram showing a cross section along the IIA-IfA cutting line in the figure and a cross section near the seal part of the display panel, No. 2
Figure B is a sectional view taken along the line IIB-IIB in Figure 1. Moreover, FIG. 3 (main part plan view) shows a plan view when a plurality of pixels shown in FIG. 1 are arranged. Pixel Arrangement> As shown in Figure 1, each pixel is connected to two adjacent scanning signal lines (gate signal line or horizontal signal #I) GL and two adjacent video signal lines (drain signal line or vertical signal line). Signal 1) It is arranged in the intersection area with DL (in the area surrounded by four signal lines). Each pixel has a thin film transistor TPT and a transparent pixel electrode ITO.
I and a storage capacitor element Cadd. Scanning signal line GL
extend in the column direction, and a plurality of them are arranged in the row direction. The video signal lines DL extend in the row direction, and a plurality of video signal lines DL are arranged in the column direction. <Overall cross-sectional structure of display section> As shown in FIG. 2A, a thin film transistor TPT and a transparent pixel electrode ITOI are formed on the lower transparent glass substrate 5UBI side with respect to the liquid crystal LC, and the upper transparent glass substrate 5
On the UB2 side, a color filter FIL and a light shielding film BM forming a light shielding black matrix pattern are formed. The lower transparent glass substrate SUB l is, for example, 1. l[
The thickness is approximately 1 mm. The central part of Figure 2A shows a cross section of one pixel,
The left side shows a cross section of the left side edge of the transparent glass substrate 5IJB1.5OB2 where the external lead wiring is present.
The right side shows a cross section of the right edge portion of the transparent glass substrate 5UB1.5UB2 where no external lead wiring is present. The sealing material SL shown on the left and right sides of FIG. 2A is configured to seal the liquid crystal LC, and the transparent glass substrate 5UB1.5 excluding the liquid crystal sealing opening (not shown)
It is formed along the entire edge of UB2. The sealing materials S and L are made of, for example, epoxy resin. Common transparent pixel on the upper transparent glass substrate 5UB2 side @Koku IT
O2 is supplied to the silver paste material SI at least in one place.
L is connected to an external lead wiring formed on the UBI side of the lower transparent glass substrate 5. This external lead wiring includes a gate electrode GT, a source electrode SDI, and a drain electrode SD2.
are formed in the same manufacturing process as each. Alignment film ○RII, 0RI2, transparent pixel electrode ITo1, common transparent pixel electrode IT○2, protective film PSv1, PSV2,
Each layer of insulation IQGI is formed inside the sealant SL. Polarizing plates POLI and POL2 are respectively attached to a lower transparent glass substrate SUB l and an upper transparent glass substrate 5UB.
It is formed on the outer surface of 2. The liquid crystal LC has a lower alignment film 0RI that sets the direction of the liquid crystal molecules.
It is sealed between I and the upper alignment film ○RI2, and the seal part S
It is sealed by L. The lower alignment film 0RII is formed on the protective film PSVI on the lower transparent glass substrate 5UBl side. A light shielding film BM, a color filter FIL, and a protective film P are provided on the inner surface (liquid crystal LC side) of the upper transparent glass substrate 5OB2.
SV2, a common transparent pixel electrode ITO2 (COM), and an upper alignment film RI2 are sequentially laminated. In this liquid crystal display device, the layers on the lower transparent glass substrate 5UBl side and the upper transparent glass substrate 5UB2 side are separately formed, and then the upper and lower transparent glass substrates SUB! ,5tJB2
It is assembled by overlapping the two and sealing the liquid crystal LC between them. <Thin Film Transistor TFT> The thin film transistor TPT operates in such a way that when a positive bias is applied to the gate electrode GT, the channel resistance between the source and drain becomes small, and when the bias is made zero, the channel resistance becomes large. The thin film transistor TPT of each pixel has three
It is divided into two (plurality) of thin film transistors (divided thin film transistors) TFT1, TFT2, and TFT3. Each of the thin film transistors TPTL to TFT3 is substantially the same size (channel length and width are the same)
It consists of This divided thin film transistor T
Each of PT1 to TFT3 is mainly a gate electrode GT.
, gate insulating film CI, i-type (intrinsic, 1ntrinsic
, a type 1 semiconductor layer AS made of amorphous silicon (Si) (not doped with conductivity type determining impurities), a pair of source electrodes SDI, and a drain electrode SD2. Note that the source and drain are originally determined by the bias polarity between them, and in the circuit of this liquid crystal display device, the polarity is reversed during operation, so it should be understood that the source and drain are interchanged during operation. However, in the following description, for convenience, one side is fixed as a source and the other side is fixed as a drain. (Gate electrode GT) As shown in detail in FIG. 4 (a plan view depicting only the first conductive film gl, second conductive film g2, and l-type semiconductor layer AS in FIG. 1), the gate electrode GT receives a scanning signal. The gate electrode GT, which is formed in a shape protruding vertically (upward in FIGS. 1 and 4) from the line GL (branched into a T-shape), is located in the formation region of each of the thin film transistors TPT1 to TFT3. It is constructed so that it protrudes up to the point. The respective gate electrodes GT of the thin film transistors TPTI to TFT3 are configured integrally (as a common gate electrode) and are formed continuously to the scanning signal line GL. The gate electrode GT is formed of a single-layer first conductive film GL so as not to form a large step in the region where the thin film transistor TFT is formed. The first conductive film g1 is, for example, a chromium (Cr) film formed by sputtering, and
Form the film with a thickness of approximately As shown in FIGS. 1, 2A, and 4, the gate electrode GT is formed to be thicker than the type 1 semiconductor layer AS (as viewed from below) so as to completely cover the type 1 semiconductor layer AS. Therefore, when a backlight BL such as a fluorescent lamp is attached below the lower transparent glass substrate 5UBl, the gate electrode GT made of opaque or ROM forms a shadow, and the backlight light does not shine on the type 1 semiconductor layer AS. Therefore, conductive phenomena caused by light irradiation, that is, deterioration of the off-characteristics of thin film transistors and TFTs, are less likely to occur. Note that the original size of the gate electrode GT is the minimum required size to span between the source electrode SDI and drain electrode SD2 (including the alignment margin between the gate electrode GT, the source electrode SDI, and the drain electrode SD2). ) has a width. The depth length that determines the channel width W is the source electrode SD
Distance (channel length) L between I and drain electrode SD2
It is determined by the ratio, that is, the factor W/L that determines the mutual conductance gm. The size of the gate electrode GT in this liquid crystal display device is of course made larger than the original size mentioned above. Note that if we consider only from the gate and light shielding function of the gate electrode GT, the gate electrode GET and the scanning signal line O
L may be integrally formed in a single layer, in which case aluminum (A) containing silicon is used as an opaque conductive material.
I), pure aluminum, aluminum containing palladium (Pd), etc. can be selected. <Scanning Signal Line GL) The scanning signal line GL is constituted by a composite film consisting of a first conductive film g1 and a second conductive film g2 provided above the first conductive film g1. The first conductivity of this scanning signal line GL! l1g1 is formed in the same manufacturing process as the first conductive film gl of the gate electrode GT, and is integrally configured. The second conductive film g2 is formed using, for example, an aluminum film formed by sputtering, and has a film thickness of approximately 1000 to 5500 mm. The second conductive film g2 is configured to reduce the resistance value of the scanning signal, 1JGL, and to increase the signal transmission speed (improve the writing characteristics of pixel information). Furthermore, the width of the second conductive film g2 of the scanning signal line GL is configured to be smaller than the width of the first conductive film g1. That is, the side wall of the scanning signal line GL has a gradual step shape. <Insulating film Gr> The insulating film GI is used as a gate insulating film of each of the thin film transistors TPTI to TFT3. The insulating film GI is formed on the gate electrode GT and the scanning signal line GL. For example, the insulating film GI is plasma C.
Using a silicon nitride film formed by VD,
] Formed with a film thickness of approximately . <I-type semiconductor layer AS> As shown in FIG. 4, the i-type semiconductor layer AS is used as a channel formation region for each of the thin film transistors TPT1 to TFT3 divided into a plurality of parts. i-type semiconductor layer A
S is formed of an amorphous silicon film or a polycrystalline silicon film, and is formed to have a thickness of about 1 goo [A]. This i-type semiconductor layer AS is made of Si by changing the components of the supplied gas.
, N, an insulating film G used as a gate insulating film
Subsequently to the formation of 1, it is formed in the same plasma CVD apparatus without being exposed to the outside from the plasma CVD apparatus. Further, a P-doped N+ type semiconductor layer dO (FIG. 2A) for ohmic contact is similarly continuously formed to a thickness of about 400 [A]. Thereafter, the lower transparent glass substrate 5UBI was taken out from the CVD apparatus, and the N3 type semiconductor layer dO and the i type semiconductor layer AS were separated as shown in FIGS. 1, 2A and 4 using photo processing technology. Buttered into islands. As shown in detail in FIGS. 1 and 4, the i-type semiconductor layer AS is located at the intersection of the scanning signal line GL and the video signal line DL (
The cross-over section) is also provided between the two. The type 1 semiconductor layer AS at this intersection is the scanning signal line G at the intersection.
It is configured to reduce short circuits between L and the video signal line DL. Source electrode SDI and drain electrode 5D2) The source electrode SDI and drain voltage 15D2 of each of the thin film transistors TPTI to TPT3 divided into a plurality of parts are shown in FIG. 1, FIG. 2A, and FIG. ~Third conductive film d
As shown in detail in the plan view depicting only 1 to d3, l
They are provided separately on the type semiconductor layer AS. Each of the source electrode SDI and drain electrode SD2 is
From the lower layer side in contact with the N3 type semiconductor layer dO, the 1411th
It is constructed by sequentially overlapping a film di and a second conductive film d2. The first conductive film d1 and the second conductive film d2 of the source electrode SDI are formed in the same manufacturing process as the first conductive film d1 and the second conductive film d2 of the drain electrode SD2. The first conductive film d1 is a chromium film formed by sputtering,
It is formed with a film thickness of 500 to 1000 [A] (in this liquid crystal display device, a film thickness of about 600 [A]). The thicker the chromium film is, the greater the stress will be, so
The film thickness is formed within a range of about 0.00 [persons]. The chromium film has good contact with the N+ type semiconductor layer do. The chromium film constitutes a so-called barrier layer that prevents aluminum of the second conductive film d2, which will be described later, from diffusing into the N3 type semiconductor layer dO. As the first conductive film d1, in addition to the chromium film, a high melting point metal (
Mo, Ti, Ta%W) film, high melting point metal silicide (M
It may be formed using a film (oSi, , TiSi, , TaSi, , WSi,). After patterning the first conductive film d1 by photo processing, the N+ type semiconductor layer dO is removed using the same photo processing mask or using the first conductive film d1 as a mask. In other words, the N+ type semiconductor layer d remaining on the type 1 semiconductor layer AS
o, the portion other than the first conductive film di is removed by self-alignment. At this time, since the N" type semiconductor layer do is etched so that its entire thickness is removed, the i type semiconductor layer A
S is also etched to some extent on its surface, but the degree of etching can be controlled by the etching time. Thereafter, the second conductive film d2 is formed by aluminum sputtering to a thickness of 3000 to 5500 [in] (in this liquid crystal display device, the film thickness is about 3500 [in]). Aluminum film has less stress than chrome film,
It is possible to form a thick film, and the source voltage m5Dl,
It is configured to reduce the resistance values of the drain electrode SD2 and the video signal line DL. The second conductive film d2 may be formed of an aluminum film containing silicon or copper (Cu) as an additive in addition to the aluminum film. First conductive film d1 of source electrode SDI, drain electrode SD
Each of the two first conductive films d1 has an upper second conductive film d1.
Compared to No. 2, it is much more inward (into the channel region). In other words, the first conductive film d1 in these parts
is the thin film transistor TPT regardless of the second conductive film d2.
It is configured such that the channel length of the channel can be specified. The source electrode SDI is connected to the transparent pixel electrode ITOI. The source electrode SDI has a step shape of the i-type semiconductor layer AS (a step corresponding to the sum of the film thickness of the first $1i film g1, the film thickness of the N+ type semiconductor layer do, and the film thickness of the l-type semiconductor layer AS). ). Specifically, the source electrode SDI is connected to a first conductive film di formed along the step shape of the L-type semiconductor layer AS, and a transparent pixel electrode ITOI on the upper part of the first conductive film di. The second conductive film d2 is formed with a smaller size on the opposite side. The second conductive film d2 of the source electrode SDI cannot overcome the step shape of the i-type semiconductor layer AS because the chromium film of the first conductive film d1 cannot be formed thickly due to increased stress, so it can overcome the step shape of the i-type semiconductor layer AS. It is configured for. In other words, step coverage is improved by forming the second conductive film d2 thickly. Since the second conductive film d2 can be formed thickly, it greatly contributes to reducing the resistance value of the source electrode SDI (the same applies to the drain electrode SD2 and the video signal line DL). Protective film PSVI) Protective film PSV to protect the thin film transistor TPT
I is provided. The protective film PSVI is mainly 7iJrS
It is formed to protect the transistor TPT from moisture, etc., and a material with high transparency and good moisture resistance is used. The protective film PSVI is formed of, for example, a silicon oxide film or a silicon nitride film formed by a plasma CVD apparatus, and is formed to have a thickness of about l[x]. In addition, the protective film P
A pixel electrode hole PXH is provided in SVI. (Transparent pixel 1 electrode ITOI> The transparent pixel electric field ITOI is provided in the pixel electrode hole PXH of the protective film PsVl for each pixel, and constitutes one of the pixel electrodes of the liquid crystal display section.The transparent pixel electrode ITOI is formed by sputtering. The formed transparent conductive film (Indium-Ti
The third layer consists of n-Oxide ITO: Nesa film).
It is composed of a conductive film d3, and the third conductive film d3 has a thickness of 100
Film thickness of 0 to 2000 [A] (in this liquid crystal display device,
The film thickness is approximately +400 [A]. In this way, the protective film PSVI is formed on the transparent pixel electrode IrO2.
Since no charge is present on the transparent pixel electrode IrO2, no image sticking occurs. In addition, since the protective film PSVI exists between the video signal line DL and the transparent pixel electrode ITOI, in order to prevent the video signal MDL and the transparent pixel electrode ITOI from short-circuiting, the video signal line DL and the transparent pixel electrode Since there is no need to increase the distance from the ITOI, the aperture ratio can be increased and the display quality can be improved. The transparent pixel electrode ITOI is divided into three divided transparent pixel electrodes E1, E2, and E3 corresponding to each of the thin film transistors TFTI-TFT3 divided into a plurality of pixels. The divided transparent pixel electrodes E1 to E3 are each connected to the source electrode SDI of the thin film transistor TPT. Each of the divided transparent pixel electrodes E1 to E3 is patterned to have substantially the same area. In this way, the thin film transistor TPT of one pixel is divided into a plurality of thin film transistors TPT1 to TFT3, and the thin film transistors TFTI to TFT3 are divided into the plurality of thin film transistors TPT1 to TFT3.
By connecting each of the divided transparent pixel electrodes El-E3 to each of the divided transparent pixel electrodes El-E3, even if a divided part (for example, the thin film transistor TFTI) becomes a point defect, it is no longer a point defect when viewed from the perspective of the entire pixel (the thin film transistor TPT
2 and thin film transistor TFT3 are not defects), the probability of point defects can be reduced, and the defects can be made difficult to see. Moreover, by configuring each of the divided transparent pixel electrodes E1 to E3 with substantially the same area, the divided transparent pixel electrode E
It is possible to make the respective liquid crystal capacitances Cpix composed of each of 1-E3 and the common transparent pixel 11-pole ITO2 uniform. (Light-shielding film BM> On the upper transparent glass substrate 5UBZ side, a shielding j[B
M is provided, and the shielding 11KBM has a pattern as shown by the hatching in FIG. Note that Figure 6 is the first
FIG. 3 is a plan view depicting only the third conductive film d3 made of an ITO film, the color filter FIL, and the light shielding MBM in the figure. The light-shielding film BM is formed of a film having a high light-shielding property, such as an aluminum film or a chromium film, and in this liquid crystal display device, the chromium film is formed by sputtering to a thickness of about 1300 mm. Therefore, the i-type semiconductor layer AS of the thin film transistors TFT1 to TFT3 is sandwiched between the upper and lower light shielding films BM and the thick gate electrode GT, and that portion is not exposed to external natural light or backlight light. The light shielding film BM is formed around the pixel as shown by the hatched area in FIG. There is. Therefore, the outline of each pixel becomes clear due to the light shielding 11BM, and the contrast is improved. In other words, the light shielding film BM has two functions: shielding the i-type semiconductor layer AS and serving as a black matrix. Note that it is also possible to attach a backlight to the upper transparent glass substrate 5UB2 side and make the lower transparent glass substrate SUB1 the observation side (externally exposed side). <Common transparent pixel electrode ITO2> The common transparent pixel electrode ITO2 has a lower transparent glass base FiS
Transparent pixel electrode rTO1 provided for each pixel on the UB l side
The optical state of the liquid crystal LC is opposite to each pixel @ polar ITO
Potential difference (electric field) between + and common transparent pixel electrode ITO2
changes in response to. A common voltage ~' com is applied to this common transparent pixel electrode IT○2. The common voltage V com is an intermediate potential between the low-level drive voltage Vdm1n and the high-level drive voltage Vdmax applied to the video signal line DL. <Color Filter FIL> The color filter FIL is constructed by coloring a dyed base material made of a resin material such as an acrylic resin with a dye. The color filter FIL is formed in a dot shape for each pixel at a position facing the pixel (Fig. 7), and is colored differently (
Figure 7 shows the third conductive film layer d3 and color filter F in Figure 3.
Only the IL is drawn, and the R, G, and B color filters FIL are 45°, 135°, and cross hatched, respectively). The color filter FIL has transparent pixel electrodes ITOI (El to E3) as shown in FIG.
The light shielding film BM is formed to be thick so as to cover all of the transparent pixel electrode IT○1, and the light shielding film BM is formed inside the peripheral edge of the transparent pixel electrode IT○1 so as to overlap with the color filter FIL and the edge part of the transparent pixel electrode TOI. Color filter FIL can be formed as follows. First, a dyed base material is formed on the surface of the upper transparent glass substrate SUB 2, and the dyed base material other than the red filter forming area is removed by photolithography technology. After this, the dyed base material is dyed with red dye, fixed treatment is performed, and red filter Ri is applied.
Form. Next, a green filter G and a blue filter B are sequentially formed by performing similar steps. <Protective Film PSV2> The protective film PSV2 is provided in order to prevent the dyes used to dye the color filters FIL into different colors from leaking into the liquid crystal LC. The protective film PSV2 is made of a transparent resin material such as acrylic resin or epoxy resin. Pixel Arrangement> As shown in FIGS. 3 and 7, a plurality of pixels of the liquid crystal display section are arranged in the same column direction as the direction in which the scanning signal line GL extends, and are arranged in pixel columns Xl, X2, . X3, X4. It consists of each of... Each pixel column XI, X2. X3. X
4. Each pixel of... is a thin film transistor TP
The arrangement positions of T1 to TPT3 and divided transparent pixel electrodes E1 to E3 are configured to be the same. In other words, odd pixel column XI
, X3°... each pixel is a thin film transistor T
The arrangement positions of PTl to TFT3 are arranged on the right side, and the arrangement positions of divided transparent pixel electrodes E1 to E3 are arranged on the left side. Odd pixel columns Xi, X3. . . , adjacent even-numbered pixel columns X2 . The pixels of X4', . . . are arranged in the odd pixel columns XI, X3, . . . . each pixel is made up of pixels that are symmetrically turned upside down with respect to the extending direction of the video signal line DL. That is, pixel column X2
．． X4. In each pixel, the thin film transistors TPT1 to TFT3 are arranged on the left side, and the transparent pixel electrodes E1 to E3 are arranged on the right side. and,
Pixel row X2. Each pixel of X4° is a pixel column Xi
,X3. ... are shifted (shifted) by half a pixel interval in the column direction. In other words, if each pixel interval of pixel row X is 1.0 (1,0 pitch), then the next stage pixel row
0.5 pixel interval (0,
5 pitch) is off. The video signal line DL extending in the row direction between each pixel is configured to extend in the column direction by a half pixel interval (0.5 pitch) between each pixel column X. As a result, as shown in FIG. 7, the pixel on which the predetermined color filter is formed in the previous pixel row Pixels on which color filters are formed (for example, pixel column x
4) are spaced apart by 1.5 pixels (1.5 pitch), and the RGB color filters FIL are arranged in a triangular arrangement. Color filter FI
The triangular arrangement structure of RGB of L can improve the color mixing of each color, and therefore can improve the resolution of a color image. Moreover, since the video line 13 DL extends in the column direction by only half a pixel interval between each pixel column X, it does not intersect with the adjacent video signal line DL. Therefore, it is possible to eliminate the routing of the video signal line DL and reduce the area occupied by the video signal line DL, and it is also possible to eliminate the detour of the video signal line DL and eliminate the multilayer wiring structure. <Equivalent circuit of the entire display device> The equivalent circuit of this liquid crystal display device is shown in FIG. X i G, X i +l G, . . . are video signal lines DL connected to pixels in which the green filter G is formed. XiB, Xi+IB, . . . are video signal lines DL connected to pixels in which the stomach color filter B is formed. Xi+lR, Xi+2R, . . . are video signal lines DL connected to pixels in which red filters R are formed. These video signal lines DL are selected by a video signal drive circuit. Yl is a scanning signal line GL that selects the pixel column XI shown in FIGS. 3 and 7. Similarly, %Yi+l, Yi+2. . . , each of pixel rows X2 . X3. . . . is a scanning signal line GL that selects each of the following. These scanning signal lines GL are connected to a vertical scanning circuit. (Structure of storage capacitor element Cadd) Each of the divided transparent pixel electrodes E1 to E3 is bent into an L-shape so as to overlap the adjacent scanning signal line GL at the end opposite to the end connected to the thin film transistor TPT. It is formed as follows. As is clear from FIG. 2B, this superposition is achieved by using a storage capacitance element (capacitance element)C
Configure add. The dielectric film of this storage capacitor element Cadd is made of the same layer as the insulating film Gl used as the gate insulating film of the thin film transistor TPT. As is clear from FIG. 4, the storage capacitor element Cadd is formed in the portion of the gate line GL where the first conductive film g1 is widened. Note that the portion of the 14mth film g1 that intersects with the video signal line DL is made thin in order to reduce the probability of short circuit with the video signal line DL. In a part between the electrode PL1 and each of the divided transparent pixel electrodes El to E3 that are overlapped to form the storage capacitor element Cadd, the source 1 is connected to the transparent pixel electrode when the source 1 crosses over the step shape, similar to the pole SDI. An island region made up of the first conductive film d1 and the second conductive film d2 is provided so that the electrode ITOI is not disconnected. This island region is configured to be as small as possible so as not to reduce the area (aperture ratio) of the transparent pixel electrode ITO1. (Equivalent circuit of storage capacitor element Cadd and its operation) An equivalent circuit of the pixel shown in FIG. 1 is shown in FIG. In FIG. 9, Cgs is the gate electrode G of the thin film transistor TPT.
This is a parasitic capacitance formed between T and the source electrode SDI. The dielectric film of the parasitic capacitance Cgs is an insulating MCI. C
pix is a liquid crystal capacitor formed between the transparent pixel electrode IT01 (PIX) and the common transparent pixel electrode ITO2 (COM). The dielectric film of the liquid crystal capacitor Cpix is the liquid crystal LC1 protective film PSV.
I and alignment films 0RII and 0RI2. Vlc is a midpoint potential. When the thin film transistor TPT switches, the storage capacitance element Cadd has a midpoint potential (pixel electrode potential) Vlc.
It works to reduce the influence of gate potential change ΔVg on. This situation can be expressed as the following formula. ΔVlc= (Cgs/(Cgs+Cadd+Cpix
)) XΔVg Here, ΔVlc represents the change in midpoint potential due to ΔVg. This variation ΔVlc causes a direct current component applied to the liquid crystal LC, but the larger the holding capacitance Cadd is, the smaller its value can be. Further, the storage capacitor element Cadd also has the effect of lengthening the discharge time, so that video information is stored for a long time after the thin film transistor TPT is turned off. Reducing the DC component applied to the liquid crystal LC can improve the life of the liquid crystal LC and reduce so-called burn-in, in which the previous image remains when switching between liquid crystal display screens. As mentioned above, since the gate electrode GT is made large enough to completely cover the i-type semiconductor 5AS, the source electrode SDI
, the overlap area with the drain electrode SD2 increases, and therefore the parasitic capacitance i1cgs increases.1. Midpoint potential V
The opposite effect occurs in that lc becomes more susceptible to the influence of the gate (scanning) signal Vg. However, by providing the storage capacitor element Cadd, this disadvantage can be solved.The storage capacitance of the storage capacitor element Cadd is 4 to 8 times (4. Cpix
<Cadd<8・Cpix), 8 to 32 times the parasitic capacitance Cgs (llcgs<Cadd<32・Cgs)
Set to a value of about (How to connect storage capacitor element Cadd 1 electrode wire) The final stage scanning signal line GL (or first stage scanning signal line GL) used only as a capacitor electrode line is as shown in FIG.
Connect to common transparent pixel ml pole IT○2 (\7com). As shown in FIG. 2A, the common transparent pixel electrode IT○2 is connected to an external lead wiring at the peripheral edge of the liquid crystal display device using a silver paste material SIL. Moreover, some of the conductive layers (gl and g2) of this external lead wiring are formed in the same manufacturing process as the scanning signal line GL. As a result,
The scanning signal line (capacitive electrode line) GL at the final stage can be easily connected to the common transparent pixel electrode IT○2. Alternatively, as shown by the dotted line in FIG. 8, the final stage (first stage) scanning signal line (capacitive electrode line) GL may be connected to the first stage (final stage) scanning signal line GL. Note that this connection can be made by internal wiring within the liquid crystal display section or external wiring. (DC cancellation by scanning signal of storage capacitor element Cadd) This liquid crystal display device is based on the DC cancellation method (DC cancellation method) described in Japanese Patent Application No. 62-95125 previously filed by the applicant of the present application. As shown in Fig. 10 (time chart), by controlling the drive voltage of the scanning signal line GL, it is possible to further reduce the DC component applied to the liquid crystal LC. The driving voltage of the line GL, Vi+1 is the scanning signal of the next stage, and the driving voltage of the line GL.Vee is the low level driving voltage Vdm1n applied to the video signal line DL. ~・dt, l is the scanning signal of the next stage, and the driving voltage of the line GL. The applied high-level drive' is the pressure V d max. At each time t = tl
The voltage change Δv1 to Δv4 of the midpoint potential Vlc (see FIG. 9) at ~L4 is the total capacitance of the pixel C=Cgs
When +Cp+x+Cadd, it is expressed by the following equation. b v, = −(Cgs/C)・V 2△V, =+
(Cgs/C)・(v 1 +V2)−(Cadd/
C)・V 2 △V, =-(Cgs/C)・V 1 + (Cadd/C) (V 1 + V 2) △V,
= -(Cadd/C)・V 1 Here, if the drive voltage applied to the scanning signal line GL is sufficient (see below (Note 1)
), the DC voltage applied to the liquid crystal LC is expressed by the following equation. △■, +△V, = (Cadd・V 2- Cgs-
V l )/C Therefore, Cadd・V 2 =
When Cgs·V l, the DC voltage applied to the liquid crystal LC becomes O. (Note 1 At times ci and t2, the change in the drive voltage Vi affects the midpoint potential Vlc, but during the period from 2 to 3, the midpoint potential Vlc is brought to the same potential as the video signal potential through the signal line Xi. (Sufficient writing of video signals).The potential applied to the liquid crystal LC is almost determined by the potential immediately after the thin film transistor TPT is turned off (the off period of the thin film transistor TPT is overwhelmingly longer than the on period).
In calculation of the DC component applied to C, the periods 1 to 3 can be almost ignored, and it is sufficient to consider the potential immediately after the thin film transistor TPT is turned off, that is, the influence of the transition at times L3 and L4. Note that the polarity of the video signal is inverted for each frame or line, and the DC component due to the video signal itself is zero. In other words, in the DC cancellation method, the reduction in the midpoint potential Vlc caused by the parasitic capacitance Cgs is compensated for by the retention capacitance element Ca
dd and the next-stage scanning signal line (capacitive electrode line) GL, the DC component applied to the liquid crystal LC can be made extremely small. As a result, the life of the liquid crystal LC of the liquid crystal display device can be improved. Of course, when the gate electrode GT is increased in size to improve the light shielding effect, the storage capacitance of the storage capacitance element Cadd may be increased accordingly. Next, a method for manufacturing the liquid crystal display device shown in FIGS. 1 to 1O will be described. First, a film with a thickness of l is deposited on a lower transparent glass substrate 5UBI made of 7059 glass (product name).
A first conductive film g1 made of 100% chromium is provided by sputtering. Next, by selectively etching the first conductive film g1 using a photolithography technique using a ceric ammonium nitrate solution as an etching solution, the first layer of the scanning signal line GL, the gate electrode GT, and the storage capacitor Cadd are etched. The electrode PL1. A gate terminal (not shown) and a drain terminal (not shown) are formed. Next, a second conductive film g2 made of aluminum-palladium, aluminum-silicon, aluminum-silicon-titanium, aluminum-silicon-copper, etc. having a thickness of 100 Å is provided by sputtering. next,
By selectively etching the second conductive film g2 using a mixed acid of phosphoric acid, nitric acid, and acetic acid as an etching solution, the second layer of the scanning signal line GL is formed, and the gate electrode, drain second conductive film g on the electrode
2 will be provided. Next, ammonia gas, silane gas, and nitrogen gas were introduced into the plasma CVD apparatus, and a film thickness of 350 mm was obtained.
A silicon nitride film was provided in the film, and silane gas and hydrogen gas were introduced into the plasma CVD apparatus to obtain a film thickness of 2100 [.
After forming an l-type amorphous silicon film, plasma C
Hydrogen gas and phosphine gas are introduced into the VD equipment to form an N" type silicon film with a film thickness of 300 [A].Next, an N+ type silicon film is formed by photolithography using SF, , and CCU as dry etching gases. A type 1 semiconductor layer AS is formed by selectively etching the silicon film and the l-type amorphous silicon film.Next, the silicon nitride film is selected by photolithography using SF as a dry etching gas. Then, a first conductive film d1 made of chromium and having a thickness of 600 mm is formed by sputtering.Then, the first conductive film d1 is formed by photolithography. By selectively etching, the first layer of the video signal line DL, source electrode SDI, and train electrode SD2 is formed.Next, after removing the resist, a resist is applied to form the video signal line DL, source electrode SDI, and train electrode SD2. A wide resist pattern for N+ etching that completely covers the SDI and drain electrodes SD2 is formed, and CCQ, , SF are placed in the dry etching apparatus.
, and selectively etching the N+ type silicon film, an N" type semiconductor layer dO is formed. Next, aluminum-palladium, aluminum-silicon, and aluminum-palladium with a film thickness of asoo [A] are formed. The second layer is made of silicon-titanium, aluminum-silicon-copper, etc.
A conductive film d2 is provided by sputtering. Next, the second conductive film d2 is selectively etched using photolithography to form a second layer of the video signal line DL, source electrode SD1, and drain electrode SD2. Next, ammonia gas, silane gas, and nitrogen gas are introduced into the plasma CVD apparatus to form a silicon nitride film having a thickness of 1 [x]. Next, by selectively etching the silicon nitride film using photolithography using SF as a dry etching gas, a protective gPsVl is formed (here, a pixel electrode hole PXH is formed).Next, the resist is removed. Before doing so, use developer NMD (product name)
The second conductive film g2 on the gate electrode and drain electrode is removed using a mixed acid of phosphoric acid, nitric acid, and acetic acid. Next, a third conductive film d3 made of an ITO film having a thickness of 1200 mm is provided by sputtering. Next, by selectively etching and etching the third conductive film d3 using a mixed acid of hydrochloric acid and nitric acid as an etching solution, the uppermost layer of the gate terminal and drain terminal and the transparent pixel electrode IT○1 are etched. form. In this method for manufacturing a liquid crystal display device, since the transparent pixel electrode ITOI is formed after the formation of the protective film PSVI,
Since the transparent pixel electrode ITOI is not exposed to the plasma atmosphere for forming the protective film PSVI, the transparent pixel electrode ITOI is not reduced and the transparent pixel electrode ITOI is not exposed to the plasma atmosphere for forming the protective film PSVI.
Since TO1 does not become cloudy, the light transmittance of the pixel portion does not decrease. In addition, since the protective film P S V I is formed before the formation of the transparent pixel electrode IT○1, the protective film PS~'1 will not become cloudy due to the etching residue of the ITO film, so that the light transmission of the pixel area will be reduced. The rate never decreases. Furthermore, a second conductive film g2 is formed on the gate electrode and the drain electrode.
After forming the protective film PS~'l by dry etching the silicon nitride film, the second conductive film g2 on the gate electrode and the train Ml is removed.
Since the surfaces of the gate electrode and the do-in type rod can be kept clean and not contaminated by dry etching, contact failures will not occur. Furthermore, since the third conductive film d3 forms the uppermost layer of the gate terminal and drain terminal, the reliability of the connection with TAB is increased. As above, the invention made by the present inventor has been specifically explained based on the above embodiments, but this invention is not limited to the above embodiments, and can be modified in various ways without departing from the gist thereof. Of course. For example, in the above embodiment, the protective film PS~'l made of silicon nitride was provided, but a protective film made of an organic film such as a phenol-curable epoxy resin may also be provided. Further, in the above embodiment, the pattern formation of the insulating film G1 and the pattern formation of the protective film psvi were performed separately, but the pattern formation of the insulating film Gl and the pattern formation of the protective film P S V l were performed simultaneously. Good too. Furthermore, in the above embodiment, the pattern formation of the first conductive film d1 and the pattern formation of the second conductive film d2 were performed separately, but the pattern formation of the first conductive film d1 and the pattern formation of the second conductive film d2 were performed separately. You may do both at the same time. Further, in the above-described embodiment, the pixel electrode hole PXH is provided in the protective film PSVI, but the hole may be provided at least at the location where the transparent pixel electrode ITOI is to be formed. Even if it exists in the hole, after forming the video signal line DL with the first and second conductive films d1 and d2,
Since the transparent pixel electrode ITOI is formed by the third conductive film d3, the transparent pixel electrode ITOI and the video signal line I (in order to prevent a short circuit such as the image signal line DL) L and the transparent pixel electrode IT○1 are connected to each other. Since there is no need to increase the distance, the aperture ratio can be increased and the display quality can be improved. (Effects of the Invention j As explained above, in the liquid crystal display device according to the present invention, since charges are not accumulated on the transparent pixel electrode, image sticking does not occur as a defect. In the method of manufacturing the device, the transparent pixel electrode is not exposed to the plasma atmosphere, so the transparent pixel electrode is not reduced, and the transparent pixel electrode is not cloudy, so the light transmittance of the pixel part is not reduced. In addition, since there is no etching residue of the ITO film when the protective film is formed, the protective film does not become cloudy, so the light transmittance of the pixel area does not decrease.In this way, the present invention The effect is remarkable.

[Brief explanation of drawings]

FIG. 1 is a plan view of a main part showing one pixel of a liquid crystal display section of an active matrix color liquid crystal display device to which the present invention is applied, and FIG. 2A is a plan view of II A-n A of FIG. 1.
Cross-sectional view of the part cut along the cutting line and the surrounding area of the seal part, No. 2B
The figure is a sectional view taken along the line IIB-IIB in Figure 1, Figure 3 is a plan view of the main part of a liquid crystal display section in which a plurality of pixels shown in Figure 1 are arranged, and Figures 4 to 6 are the same as Figure 1. Figure 7 is a plan view of the main part depicting only the pixel electrode layer and color filter layer shown in Figure 3, Figure 8 is an active matrix color liquid crystal display. FIG. 9 is an equivalent circuit diagram showing the liquid crystal display section of the device, FIG. 9 is an equivalent circuit diagram of the pixel shown in FIG. 1, and FIG. 10 is a time chart showing the driving voltage of the scanning signal line by the DC cancellation method. SUB...Transparent glass substrate GL...Scanning signal line DL...Video signal line Gr...Insulating film GT...Gate electrode AS...1 type semiconductor layer SD...Source electrode or drain psv... ...Protective film BM...Light shielding film LC...Liquid crystal TPT...Thin film transistor IT○...Transparent pixel electrodes g, d...Conductive film Cadd...Holding capacitor element Cgs...Parasitic capacitance Cpix ...Liquid crystal capacitance PXH...pixel electrode hole and electrode C

Claims (1)

[Scope of Claims] 1. In an active matrix type liquid crystal display device in which a thin film transistor and a pixel electrode are constituent elements of a pixel, at least a portion of a protective film for protecting the thin film transistor where a transparent pixel electrode is to be formed. make a hole in
A liquid crystal display device characterized in that a transparent pixel electrode is provided in the hole. 2. In a method for manufacturing an active matrix type liquid crystal display device in which a thin film transistor and a pixel electrode are constituent elements of a pixel, a protective film is provided to protect the thin film transistor, and at least a transparent pixel electrode of the protective film is provided. 1. A method of manufacturing a liquid crystal display device, comprising: forming a hole at a location to be formed, and then providing a transparent pixel electrode in the hole.