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JPH0294678A - Superconducting device - Google Patents

Superconducting device

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Publication number
JPH0294678A
JPH0294678A JP63246811A JP24681188A JPH0294678A JP H0294678 A JPH0294678 A JP H0294678A JP 63246811 A JP63246811 A JP 63246811A JP 24681188 A JP24681188 A JP 24681188A JP H0294678 A JPH0294678 A JP H0294678A
Authority
JP
Japan
Prior art keywords
superconductor
semiconductor
electrode
superconducting
semiconductor layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63246811A
Other languages
Japanese (ja)
Inventor
Jiro Yoshida
二朗 吉田
Koichi Mizushima
公一 水島
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP63246811A priority Critical patent/JPH0294678A/en
Publication of JPH0294678A publication Critical patent/JPH0294678A/en
Pending legal-status Critical Current

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  • Superconductor Devices And Manufacturing Methods Thereof (AREA)

Abstract

PURPOSE:To make it possible to obtain a vertical laminate device by using carrier injection to modulate proximity effect in a superconducting device. CONSTITUTION:A first superconductor main electrode 12 is formed on an area of some of an insulation substrate 11 and an electrically insulated layer 13 is formed on some of the superconductor main electrode 12. The thickness of the semiconductor layer 13 is defined to be a thickness in the range in which proximity effect by virtue of superconducting is obtained. A voltage is applied between the first main electrode and a high-density impurity contained area formed on a portion of the semiconductor layer 2 and carriers are injected to a semiconductor area sandwiched by first and second superconductor main electrodes 12, 15. Since carrier density modulation in a semiconductor layer is realized by carrier injection from a control electrode in this way, a superconductor current flowing through the first and second superconductor main electrodes 12, 15 can be controlled and a vertical laminate device can be obtained.

Description

【発明の詳細な説明】 [発明の目的] (産業上の利用分野) 本発明は、酸化物超電導体を利用した超電導素子に関す
る。
Detailed Description of the Invention [Object of the Invention] (Industrial Application Field) The present invention relates to a superconducting element using an oxide superconductor.

(従来の技術) 従来から、超電導素子として、一対の超電導体をトンネ
ル絶縁膜を介して対向させた2端子の超電導素子が提案
、開発されている。しかしながら、このような従来の超
電導素子は、2端子素子であるために、トランジスタで
代表される3端子素子に比べて回路構成が複雑になり、
広く用いられるには至っていないのが実情である。
(Prior Art) As a superconducting element, a two-terminal superconducting element in which a pair of superconductors are opposed to each other with a tunnel insulating film interposed therebetween has been proposed and developed. However, since such conventional superconducting elements are two-terminal elements, their circuit configurations are more complex than three-terminal elements such as transistors.
The reality is that it has not yet been widely used.

このため、回路構成が容易な3端子の超電導素子の開発
が強く望まれていた。このような超電導3端子素子とし
ては、たとえば第4図に示すような電界効果型素子が提
案されている。
For this reason, there has been a strong desire to develop a three-terminal superconducting element with an easy circuit configuration. As such a superconducting three-terminal element, a field effect element as shown in FIG. 4, for example, has been proposed.

この素子は、半導体1の片面に、それぞれ超電導体から
なるソース電極2、ドレイン電極3を近接配置し、裏面
側にゲート絶縁膜4を介してゲート電極58設けた構造
となっており、ソース電極2、ドレイン電極3間に半導
体との近接効果を介して流れる超電導電流を、ゲート絶
縁膜4を介してゲート電極5で印加された電圧により半
導体中のキャリア濃度を変調し制御を行なうようになっ
ている。
This device has a structure in which a source electrode 2 and a drain electrode 3 each made of a superconductor are arranged close to each other on one side of a semiconductor 1, and a gate electrode 58 is provided on the back side with a gate insulating film 4 interposed therebetween. 2. The superconducting current flowing between the drain electrode 3 due to the proximity effect with the semiconductor is controlled by modulating the carrier concentration in the semiconductor by the voltage applied at the gate electrode 5 through the gate insulating film 4. ing.

このように、この3端子素子では、半導体装置く知られ
た電界効果の原理を応用して、電流−電圧特性を可変に
している。この素子が動作し得ることは実験的に明らか
にされているが、次のような問題があるため、なお実用
化されるには至っていない。
In this way, in this three-terminal element, the current-voltage characteristics are made variable by applying the principle of field effect, which is well known in semiconductor devices. Although it has been experimentally shown that this device can operate, it has not yet been put into practical use due to the following problems.

すなわち、この3端子素子は、電界効果をその動作原理
としているために制!電圧が大きくなり、電圧利得を得
ることが難しいという問題がある。
In other words, this three-terminal element uses the electric field effect as its operating principle, so it is difficult to control! There is a problem in that the voltage increases and it is difficult to obtain voltage gain.

また、ソース−ドレイン電極を平面上に配置しなくては
ならないため、極微細加工が必要となるという問題もあ
る。さらに、近接効果の生じ得る半導体領域の大きさは
ロ、1μ−以下程度と狭いため、ゲート電極を主電極と
同一面に形成することは難しく、このため第4図に示す
ように電極を主電極の裏面側に配置する等の手段が用い
られる。このためゲート電極部分の半導体の厚さを薄く
する必要があり、その加工が煩雑であるという難点もあ
る。
Furthermore, since the source-drain electrodes must be arranged on a plane, there is also the problem that extremely fine processing is required. Furthermore, since the size of the semiconductor region where the proximity effect can occur is narrow, about 1μ or less, it is difficult to form the gate electrode on the same surface as the main electrode. A method such as placing it on the back side of the electrode is used. Therefore, it is necessary to reduce the thickness of the semiconductor in the gate electrode portion, and there is also the problem that the processing is complicated.

(発明が解決しようとする課題) 本発明は上述したような、従来の問題を解決すべくなさ
れたもので、超電導体電極間に半導体との近接効果を介
して流れる超電導電流の大きさを変調するのに、従来の
ような電界効果の原理を利用せずに、近接配置された超
電導体から滲み出した波動関数の重なりをより効果的に
制御する方式を具備した超電導素子を提供することを目
的とする。
(Problems to be Solved by the Invention) The present invention has been made to solve the conventional problems as described above, and modulates the magnitude of superconducting current flowing between superconducting electrodes via the proximity effect with the semiconductor. However, the present invention aims to provide a superconducting element equipped with a method for more effectively controlling the overlap of wave functions exuded from superconductors disposed in close proximity, without using the conventional principle of electric field effect. purpose.

[発明の構成〕 (課題を解決するための手段) 本発明の超電導素子は、第】の超電導体と、この第1の
超電導体と接合を形成する半導体と、前記第1の超電導
体と近接し、た位置で前記半導体と接合を形成する第2
の超電導体とを有し、@記事導体には電子または正孔を
注入する制御端子が形成され、該$−IJ r8端子に
より前記半導体の中のキャリア濃度を変調することによ
り前記第1および第2の超電導体間の超電導電流を制御
するよう構成したことを特徴としている。
[Structure of the Invention] (Means for Solving the Problems) A superconducting element of the present invention includes a superconductor, a semiconductor forming a junction with the first superconductor, and a semiconductor adjacent to the first superconductor. and a second bond forming a junction with the semiconductor at a position
A control terminal for injecting electrons or holes is formed in the @article conductor, and the carrier concentration in the semiconductor is modulated by the $-IJ r8 terminal to The present invention is characterized in that it is configured to control superconducting current between two superconductors.

本発明の第1および第2の超電導体は、所iJの動作温
度において超電導体状態となるものであれば格別限定さ
れるものではなく 、Nb、 Pbのような金属超電導
体、Nb3Sn4、Nb3Ga4等の化合物超電導体、
Ln−Ba−Cu−0系(Lnは希土類元素’) 、B
1−8r−Ca−Cu−0系等の酸化物超電導体等の公
知の全ての超電導体を使用することができる。
The first and second superconductors of the present invention are not particularly limited as long as they are in a superconducting state at a given operating temperature of iJ, and metal superconductors such as Nb and Pb, Nb3Sn4, Nb3Ga4, etc. compound superconductor,
Ln-Ba-Cu-0 system (Ln is a rare earth element'), B
All known superconductors can be used, such as oxide superconductors such as 1-8r-Ca-Cu-0 series.

また、本発明に使用される半導体は、第1および第2の
超電導体と直接または他の導電層を介して良好な電気的
接触を示すも−のであれば、どのようなものであっても
よいが、近接効果を有効に働かすためには移動度の大き
い材料が望ましい。またキャリア注入を低い動作電圧で
実現するために、バンドギャップの小さい材料の方が好
ましい。なお、超電導体間に介在させる半導体は、その
不純物濃度が一定である必要はない。たとえば超電導体
電極に近接する部分においては、電気的接触を改善する
ために高濃度の不純物を含有し、離れた部分においては
比較的低濃度の不純物を含有するように設定することも
できる。
Further, the semiconductor used in the present invention may be any semiconductor as long as it shows good electrical contact with the first and second superconductors directly or through another conductive layer. However, in order to effectively utilize the proximity effect, a material with high mobility is desirable. Further, in order to realize carrier injection at a low operating voltage, a material with a small band gap is preferable. Note that the impurity concentration of the semiconductor interposed between the superconductors does not need to be constant. For example, a portion close to the superconductor electrode may contain a high concentration of impurity to improve electrical contact, and a portion away from the superconductor electrode may contain a relatively low concentration of impurity.

本発明の超電導素子においては、半導体中へのキャリヤ
注入のための電圧印加は、半導体層の一部に形成された
高濃度不純物領域と二つの超電導体間の半導体層の不純
物含有量の違いによるわずかなビルトイン電圧程度とす
ることができるため、電界効果を用いる場合に比べて著
しく小さい値とすることができる。
In the superconducting element of the present invention, the voltage application for carrier injection into the semiconductor is based on the high concentration impurity region formed in a part of the semiconductor layer and the difference in the impurity content of the semiconductor layer between the two superconductors. Since the built-in voltage can be set to a small value, it can be set to a significantly smaller value than when using an electric field effect.

(作用) 一般に超電導体と半導体との接合を形成すると、超電導
状態の波動関数が超電導体から半導体へ滲み出すことに
より、超電導体に近接した領域の半導体自体が超電導特
性を示すようになる。
(Function) Generally, when a junction is formed between a superconductor and a semiconductor, the wave function of the superconducting state oozes out from the superconductor to the semiconductor, so that the semiconductor itself in a region close to the superconductor begins to exhibit superconducting characteristics.

この現象は、いわゆる近接効果と呼ばれるものであり、
超電導状態を示す半導体領域の大きさは、半導体中のキ
ャリア濃度および移動度の関数となる。したがって、二
つの超電導体電極を半導体層を介して配置し、半導体相
中のキャリヤ濃度を変調するようにすれば、二つの超電
導体電極より滲み出した波動関数が重なって超電導電流
の流れる状態と、波動関数の重なりが解は超電導体電流
の流れ得ない状態との17i1をスイッチさせる3端子
素子を実現することができる。
This phenomenon is called the proximity effect,
The size of a semiconductor region exhibiting a superconducting state is a function of carrier concentration and mobility in the semiconductor. Therefore, if two superconductor electrodes are arranged with a semiconductor layer in between and the carrier concentration in the semiconductor phase is modulated, the wave functions seeping out from the two superconductor electrodes will overlap, creating a state in which superconducting current flows. , the overlap of the wave functions can realize a three-terminal element that switches 17i1 to a state in which no superconductor current can flow.

本発明は、この半導体層中のキャリア濃度変調を制御電
極からのキャリア注入で実現させるように構成されてい
る。
The present invention is configured to realize carrier concentration modulation in the semiconductor layer by carrier injection from a control electrode.

すなわち、第1および第2の超電導体の接合された領域
を含む半導体層の少なくとも一部に高濃度の不純物を含
有する領域を形成し、この領域上に制御電極を設け、こ
の制御電極に電圧を印加して、拡散によりキャリアを二
つの超電導体の間の半導体領域に注入するようにしたも
のである。キャリアの注入に必要な印加電圧は、制御電
極を形成した領域の不純物濃度と超電導体間の半導体領
域の含有する不純物濃度の差に起因するビルトイン電圧
程度であるため十分少さい値とすることが可能である。
That is, a region containing a high concentration of impurities is formed in at least a part of the semiconductor layer including the region where the first and second superconductors are joined, a control electrode is provided on this region, and a voltage is applied to the control electrode. is applied to inject carriers into the semiconductor region between the two superconductors by diffusion. The applied voltage necessary for carrier injection can be set to a sufficiently small value because it is about the built-in voltage caused by the difference between the impurity concentration in the region where the control electrode is formed and the impurity concentration contained in the semiconductor region between the superconductors. It is possible.

そして本発明によれば、後の実施例で示すように、従来
の電界効果の原理を用いては実現しえなかった縦型積層
素子を得ることができる。
According to the present invention, as will be shown in later examples, it is possible to obtain a vertical multilayer element that could not be realized using the conventional principle of field effect.

一般に、近接効果の生じ得る半導体領域の大きさは0.
1μmμm以下色狭いため主電極を同一平面上に形成す
る横型素子の場合には著しい微細加工が必要であるが、
このように縦型構成とすることにより極微細加工を回避
することができる。
Generally, the size of the semiconductor region where the proximity effect can occur is 0.
In the case of horizontal elements in which the main electrodes are formed on the same plane, significant microfabrication is required because the color is narrower than 1 μm μm.
With this vertical configuration, ultra-fine processing can be avoided.

また、横型素子とした場合であっても制御電極を同一面
上に形成することができるので制御電極部分の半導体を
薄くする必要がなく加工が容易であるという利点がある
Further, even in the case of a horizontal element, since the control electrode can be formed on the same surface, there is no need to make the semiconductor in the control electrode portion thinner, and there is an advantage that processing is easy.

(実施例) 以下本発明の実施例を図面を参照して説明する。(Example) Embodiments of the present invention will be described below with reference to the drawings.

第1図は、本発明の一実施例の縦型超電導体3端子素子
の拡大断面図である。
FIG. 1 is an enlarged sectional view of a vertical superconductor three-terminal element according to an embodiment of the present invention.

第1図の実施例においては、絶縁基板11上の一部の領
域上に第1の超電導体主電極12が形成され、この超電
導体主電極12上の一部に電気絶縁層13が形成されて
いる。また絶縁基板11から超電導体主電極12、電気
絶縁層13上にかけて半導体層14が形成され、この半
導体層14の電気絶縁層13上に位置する部分には燐に
よる「n+」拡散が行なわれている。なお、この半導体
層13の厚さは超電導による近接効果が得られる範囲内
の厚さとされている。さらに半導体層14の、基板11
から第1の超電導体主電極12上にかけて形成された部
分の上に、第2の超電導体主電極15が形成されている
In the embodiment shown in FIG. 1, a first superconductor main electrode 12 is formed on a part of an area on an insulating substrate 11, and an electrical insulating layer 13 is formed on a part of this superconductor main electrode 12. ing. Further, a semiconductor layer 14 is formed from the insulating substrate 11 to the superconductor main electrode 12 and the electrically insulating layer 13, and "n+" is diffused by phosphorus into the portion of the semiconductor layer 14 located on the electrically insulating layer 13. There is. Note that the thickness of this semiconductor layer 13 is within a range where the proximity effect due to superconductivity can be obtained. Furthermore, the substrate 11 of the semiconductor layer 14
A second superconductor main electrode 15 is formed on a portion formed from the first superconductor main electrode 12 to the first superconductor main electrode 12 .

そして、第1および第2の超電導体主電極12.15、
半導体層14の一部に形成された高濃度不純物含有領域
14aには、それぞれ電極端子が設けられている。
and first and second superconductor main electrodes 12.15,
Each of the high concentration impurity containing regions 14a formed in a part of the semiconductor layer 14 is provided with an electrode terminal.

この素子においては、第1の主電極12と半導体層2の
一部に形成された高濃度不純物含有領域14a間に電圧
を印加し、第1、第2の超電導体主電極12.15に挟
まれた半導体領域にキャリアを注入することにより、第
1および第2の主電極12.15間を流れる超電導体電
流を制御することができる。
In this element, a voltage is applied between the first main electrode 12 and a high concentration impurity containing region 14a formed in a part of the semiconductor layer 2, and the region is sandwiched between the first and second superconductor main electrodes 12.15. By injecting carriers into the semiconductor region, the superconductor current flowing between the first and second main electrodes 12.15 can be controlled.

このような構造の素子を実際に作成するには、積層構造
をエピタキシアル的に形成することが望ましい。このた
めには、材料的には、例えば絶縁基板11としてはA2
□03単結晶、第1、第2の超電導体主電極12.15
としてNb、半導体層14としてGe等の組合せが適し
ている。
In order to actually create an element with such a structure, it is desirable to form a laminated structure epitaxially. For this purpose, in terms of material, for example, A2
□03 Single crystal, first and second superconductor main electrodes 12.15
A combination of Nb as the material and Ge as the semiconductor layer 14 is suitable.

第2図は、第1図に示した実施例の第1、第2の超電導
体主電極12.15間の電流−電圧特性を制御電極電圧
vGをパラメータとして示したものである。
FIG. 2 shows the current-voltage characteristics between the first and second superconductor main electrodes 12, 15 of the embodiment shown in FIG. 1 using the control electrode voltage vG as a parameter.

このグラフから制御電極電圧を変えることにより主電極
電流が制御されることがわかる。
It can be seen from this graph that the main electrode current is controlled by changing the control electrode voltage.

第3図は、本発明の他の実施例の超電導体トランジスタ
を概略的に示したもので、主電極を半導体基板表面に形
成した横型素子の場合を示している。この実施例におい
ては、超電導体からなる二つの主電極21.22を半導
体基板23の一つの面上に、0.1μm程度離して形成
されており、キャリア注入を行なう制御電極24は二つ
の主電極に近接して配置された高濃度不純物含有領域2
3a上に形成されている。この実施例によれば主電極2
1.22形成に極微細加工が必要であるが、主電極と注
入電極を同一面上に形成することができ、また半導体材
料と超電導体材料の選択も第1の実施例よりも自由に行
なうことができる利点がある。
FIG. 3 schematically shows a superconductor transistor according to another embodiment of the present invention, and shows the case of a horizontal element in which the main electrode is formed on the surface of a semiconductor substrate. In this embodiment, two main electrodes 21 and 22 made of a superconductor are formed on one surface of a semiconductor substrate 23 with a distance of about 0.1 μm, and a control electrode 24 for carrier injection is formed between the two main electrodes 21 and 22. High concentration impurity containing region 2 located close to the electrode
3a. According to this embodiment, the main electrode 2
1.22 Although ultrafine processing is required for formation, the main electrode and the injection electrode can be formed on the same surface, and the selection of the semiconductor material and superconductor material can be made more freely than in the first embodiment. There is an advantage that it can be done.

[発明の効果] 以上述べたように、本発明によれば、超電導素子におけ
る近接効果の変調にキャリア注入を用いるという新しい
概念を利用することにより、従来実現しえなかった縦型
櫃層素子を得ることができ、また横型素子の場合であっ
ても制御電極を同一面上に形成することができるので制
御電極部分の半導体を薄くする必要がなく加工が容易で
あるという利点がある。
[Effects of the Invention] As described above, according to the present invention, by utilizing the new concept of using carrier injection to modulate the proximity effect in a superconducting device, it is possible to create a vertical box layer device that could not be realized in the past. Furthermore, even in the case of a horizontal element, the control electrodes can be formed on the same surface, so there is no need to make the semiconductor in the control electrode portion thinner, and there is an advantage that processing is easy.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例の縦型構成の超電導3端子素
子を示す断面図、第2図はその電流−電圧特性を示す図
、第3図は他の実施例の横型構成の超電導体3端子素子
を示す斜視図、第4図は従来の電界効果型トランジスタ
を示す図である。 11・・・・・・・・・絶縁基板 12・・・・・・・・・第1の超電導体主電極13・・
・・・・・・・電気絶縁層 14・・・・・・・・・半導体層 15・・・・・・・・・第2の超電導体主電極21.2
2・・・主電極 23・・・・・・・・・半導体基板 24・・・・・・・・・制御電極
FIG. 1 is a cross-sectional view showing a superconducting three-terminal element with a vertical configuration according to an embodiment of the present invention, FIG. 2 is a diagram showing its current-voltage characteristics, and FIG. FIG. 4 is a perspective view showing a three-terminal device, and FIG. 4 is a diagram showing a conventional field effect transistor. 11...Insulating substrate 12...First superconductor main electrode 13...
..... Electrical insulating layer 14 ..... Semiconductor layer 15 ..... Second superconductor main electrode 21.2
2... Main electrode 23... Semiconductor substrate 24... Control electrode

Claims (1)

【特許請求の範囲】[Claims] (1)第1の超電導体と、この第1の超電導体と接合を
形成する半導体と、前記第1の超電導体と近接した位置
で前記半導体と接合を形成する第2の超電導体とを有し
、前記半導体には電子または正孔を注入する制御端子が
形成され、該制御端子により前記半導体の中のキャリア
濃度を変調することにより前記第1および第2の超電導
体間の超電導電流を制御するよう構成したことを特徴と
する超電導素子。
(1) A first superconductor, a semiconductor forming a junction with the first superconductor, and a second superconductor forming a junction with the semiconductor at a position close to the first superconductor. A control terminal for injecting electrons or holes is formed in the semiconductor, and the control terminal controls a superconducting current between the first and second superconductors by modulating the carrier concentration in the semiconductor. A superconducting element characterized by being configured to.
JP63246811A 1988-09-30 1988-09-30 Superconducting device Pending JPH0294678A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63246811A JPH0294678A (en) 1988-09-30 1988-09-30 Superconducting device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63246811A JPH0294678A (en) 1988-09-30 1988-09-30 Superconducting device

Publications (1)

Publication Number Publication Date
JPH0294678A true JPH0294678A (en) 1990-04-05

Family

ID=17154039

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63246811A Pending JPH0294678A (en) 1988-09-30 1988-09-30 Superconducting device

Country Status (1)

Country Link
JP (1) JPH0294678A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5274249A (en) * 1991-12-20 1993-12-28 University Of Maryland Superconducting field effect devices with thin channel layer
US5304538A (en) * 1992-03-11 1994-04-19 The United States Of America As Repeated By The Administrator Of The National Aeronautics And Space Administration Epitaxial heterojunctions of oxide semiconductors and metals on high temperature superconductors
WO2012042877A1 (en) 2010-09-28 2012-04-05 Unicharm Corporation Continuous packing product of absorbent articles, exterior sheets, and method of manufacturing continuous packing product of absorbent articles

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61242082A (en) * 1985-04-19 1986-10-28 Nippon Telegr & Teleph Corp <Ntt> Semiconductor element
JPS63250879A (en) * 1987-04-08 1988-10-18 Hitachi Ltd superconducting element

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61242082A (en) * 1985-04-19 1986-10-28 Nippon Telegr & Teleph Corp <Ntt> Semiconductor element
JPS63250879A (en) * 1987-04-08 1988-10-18 Hitachi Ltd superconducting element

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5274249A (en) * 1991-12-20 1993-12-28 University Of Maryland Superconducting field effect devices with thin channel layer
US5304538A (en) * 1992-03-11 1994-04-19 The United States Of America As Repeated By The Administrator Of The National Aeronautics And Space Administration Epitaxial heterojunctions of oxide semiconductors and metals on high temperature superconductors
WO2012042877A1 (en) 2010-09-28 2012-04-05 Unicharm Corporation Continuous packing product of absorbent articles, exterior sheets, and method of manufacturing continuous packing product of absorbent articles

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