JPH02153570A - semiconductor element - Google Patents

Abstract

PURPOSE:To make an effective area which functions as an element as large as possible by a method wherein a wiring lead-out electrode is formed on a junction terminal region located at a peripheral part of a planar type element. CONSTITUTION:A gate electrode wiring lead-out electrode 19 insulated from a source electrode 11 through the intermediary of an insulating film 30 is provided in a junction terminal region of an insulating film 13, a high resistive film 14, an insulating film 15, and others located at the peripheral part of a conduction modulation type MOSFET or the like of a planar element, and potential of the electrode 19 is shielded by the high resistive film 14. By this setup, the potential of the electrode 19 has no effect on the electric field of the junction terminal region. A cathode electrode lead-out electrode 32 of a source electrode is similar to the electrode 19, whereby a semiconductor element of this design can be made as large as possible in effective area which functions as an element and consequently improved in current drive performance.

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Field of Application) The present invention relates to a semiconductor device, and particularly to a planar semiconductor device with an increased effective operating area.

(Prior Art) In order to draw out wiring from the electrodes of a semiconductor element, an electrode part for drawing out the wiring is required to have a large area on the surface of the element.

If you try to obtain a high withstand voltage with a planar type element, the width of the junction termination region will increase.From two points of 0 or more, especially in a high withstand voltage planar type element, the area that operates as an element becomes small, so the current drive of the element There is a problem that the ability decreases.

Hereinafter, a conduction modulation type MO5FET and a turn-off thyristor with an insulated gate will be described as examples of high voltage planar elements. Figure 4(a) is a conductive modulation type MO5F
FIG. 4(b), FIG. 4(C), and FIG. 4(d) are plan views showing the element structure of ET, and FIG. 4(b), FIG. 4(C), and FIG. 0 showing B' cross section, c-c' cross section
In the figure, 2 is a p-type drain layer, 3 is an n-type base layer, 4 is an n-type base layer, 5 is a p-type base layer, 6 is a p-type layer, and 7 is an n-type source layer.

A source electrode 11 is commonly connected to the n-type source layer 7 and the p-type layer 6.
However, the drain electrodes 1 are ohmically attached to the p-type drain layer 2, respectively. 16 is an insulating film.

Further, a polycrystalline silicon gate 17 is formed on the surface of the p-type base layer 5 sandwiched between the n-type source layer 7 and the n-type base layer 4 with a gate insulating film 18 interposed therebetween. It constitutes the element part of MOSFET.

Since this conductivity modulation type MOSFET basically has a thyristor structure, it is possible to increase the current driving capability even though it is a high voltage withstanding element. In this example, a high resistance field plate structure is employed as a junction termination structure to obtain a high withstand voltage. 8 is a P-type layer, 9 is a p-type layer, and 10 is an n-type layer.
It is a ten-shaped layer. An electrode 12 is attached to the n÷ type layer 10. Reference numerals 13 and 15 indicate an insulating film, and 14 a high resistance film, which constitute a junction termination region.

The gate electrode wiring lead-out electrode part 19 in FIG. 4(a) is ohmically connected to the polycrystalline silicon gate 17, and the source electrode wiring lead-out electrode part 35 is
1 to enable wiring to be drawn out to the outside of the element. However, as shown in Figure (a), the area of the wiring lead-out electrode part and the junction termination area is large, so the area that operates as an element becomes small. The wiring lead-out electrode portion requires 1.5+5 m×0.5+ am, and the width of the junction termination region requires 400 tIIA. When the size of the entire element is 6 m+*6 mm, only 73% of the total area within the element, and 97% of the area excluding the junction termination region, is effectively utilized.

Next, FIG. 5(a) is a plan view of an insulated gate turn-off thyristor, and FIG. 5(b), (c), and (d)
are cross-sections taken along arrows A-A' and B-B' in FIG. 5(a), respectively.
In the same figure (b) showing the cross section, cc' cross section, 21
is a p-type emitter layer, 22 is an n+ type buffer layer, and 23 is an n-type emitter layer.
29 is a p-type base layer, 28 is a P-type base layer, 3
6 is an n0 emitter layer. In the n-type emitter layer 36.

A cathode electrode 24, a control electrode 25, and an anode electrode 20 are ohmically attached to the p-type emitter layer 21, the control electrode 25, and the p-type emitter layer 21, respectively. 15.30 is absolutely #C.

Further, a gate insulating film 18 is formed on the surface of the p-type base layer 29 sandwiched between the n-type base layer 23 and the n+ type emitter layer 36.
A polycrystalline silicon gate 17 is formed through the insulated gate turn-off thyristor.

The junction termination structure is a high-resistance field plate structure similar to the conductivity modulation type MOSFET.

5.27 is a p-type base layer, 6.26 is a p-type layer, 9 is a p-type base layer, and 9 is a p-type base layer.
- type layer, and 10 is an n-type layer. A cathode electrode 24 is attached to the p-type layer 26, and an electrode 12 is attached to the n-type layer 10. 13, 15, and 30 are insulating films, and 14 is a high-resistance film, which constitute a junction termination region.

The electrode part 19 for drawing out the gate electrode wiring in FIG. This allows wiring to be drawn out to the outside of the element. However, in this case, since there are three wiring lead-out electrode parts, the effective area is smaller than in the case of a conductivity modulation type MOSFET.

For example, in the case of a turn-off thyristor with a 2500 V withstand voltage insulated gate, the electrode parts for wiring the gate electrode, control electrode, and cathode electrode are each 1.5 mm x 0.5 m.
m, and the junction termination region width requires 600-. When the size of the entire element is 6+a+m×6 mm, the utilization rate for the entire area within the element is 58%, and the utilization rate for the area excluding the junction termination region is reduced to 90%.

(Problems to be Solved by the Invention) As described above, in the planar type element, the effective use area of the element is reduced due to the presence of the junction termination region and the wiring lead-out electrode portion, and thus the current driving capability is also reduced.

The present invention has been made in consideration of the above circumstances.

The purpose is to provide a semiconductor device in which the electrodes that can be placed in the outer region of the device are placed as much as possible on the junction termination region, and the effective area that operates as the device is as wide as possible.

[Structure of the invention]

(Means for solving problem gA) The gist of the present invention is to increase the effective utilization area of the device by:
The purpose of this method is to form part or all of the wiring lead-out electrode part on the high-resistance field plate in the junction termination region of the device periphery with an insulating film interposed therebetween.

(Function) According to the present invention, since the wiring lead-out electrode part is formed on the high-resistance field plate via the insulating film, the potential of the wire lead-out electrode part is shielded by the high-resistance field plate, and the junction termination Does not affect the electric field in the area. Therefore, the wiring lead-out electrode portion can be formed on the junction termination region without reducing the withstand voltage of the element. As a result, the effective use area of the element can be increased, and the current drive capability can be increased.

(Example) Hereinafter, details of the present invention will be explained with reference to illustrated embodiments.

In this embodiment, the first conductivity type is p type, and the second conductivity type is n type.

FIG. 1(a) is a plan view showing the element structure of a conductivity modulation type MOSFET according to the first embodiment of the present invention, and FIG.
), (C), and (d) respectively show cross sections taken along arrows AA', BB', and cc' in FIG. 1(a). 3
0 is an insulating film. Note that parts corresponding to those in FIG. 4 shown as a conventional example are given the same reference numerals, and detailed explanation thereof will be omitted.

In this embodiment, the electrode part 19 for leading out the gate electrode wiring, which was laid in the central part of the element in the element structure shown in FIG. High resistance II in the junction termination region via insulation l115! 1114, and the potential of the wiring lead-out electrode portion is shielded by the high resistance film 14 and does not affect the electric field in the junction termination region.

In addition, in this element structure, the source electrode 11 is also used as a metal field plate at the junction end, so in order to avoid a drop in breakdown voltage, this metal field plate part cannot be omitted, even if it is a part of it. As shown in FIG. 1(c), the intersection point of the lead-out portion to the junction termination region of the field plate portion and the gate electrode has a structure in which the gate electrode 31 is formed on the source electrode 11 via an insulating layer 30. In this embodiment, FIG. 1(d) also shows a case where the source electrode wiring lead-out electrode section 32 is extended onto the junction termination region.

With such a configuration, the effective area of the element can be increased without reducing the withstand voltage.

In this way, as shown in FIG. 1(a), all of the wiring lead-out electrode parts are laid on the junction termination area. The width is 400. , the size of the entire element is 6 mm x 6 mm, and the effective utilization rate for the total area within the element is 75%, and for the area excluding the junction termination area,
The effective utilization rate is almost 100%.

Thus, according to this embodiment, although it is small.

A conduction modulation type MOSFET with large current drive capability can be realized.

As a modification of the first embodiment, FIG. 2 shows a plan view of a conductive modulation type MO5FET which is a second embodiment of the present invention.

The wide part for taking out the gate electrode 31 located at the center of the device in the embodiment shown in FIG. This is done at the end of the gate 17. If the configuration is like this.

An even larger effective utilization rate of area can be obtained than in the first embodiment.

Next, FIG. 3(a) is a plan view showing the element structure of a turn-off thyristor with an insulated gate, which is a third embodiment of the present invention, and FIG. 3(b), (c), and (d) are respectively (
34 is an insulating film, which shows a cross section taken along arrows A-A', B-B', and C-C' in a). Note that parts corresponding to those shown in FIG. 5 as a conventional example are given the same reference numerals, and detailed explanation thereof will be omitted. In this embodiment, after forming the control electrode 25, the cathode electrode 24 and its wiring lead-out electrode part 32 are formed through the insulating film 30, and then the gate electrode wiring lead-out electrode part 32 is formed through the insulating film 34. 19 and an electrode section 33 for drawing out the control electrode wiring.

The wiring lead-out electrode portions of the cathode, gate, and control electrodes are formed on the high-resistance film 14 in the junction termination region via an insulating film, and the shielding effect of the high-resistance film 14 affects the electric field in the junction termination region. It will not affect you.

In addition, in this device structure, the cathode electrode 24 is also used as a metal field plate at the end of the junction, so in order to avoid a drop in breakdown voltage, this metal field plate cannot be omitted, even if it is only a part of it.

Therefore, the intersection of the metal field plate part and the lead-out part to the junction termination area of the gate and control electrode is shown in Figure 3 (
As shown in b) and (c), the control electrode 25° and the gate electrode 3 are placed on the cathode electrode 24 via the insulating film 34, respectively.
1 is formed.

With such a configuration, without reducing the withstand voltage,
The effective area of the element can be increased. As shown in Fig. 3(a), all the wiring lead-out electrode parts of each electrode are laid on the junction termination area, and the voltage is 2500 V, which is the same as in the conventional example.
Taking a turn-off thyristor with a voltage-resistant insulated gate as an example, the width of the junction termination region is 600-1, and the overall size of the element is 6 mm.
x6 mm, the effective utilization rate for the entire area within the element is 64%, and the effective utilization rate for the area excluding the junction termination region is approximately 100%.

Thus, according to this embodiment, although it is small.

It is possible to realize a turn-off thyristor with an insulated gate that has a large current drive capability.

Note that the present invention is not limited to the embodiments described above, and can be implemented with various modifications without departing from the gist thereof.

〔Effect of the invention〕

As described in detail above, according to the present invention, the wiring lead-out electrode part is formed on the high-resistance field plate in the junction termination region via the insulating film, so that the potential of the wire lead-out electrode part is lower than that of the high-resistance field plate. Due to the shielding effect, it is possible to form a wiring lead-out electrode portion on the junction termination region without affecting the electric field in the junction termination region, and therefore without lowering the withstand voltage of the element. As a result, the effective area of the element can be increased, and the current drive capability can be increased.

[BRIEF DESCRIPTION OF THE DRAWINGS] FIG. 1 shows a conduction modulation type MO according to a first embodiment of the present invention.
2 is a plan view showing the schematic structure of a conduction modulation type MOSFET according to the second embodiment, and FIG. 3 is a schematic diagram of a turn-off thyristor with an insulated gate according to the third embodiment. FIG. 4 is an explanatory diagram showing the schematic configuration of a conduction modulation type MO5FET shown as a conventional example, and FIG. 5 is an explanatory diagram showing the schematic configuration of a turn-off thyristor with an insulated gate shown as a conventional example. It is. 1... Drain electrode 2... P-type drain layer 3
...n-type base layer 4...n-type base layer 5
...p type base layer 6...P medium layer 7...n
type source layer 8...P raw type layer 9...p-type layer
10...n green layer 11...source electrode
12... Electrode 13... Insulating film 1
4... High resistance film 15... Insulating film 16.
...Insulating film 17...Polycrystalline silicon gate 18...Gate insulating film 19...Gate electrode wiring lead-out electrode part 20...
Anode electrode 21...p-type emitter layer 22...
・N-type buffer layer 23...n-type base layer 24・
... Cathode electrode 25 ... Control electrode 26 ...
P-type layer 27...p-type base layer 28...
・P green type layer 29...P type base layer 30・
...Insulating film 31...Gate electrode 32...
- Electrode section 33 for drawing out cathode electrode wiring... Electrode section 34 for drawing out control electrode wiring... Insulating film 35... Electrode section 36 for drawing out source electrode wiring...
n-type emitter layer (C) (d) Fig. 1 (b) (b) (a) (b) Fig. (C) <d) Fig. (C) (cl) Fig. (Q) Fig.

Claims (4)

[Claims] (1) A semiconductor which is a planar type element and is characterized in that part or all of the wiring lead-out electrode part is formed on the high-resistance field plate in the junction termination region in the peripheral part of the element via an insulating film. element. (2) The planar type element has a second conductivity type base layer in contact with the first conductivity type emitter layer, and the first conductivity type base layer and the second conductivity type emitter layer are formed on the surface of the second conductivity type base layer. A gate electrode is provided on the surface of the first conductive type base layer sandwiched between the second conductive type emitter layer and the second conductive type base layer through an insulating film, and the first conductive type emitter layer is formed by diffusion. A conductivity modulation type MOSFET in which a first main electrode is provided in the emitter layer and a second main electrode is provided in common in the emitter layer of the second conductivity type and the base layer of the first conductivity type, and the wiring lead-out electrode section is 2. The semiconductor device according to claim 1, wherein the semiconductor device is used for drawing out wiring from one or both of a gate electrode and a second main electrode. (3) The wiring lead-out electrode part of the gate electrode is
3. The semiconductor device according to claim 2, wherein the semiconductor device is extended onto a junction termination region in a peripheral portion of the device via an insulating film formed on the main electrode. (4) The planar type element has a second conductivity type base layer in contact with the first conductivity type emitter layer, and a first conductivity type base layer and a second conductivity type base layer on the surface of the second conductivity type base layer. An emitter layer is formed by diffusion, and the second conductivity type emitter layer and the second
A gate electrode is provided on the surface of the first conductivity type base layer sandwiched between the conductivity type base layer and the first conductivity type emitter layer, a first main electrode is provided on the first conductivity type emitter layer, and a first conductivity type emitter layer is provided with the first conductivity type emitter layer. The second main electrode is a turn-off thyristor with an insulated gate in which a control electrode is formed on a first conductivity type base layer, and the wiring lead-out electrode section is formed between the gate electrode, the control electrode, and the second main electrode. 2. The semiconductor device according to claim 1, wherein the semiconductor device is used for drawing out wiring for any one of these, a combination of these, or all of these.