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JPH0235715A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPH0235715A
JPH0235715A JP18596588A JP18596588A JPH0235715A JP H0235715 A JPH0235715 A JP H0235715A JP 18596588 A JP18596588 A JP 18596588A JP 18596588 A JP18596588 A JP 18596588A JP H0235715 A JPH0235715 A JP H0235715A
Authority
JP
Japan
Prior art keywords
layer
impurity
ion
ion implantation
conductivity type
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18596588A
Other languages
Japanese (ja)
Inventor
Noritomo Shimizu
紀智 清水
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP18596588A priority Critical patent/JPH0235715A/en
Publication of JPH0235715A publication Critical patent/JPH0235715A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To form an impurity layer in the deep part of a substrate without decreasing the threshold value of impurity concentration, and eliminate electric adverse influence caused by secondary defects, by arranging an ion-implated layer of atom whose conductivity type is not determined, at a position shallower than an ion implanted layer of desired impurity, and making said layer reach a damage layer in a substrate and the substrate surface. CONSTITUTION:By ion-implanting impurity of desired conductivity type in a silicon substrate 1, a desired impurity layer 12 is formed. By using implantation energy wherein impurity peak position in an impurity implanted region is shallower than ion implantation peak, and a layer without post-implantation damage does not remain between the ion-implanted layer 12 and an ion implanted layer 14 of atom whose conductivity type is not determined, ion implantation of atom whose conductivity type is not determined, e.g., Si, Ge, N, Ar, etc., is performed, and newly a damage layer 14 is formed by ion implantation. The ion implantation of these atoms is executed until the damage layer caused by ion implantation reaches the substrate surface. Next, heat treatment is applied, and the damage caused by the activation of impurity of desired conductivity type and ion implantation is recovered by solid growth, only from the substrate side.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は半導体基板深部に欠陥の発生を伴なうことな(
、不純物層を形成する半導体装置の製造方法に関するも
のである。
DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention can be applied to a semiconductor substrate without causing defects in the deep part of the semiconductor substrate (
, relates to a method for manufacturing a semiconductor device in which an impurity layer is formed.

従来の技術 従来半導体基板深部へ高エネルギーでイオン注入を行な
う場合、あるしきい値以上の不純物濃度のイオン注入量
では、2次欠陥が発生し、熱処理によっても完全な回復
は困難である。高エネルギーでイオン注入を行なった場
合発生する欠陥としては、例えば〔ニュークリア・イン
スツルメンツ・アンド・メソッド・インフィジックス・
リサーチ(Nucl、 In5t、and Mater
ials Phys、 Res、B21  P438〜
P446(1987)))に記されている。第3図aは
この従来のイオン注入方法による半導体装置の製造方法
を示すものであり、シリコン基板31中に不純物層32
を形成したものである。このようにして不純物層32を
形成した場合、第3図b)に示すごとく不純物層32と
ほぼ同じ位置に注入ダメージを受けた層33ができ、表
面及び基板側にはダメージのない完全結晶層34及び3
5が形成されることが知られている。更に前記基板31
に熱処理を施し注入不純物の活性化及び注入ダメージの
回復を図る。この熱処理過程による基板結晶中の注入ダ
メージは、表面側完全結晶層34及び基板側完全結晶層
35からの固相成長反応により、結晶回復が行なわれる
。その結果、イオン注入によるダメージは不純物相中に
閉じ込められて2次欠陥層36が発生する(第3図c)
)。
BACKGROUND OF THE INVENTION Conventionally, when ions are implanted deep into a semiconductor substrate with high energy, secondary defects occur if the ion implantation amount has an impurity concentration above a certain threshold, and complete recovery is difficult even with heat treatment. Defects that occur when ion implantation is performed at high energy include, for example, [Nuclear Instruments & Methods Inphysics]
Research (Nucl, In5t, and Mater
ials Phys, Res, B21 P438~
P446 (1987))). FIG. 3a shows a method for manufacturing a semiconductor device using this conventional ion implantation method, in which an impurity layer 32 is formed in a silicon substrate 31.
was formed. When the impurity layer 32 is formed in this way, a layer 33 with implantation damage is formed at almost the same position as the impurity layer 32, as shown in FIG. 34 and 3
5 is known to be formed. Furthermore, the substrate 31
Heat treatment is performed to activate the implanted impurities and recover the implantation damage. The implantation damage in the substrate crystal caused by this heat treatment process is recovered by a solid phase growth reaction from the surface side perfect crystal layer 34 and the substrate side perfect crystal layer 35. As a result, damage caused by ion implantation is confined within the impurity phase and a secondary defect layer 36 is generated (Fig. 3c).
).

以上述べたように高エネルギーでイオン注入を行ない半
導体基板深部へ不純物層を形成する場合においては低エ
ネルギーでイオン注入を行なった場合と異なり表面側と
基板側の両面から同相成長がおこるため欠陥が内部に閉
じ込められてしまう。
As mentioned above, when ion implantation is performed at high energy to form an impurity layer deep into the semiconductor substrate, unlike when ion implantation is performed at low energy, in-phase growth occurs from both the surface side and the substrate side, which causes defects. It gets trapped inside.

発明が解決しようとする課題 しかしながら上記のようなイオン注入及び熱処理方法で
はイオン注入後の熱処理による注入ダメージの回復が基
板側及び表面側のダメージのない完全結晶相からの固相
成長によるため、注入ダメージは基板中に閉じ込められ
、低エネルギーでのイオン注入と比較した場合2次欠陥
の回復する不純物濃度のしきい値が下がるという問題を
有していた。また、2次欠陥は所望不純物相の不純物濃
度ピーク位置付近に発生するため、電気的悪影響を及ぼ
すという問題を有していた。
Problems to be Solved by the Invention However, in the ion implantation and heat treatment method described above, recovery from implantation damage caused by heat treatment after ion implantation is due to solid phase growth from a completely crystalline phase without damage on the substrate side and surface side. The problem is that the damage is confined within the substrate, and the threshold of impurity concentration at which secondary defects are recovered is lowered when compared with ion implantation at low energy. Further, since secondary defects occur near the impurity concentration peak position of the desired impurity phase, there is a problem that they have an adverse electrical effect.

本発明はかかる点に鑑み、2次欠陥の回復する不純物濃
度のしきい値の低下を伴なうことなく、高エネルギーで
イオン注入を行ない基板深部に不純物層を形成する半導
体装置を、また、2次欠陥の発生する位置を所望不純物
層より深部にすることにより2次欠陥による電気的悪影
響を排除した所望不純物層を形成する半導体装置を提供
することを目的とする。
In view of this, the present invention provides a semiconductor device in which an impurity layer is formed deep in a substrate by performing ion implantation at high energy without lowering the threshold of impurity concentration at which secondary defects are recovered. It is an object of the present invention to provide a semiconductor device in which a desired impurity layer is formed in which the electrical adverse effects caused by secondary defects are eliminated by making the position where the secondary defects occur deeper than the desired impurity layer.

課題を解決するための手段 本発明は上記問題点を解決するため半導体基板中深部に
所望不純物のイオン注入を行なう工程と前記イオン注入
領域の深さより浅(導電型を決定しない原子のイオン注
入を行なう工程とを行なった後熱処理を行なうものであ
る。
Means for Solving the Problems In order to solve the above-mentioned problems, the present invention includes a step of ion-implanting desired impurities deep into a semiconductor substrate, and a step of ion-implanting atoms that do not determine the conductivity type to a depth shallower than the depth of the ion-implanted region. The heat treatment is performed after the steps are performed.

作   用 本発明は、前記した構成により所望不純物のイオン注入
層より浅い位置に導電型を決定しない原子のイオン注入
層を設けることにより基板中のダメージ層と基板表面ま
で到達させることにより、熱処理による結晶の固層成長
による欠陥回復が基板側からのみ行なわれ欠陥の閉じ込
めがなされないため、2次欠陥発生が生ずる不純物濃度
のしきり値低下を防ぐことが可能となる。
Function The present invention provides an ion-implanted layer of atoms that do not determine the conductivity type at a shallower position than the ion-implanted layer of the desired impurity, and allows the ion-implanted layer of atoms that do not determine the conductivity type to reach the damaged layer in the substrate and the substrate surface. Since defect recovery by solid phase crystal growth is performed only from the substrate side and defects are not confined, it is possible to prevent the impurity concentration from decreasing to a threshold value at which secondary defects occur.

実施例 第1図は本発明の所望不純物層より浅く導電型を決定し
ない原子のイオン注入を行なった場合の一実施例におけ
る半導体装置の製造方法を示す図である。シリコン基板
11に所望導電型不純物のイオン注入を行ない、所望不
純物層12を得る、前記イオン注入直後シリコン基板表
面付近には前記イオン注入によるダメージを受けていな
い完全結晶層13が残されたままである(第1図a))
Embodiment FIG. 1 is a diagram showing a method of manufacturing a semiconductor device according to an embodiment of the present invention in which ions of atoms whose conductivity type is not determined are implanted to a depth shallower than a desired impurity layer. A desired impurity layer 12 is obtained by implanting ions of an impurity of a desired conductivity type into a silicon substrate 11. Immediately after the ion implantation, a perfectly crystalline layer 13 that has not been damaged by the ion implantation remains near the surface of the silicon substrate. (Figure 1a))
.

しかる後、前記イオン注入領域に不純物ピーク位置が前
記イオン注入ピークより浅(なり、かつ注入後ダメージ
のない層が前記イオン注入層12と、導電型を決定しな
い原子のイオン注入層14との間に残らないような注入
エネルギーで導電型を決定しない原子、例えば、S、、
Ge、N、A。
Thereafter, a layer in which the impurity peak position in the ion implantation region is shallower than the ion implantation peak (and is not damaged after implantation) is formed between the ion implantation layer 12 and the ion implantation layer 14 of atoms whose conductivity type is not determined. Atoms whose conductivity type is not determined by the implantation energy such that they do not remain in the
Ge, N, A.

等のイオン注入を行ない新たにイオン注入によるダメー
ジ層14形成する(第1図b))導電型を導電型を決定
しない原子のイオン注入はイオン注入によるダメージ層
が基板表面に達するまで行なう。従がって複数回のイオ
ン注入を行なっても良いことは言うまでもない。次に熱
処理を施し、所望導電型不純物の活性化及びイオン注入
によるダメージを同相成長により基板側からのみ回復さ
せる(第1図c))。
A new damaged layer 14 is formed by ion implantation (FIG. 1b)) Ion implantation of atoms whose conductivity type is not determined is performed until the damaged layer by ion implantation reaches the substrate surface. Therefore, it goes without saying that ion implantation may be performed multiple times. Next, heat treatment is performed to activate impurities of a desired conductivity type and to recover damage caused by ion implantation only from the substrate side through in-phase growth (FIG. 1c)).

第2図は本発明の所望不純物相より深(導電型を決定し
ない原子のイオン注入を行なった場合の一実施例におけ
る半導体装置の製造方法を示す図である。シリコン基板
21に所望導電型不純物のイオン注入を行ない、所望不
純物層22を得る。
FIG. 2 is a diagram illustrating a method for manufacturing a semiconductor device according to an embodiment of the present invention in which ion implantation of atoms that do not determine the conductivity type is performed deeper than the desired impurity phase. A desired impurity layer 22 is obtained by performing ion implantation.

この場合においてもシリコン基板表面付近には前記イオ
ン注入によるダメージを受けていない完全結晶層23が
残されたままである(第2図b))。
Even in this case, the perfect crystal layer 23, which has not been damaged by the ion implantation, remains near the surface of the silicon substrate (FIG. 2b).

さらに前記イオン注入領域に不純物ピーク位置が前記イ
オン注入ピークより深くなりかつ前記イオン注入層22
と導電型を決定しない原子のイオン注入層24と間にイ
オン注入によるダメージのない層が残らないような注入
エネルギーで導電型を決定しない原子のイオン注入を行
ない新たにイオン注入によるダメージ層24を形成する
(第2図b))。導電型を決定しない原子のイオン注入
は熱処理後発生する2次欠陥が所望不純物層内に入らな
いような深さまでダメ−・ジ層が達するように行なう。
Further, the impurity peak position in the ion implantation region becomes deeper than the ion implantation peak, and the ion implantation layer 22
The ion implantation layer 24 of atoms that do not determine the conductivity type is ion-implanted with an implantation energy such that no layer without damage due to ion implantation remains between the ion implantation layer 24 of atoms that do not determine the conductivity type, and a new damaged layer 24 due to ion implantation is performed. (Fig. 2b)). Ion implantation of atoms that do not determine the conductivity type is performed so that the damage layer reaches a depth that prevents secondary defects generated after heat treatment from entering the desired impurity layer.

この場合、所望不純物の注入と、導電型を決定しない原
子のイオン注入の順序はどちらが先でもかまわない。こ
の場合においても複数回のイオン注入を行なっても良い
ことは言うまでもない。次に熱処理を施し、所望導電型
不純物の活性化及びイオン注入によるダメージを同相成
長による回復させる。熱処理後2次欠陥の発生が認めら
れるが所望不純物層22よりも深い位置に2次欠陥発生
領域25があるためシリコン基板表面に形成された素子
への電気的な悪影響はない(第2図c))。
In this case, it does not matter which order the desired impurity is implanted or the ion implantation of atoms whose conductivity type is not determined can be performed first. It goes without saying that ion implantation may be performed multiple times in this case as well. Next, heat treatment is performed to activate impurities of a desired conductivity type and to recover damage caused by ion implantation by in-phase growth. Although the occurrence of secondary defects is observed after the heat treatment, since the secondary defect generation region 25 is located deeper than the desired impurity layer 22, there is no electrical adverse effect on the elements formed on the silicon substrate surface (Fig. 2c). )).

発明の詳細 な説明したように、本発明によれば基板深部の所望導電
型不純物の導入において半導体基板中への所望導電型不
純物の導入及び導電型を決定しない原子のイオン注入を
行ないイオン注入によるダメージ層基板表面まで到達さ
せ注入後熱処理による固相成長において同相成長を基板
側からの1方向のみの成長とさせるため2次欠陥が発生
する不純物濃度のしきい値の低下防ぐことが、また所望
導電型不純物層より深い位置に導電型を決定し。
As described in detail, according to the present invention, in order to introduce impurities of a desired conductivity type deep into a semiconductor substrate, the introduction of impurities of a desired conductivity type into a semiconductor substrate and the ion implantation of atoms that do not determine the conductivity type are carried out by ion implantation. It is also desirable to prevent a drop in the impurity concentration threshold at which secondary defects occur because the damaged layer reaches the substrate surface and allows in-phase growth to grow only in one direction from the substrate side in solid phase growth by post-implantation heat treatment. The conductivity type is determined deeper than the conductivity type impurity layer.

ない原子のイオン注入を行なうこ七により不純物層より
深い位置へ、2次欠陥発生領域を形成Cることにより基
板表面素子への電気的悪影響のない不純物層を形成する
ことが可能となりその実用的効果は大きい。
By performing ion implantation of non-containing atoms, it is possible to form a secondary defect generation region deeper than the impurity layer, thereby making it possible to form an impurity layer that does not have an electrically harmful effect on the elements on the substrate surface, making it practical. The effect is great.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図、第2図は本発明の半導体装置の製造方法におけ
る実施例の製造工程断面図、第3図は従来の技術による
半導体装置の製造方法の工程断面図である。 11・・・・・・シリコン基板、12・・・・・・不純
物層、13・・・・・・表面側完全結晶層、14・・・
・・・導電型を決定しない原子のイオン注入層、15・
・・・・・固相成長層、16・・・・・・ダメージ層。 代理人の氏名 弁理士 粟野重孝 ほか1名第1図 篤 図 第 図
1 and 2 are cross-sectional views of the manufacturing process of an embodiment of the method of manufacturing a semiconductor device according to the present invention, and FIG. 3 is a cross-sectional view of the manufacturing process of a conventional method of manufacturing a semiconductor device. 11...Silicon substrate, 12...Impurity layer, 13...Surface side perfect crystal layer, 14...
...Ion-implanted layer of atoms that do not determine the conductivity type, 15.
...Solid phase growth layer, 16...Damaged layer. Name of agent: Patent attorney Shigetaka Awano and one other person Figure 1 Atsushizu Figure 1

Claims (2)

【特許請求の範囲】[Claims] (1)半導体基板中深部に所望導電型不純物のイオン注
入を行なう工程と前記イオン注入領域の深さより浅く導
電型を決定しない原子のイオン注入を行なう工程とを含
むことを特徴とする半導体装置の製造方法。
(1) A semiconductor device comprising the steps of ion-implanting impurities of a desired conductivity type deep into a semiconductor substrate, and implanting ions of atoms whose conductivity type is not determined shallower than the depth of the ion-implanted region. Production method.
(2)半導体基板中深部に所望導電型不純物のイオン注
入を行なう工程と前記イオン注入領域の深さより深く導
電型を決定しない原子のイオン注入を行なう工程とを含
むことを特徴とする半導体装置の製造方法。
(2) A semiconductor device characterized by comprising the steps of ion-implanting impurities of a desired conductivity type deep into the semiconductor substrate and implanting ions of atoms whose conductivity type is not determined deeper than the depth of the ion-implanted region. Production method.
JP18596588A 1988-07-26 1988-07-26 Manufacture of semiconductor device Pending JPH0235715A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18596588A JPH0235715A (en) 1988-07-26 1988-07-26 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18596588A JPH0235715A (en) 1988-07-26 1988-07-26 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPH0235715A true JPH0235715A (en) 1990-02-06

Family

ID=16179973

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18596588A Pending JPH0235715A (en) 1988-07-26 1988-07-26 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPH0235715A (en)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5046479A (en) * 1973-08-31 1975-04-25
JPS51142975A (en) * 1975-06-04 1976-12-08 Hitachi Ltd Production method of semiconductor devices
JPS5587429A (en) * 1978-12-26 1980-07-02 Fujitsu Ltd Manufacture of semiconductor device
JPS6084813A (en) * 1983-10-17 1985-05-14 Toshiba Corp Manufacture of semiconductor device
JPS649615A (en) * 1987-07-01 1989-01-12 Fujitsu Ltd Manufacture of semiconductor device

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5046479A (en) * 1973-08-31 1975-04-25
JPS51142975A (en) * 1975-06-04 1976-12-08 Hitachi Ltd Production method of semiconductor devices
JPS5587429A (en) * 1978-12-26 1980-07-02 Fujitsu Ltd Manufacture of semiconductor device
JPS6084813A (en) * 1983-10-17 1985-05-14 Toshiba Corp Manufacture of semiconductor device
JPS649615A (en) * 1987-07-01 1989-01-12 Fujitsu Ltd Manufacture of semiconductor device

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