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JPH02150097A - Manufacture of ceramic multilayer wiring board - Google Patents

Manufacture of ceramic multilayer wiring board

Info

Publication number
JPH02150097A
JPH02150097A JP30461988A JP30461988A JPH02150097A JP H02150097 A JPH02150097 A JP H02150097A JP 30461988 A JP30461988 A JP 30461988A JP 30461988 A JP30461988 A JP 30461988A JP H02150097 A JPH02150097 A JP H02150097A
Authority
JP
Japan
Prior art keywords
circuit
layer
copper
wiring board
nickel
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP30461988A
Other languages
Japanese (ja)
Inventor
Takao Yamada
隆男 山田
Masayoshi Ikeda
正義 池田
Ritsuo Yokoyama
横山 律夫
Yukihisa Hiroyama
幸久 廣山
Yoshinori Oba
大場 義訓
Tsutomu Watabiki
綿引 努
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Resonac Corp
Original Assignee
Hitachi Chemical Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Chemical Co Ltd filed Critical Hitachi Chemical Co Ltd
Priority to JP30461988A priority Critical patent/JPH02150097A/en
Publication of JPH02150097A publication Critical patent/JPH02150097A/en
Pending legal-status Critical Current

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  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

PURPOSE:To easily form a microscopic circuit by plating with nickel-phosphorus and copper the exposed face of an inner conductor layer of alumina ceramic, heat treating it, and then roughing the surface, and further forming a conductor circuit on the surface. CONSTITUTION:An inner conductor layer is formed in alumina ceramic by partly exposing it on the surface by a green method. Then, the exposed face of the layer is successively plated with nickel-phosphorus(Ni-P) and copper(Cu), heat-treated in a weakly reducing atmosphere, the surface of the alumina ceramics is roughed, and a conductor circuit is further formed on the alumina ceramics. The material for forming the layer includes high melting point metal such as tungsten, molybdenum, molybdenum-manganese, etc., and the material for forming the circuit includes, for example, noble metal such as gold, silver, platinum, etc., or base metal such as nickel, copper, etc. The formation of the circuit includes, for example, a plating method, a vacuum depositing method, a sputtering method, etc., and it is desirable to form the circuit by an electroless plating method. The heat treatment is required to be conducted in the weak reducing atmosphere.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明はセラミック多層配線板の製造法に関し。[Detailed description of the invention] (Industrial application field) The present invention relates to a method for manufacturing a ceramic multilayer wiring board.

特に表面層に導体回路を形成したセラミック多層配線板
の製造法に関する。
In particular, the present invention relates to a method of manufacturing a ceramic multilayer wiring board in which a conductor circuit is formed on the surface layer.

(従来の技術) 従来のセラミック多層配線板は、アルミナセラミックス
中にタングステン、モリブデン、モリブデン−マンガン
等の高融点金属粉を主成分とじた内部導体層を形成し、
その内部導体層の一部をスルーホールを介して表面に引
出し、スルーホール上に露出した内部導体層の露出面に
金、銀、白金等の貴金属ペースト、ニッケル、銅等の卑
金属ペーストを用いて印刷法で導体回路を形成し、しか
る後弱還元性雰囲気中で焼成を行なって製造したものが
一般に知られている。
(Prior art) A conventional ceramic multilayer wiring board has an internal conductor layer mainly composed of high melting point metal powder such as tungsten, molybdenum, molybdenum-manganese, etc., formed in alumina ceramics.
A part of the internal conductor layer is brought out to the surface through a through hole, and a noble metal paste such as gold, silver, platinum, etc., or a base metal paste such as nickel, copper, etc. is applied to the exposed surface of the internal conductor layer exposed above the through hole. It is generally known that a conductive circuit is formed by a printing method and then fired in a weakly reducing atmosphere.

(発明が解決しようとする課題) しかしながら上記に示す方法では、微細回路(ファイン
ライン)の形成が非常に困難である。
(Problem to be Solved by the Invention) However, with the method described above, it is very difficult to form a fine circuit (fine line).

さらに貴金属層、卑金属膚等を形成するペースト材料に
は導体回路の接着力を向上させるためガラス成分を含有
させなけれはならない。そのため内部導体層との導通抵
抗が高くなり信頼性に劣るという欠点がある。
Furthermore, the paste material forming the noble metal layer, base metal layer, etc. must contain a glass component in order to improve the adhesive strength of the conductor circuit. Therefore, there is a drawback that the conduction resistance with the internal conductor layer is high and the reliability is poor.

本発明は上記の欠点のないセラミック多層配線板の製造
法を提供することを目的とするものである。
The object of the present invention is to provide a method for manufacturing a ceramic multilayer wiring board that does not have the above-mentioned drawbacks.

(課題を解決するための手段) 本発明はグリーン法により一部を表面に露出させてアル
ミナセラミックス中に内部導体層を形成し、ついで内部
導体層の露出面にニツケル−リン(Ni、  P)及び
銅(Cu )めっきを施し2弱還元性雰囲気中で熱処理
後、アルミナセラミックスの表面を粗化し、さらにアル
ミナセラミックスの表面に導体回路を形成するセラミッ
ク多層配線板の製造法に関する。
(Means for Solving the Problems) The present invention involves forming an internal conductor layer in alumina ceramics by exposing a portion to the surface using the green method, and then coating the exposed surface of the internal conductor layer with nickel-phosphorus (Ni, P). The present invention also relates to a method for manufacturing a ceramic multilayer wiring board, in which the surface of alumina ceramics is roughened after copper (Cu) plating and heat treatment in a slightly reducing atmosphere of 2, and conductor circuits are formed on the surface of the alumina ceramics.

本発明において内部導体層を形成する材料としては、タ
ングステン、モリブデン、モリブデン−マンガン等の高
融点金属粉が用いられ、また導体回路を形成する材料と
しては、金、銀、白金等の貴金属、ニッケル、銅等の卑
金属が用いられる。
In the present invention, high-melting point metal powders such as tungsten, molybdenum, and molybdenum-manganese are used as materials for forming the internal conductor layer, and noble metals such as gold, silver, and platinum, and nickel are used as materials for forming the conductor circuit. , base metals such as copper are used.

導体回路の形成は、めっき法、真空蒸着法、スパッタ法
などの方法があり9本発明では無電解めっき法で導体回
路を形成することが好ましい。
The conductor circuit can be formed by methods such as plating, vacuum evaporation, and sputtering.9 In the present invention, it is preferable to form the conductor circuit by electroless plating.

熱処理は弱還元性雰囲気中で行うことが必要とされ、酸
素雰囲気中で熱処理すると内部導体層が酸化するという
欠点が生じる。
The heat treatment must be performed in a weakly reducing atmosphere, and heat treatment in an oxygen atmosphere has the disadvantage that the internal conductor layer is oxidized.

アルミナセラミックスの表面を粗化する方法については
特に制限はな〈従来公知の方法で行うものとする。
There are no particular restrictions on the method for roughening the surface of the alumina ceramics, and any conventionally known method may be used.

(実施例) 以下本発明の詳細な説明する。(Example) The present invention will be explained in detail below.

実施例1 厚さ0.8 mのアルミナセラミックグリーンシート(
アルミナ純度96重f%)(以下グリーンシートとする
)を2枚、50X50nnuの寸法に切断し、このうち
の1枚に直径0.31[1llIの穴(スルーホール)
を形成し、ついでスルーホール内にタングステンペース
ト(アサヒ化学社製、商品名3TW−1200)を充填
すると共に片側の表面に前述と同じタングステンペース
トをスクリーン印刷法で印刷し乾燥した。乾燥後スルー
ホール内にタングステンペーストを充填したグリーンシ
ート上に前記グリーンシートの表面にタングステンペー
ストを印刷した面を下にして重ねそれを100℃。
Example 1 Alumina ceramic green sheet with a thickness of 0.8 m (
Cut two sheets of alumina (purity 96% by weight) (hereinafter referred to as green sheets) into a size of 50 x 50nnu, and make a hole (through hole) with a diameter of 0.31 [1llI] in one of the sheets.
Then, the through holes were filled with tungsten paste (manufactured by Asahi Chemical Co., Ltd., trade name 3TW-1200), and the same tungsten paste as described above was printed on one surface by screen printing and dried. After drying, the green sheet with the tungsten paste filled in the through holes was placed on top of the green sheet with the tungsten paste printed side down, and heated at 100°C.

6kg/am”の条件で加熱加圧し、その後電気炉で5
0°C/時間の昇温速度で300℃まで大気中で加熱し
、さらに弱還元性(N2)雰囲気中で30℃/時間の昇
温速度で1600℃まで昇温し、1時間保持してグリー
ンシートを焼結させると共にタングステンペーストを焼
結させ一部を表面に露出させてアルミナセラミックス中
に内部導体層を形成したセラミック配線板を得た。
Heat and pressurize under the conditions of 6 kg/am", then heat in an electric furnace for 5
Heated in air to 300°C at a heating rate of 0°C/hour, then further heated to 1600°C at a heating rate of 30°C/hour in a slightly reducing (N2) atmosphere, and held for 1 hour. A ceramic wiring board was obtained by sintering the green sheet and sintering the tungsten paste so that a portion of the green sheet was exposed on the surface to form an internal conductor layer in alumina ceramics.

次に上記で得たセラミック配線板を水酸化ナトリウムを
含有する脱脂浴(日本エレクトロプレイテングエンジニ
ャーズ社製、商品名イードレックスNα12)で脱脂処
理し、ついで活性浴(ワールド・メタル社製、商品名A
T−80)でPd付与を行い、さらに無電解N1−Pめ
つき(日本カニゼン社製、商品名8680)を行い、水
洗、乾燥して厚さ2μmのN1−Pめつき層を形成し、
さらにこのめっき膜上に電解銅めっき(日本プレイテン
グエンジニャース社製、商品名キューレックスEF)を
行い、水洗、乾燥して厚さ3μmの銅めっき層を形成し
た。
Next, the ceramic wiring board obtained above was degreased in a degreasing bath containing sodium hydroxide (manufactured by Nippon Electroplating Engineers Co., Ltd., trade name: Eedrex Nα12), and then in an activated bath (manufactured by World Metal Co., Ltd., Product name A
Pd was added using T-80), and electroless N1-P plating (manufactured by Nippon Kanigen Co., Ltd., trade name 8680) was performed, followed by washing with water and drying to form a 2 μm thick N1-P plating layer.
Further, electrolytic copper plating (trade name: Curex EF, manufactured by Nippon Playteng Engineers Co., Ltd.) was performed on this plating film, followed by washing with water and drying to form a copper plating layer with a thickness of 3 μm.

この後弱還元性雰囲気中で800℃の温度で10分間熱
処理を行った後350℃のアルカリ溶融塩にて10分間
粗化処理した。さらにPd付与としてキャタリスト処理
(日立化成工業社製、商品名H8−101B)及びアク
セレータ処理(日立化成工業社製、商品名ADP−30
1)後、無電解銅めっき(日立化成工業社製、商品名L
−59)を行い、Djl、さ7μmの銅めっき層を形成
した。めっき後感光性レジストフィルム(日立化成工業
社製、商品名フオテイツクPHT−862AF−25)
を銅めっき層の全面に貼付し、さらにその上面に得られ
る導体回路と同形状に透明な部分を形成したネガフィル
ムを貼付し、 80 mJ / Cr1?の条件で露光
を行い、濃度2%の炭酸ソーダ溶液で現像し。
Thereafter, heat treatment was performed at a temperature of 800° C. for 10 minutes in a weakly reducing atmosphere, and then roughening treatment was performed for 10 minutes with an alkali molten salt at 350° C. Further, as Pd addition, catalyst treatment (manufactured by Hitachi Chemical Co., Ltd., trade name H8-101B) and accelerator treatment (manufactured by Hitachi Chemical Co., Ltd., trade name ADP-30)
1) After that, electroless copper plating (manufactured by Hitachi Chemical Co., Ltd., product name L)
-59) to form a copper plating layer with a thickness of 7 μm. Photosensitive resist film after plating (manufactured by Hitachi Chemical Co., Ltd., trade name: Photograph PHT-862AF-25)
was pasted on the entire surface of the copper plating layer, and a negative film with a transparent part formed in the same shape as the conductor circuit to be obtained was pasted on the top surface, and 80 mJ / Cr1? The image was exposed under the following conditions and developed with a 2% sodium carbonate solution.

ついでネガフィルムを取り除き、さらに現像していない
部分、詳しくは露光していない部分の感光性レジストフ
ィルムを除去し、濃度25チの過硫酸アンモニウム溶液
でエツチングして導体回路として不必要な部分の銅めっ
き層を除去した。この後濃度5チの水酸化ナトリウム溶
液で感光性レジストフィルムを剥離し、導体回路を形成
したセラミック多層配線板を得た。
Next, remove the negative film, remove the photosensitive resist film in the undeveloped areas, more specifically, the unexposed areas, and etching with ammonium persulfate solution at a concentration of 25% to remove copper plating in areas unnecessary for conductor circuits. layer removed. Thereafter, the photosensitive resist film was peeled off using a sodium hydroxide solution having a concentration of 5%, to obtain a ceramic multilayer wiring board on which conductor circuits were formed.

実施例2 実施例1で用いたタングステンペーストに代えてモリブ
デン−マンガンペースト(自社配合品)を使用した以外
は実施例1と同様の方法でセラミック配線板を得た。
Example 2 A ceramic wiring board was obtained in the same manner as in Example 1, except that molybdenum-manganese paste (compounded in-house) was used in place of the tungsten paste used in Example 1.

この後実施例1と同様の方法で脱脂処理、Pd付与、N
1−Pめつき、銅めっき及び粗化処理を行った。
After that, in the same manner as in Example 1, degreasing treatment, Pd addition, and N
1-P plating, copper plating and roughening treatment were performed.

次にセンシタイザ−処理(ワールド・メタル社製、商品
名MC−8)を行い、さらにPd付与としてアクチペー
タ処理(ワールド・メタル社製、商品名MC−A)後、
N1−Bめっき(ワールド・メタル社製、商品名二ボロ
ン)行い、厚さ5μmのN1−Bめっき層を形成し、つ
いで450℃の温度で10分間熱処理した。この後実施
例1と同様の方法で感光性レジストフィルムの貼付、ネ
ガフィルムの貼付、露光及び現像を行い、ついでエツチ
ング剤(キザイ社製、商品名セラエツチング剤)でエツ
チングして導体回路として不必要な部分のNi  Bめ
つき層を除去した。以下実施例1と同様の方法でセラミ
ック多層配線板を得た。
Next, a sensitizer treatment (manufactured by World Metal Co., Ltd., trade name MC-8) was performed, and further, after Pd was applied, an activator treatment (manufactured by World Metal Co., Ltd., trade name MC-A) was performed.
N1-B plating (manufactured by World Metal Co., Ltd., trade name: diboron) was performed to form an N1-B plating layer with a thickness of 5 μm, followed by heat treatment at a temperature of 450° C. for 10 minutes. Thereafter, a photosensitive resist film was attached, a negative film was attached, exposed and developed in the same manner as in Example 1, and then etched with an etching agent (manufactured by Kizai Co., Ltd., trade name: Cera etching agent) to form a conductive circuit. The necessary portions of the Ni B plating layer were removed. Thereafter, a ceramic multilayer wiring board was obtained in the same manner as in Example 1.

比較例1 実施例1で得たセラミック配線板の表面に銅ペースト(
デュポン社製、商品名9924Q)をスクリーン印刷法
で印刷した後100℃の温度で10分間乾燥し、ついで
弱還元性雰囲気中で800℃の温度で10分間熱処理し
て導体回路を形成したセラミック多層配線板を得だ。
Comparative Example 1 Copper paste (
Ceramic multilayer manufactured by DuPont, product name 9924Q) was printed using a screen printing method, dried at a temperature of 100°C for 10 minutes, and then heat-treated at a temperature of 800°C for 10 minutes in a slightly reducing atmosphere to form a conductor circuit. Get the wiring board.

導体層との導通抵抗及び外観について観察した。The conduction resistance with the conductor layer and the appearance were observed.

この結果各実施例で得たセラミック多層配線板は。As a result, the ceramic multilayer wiring boards obtained in each example are as follows.

内部導体層の酸化及び4通抵抗に変化は見られず。No change was observed in the oxidation of the internal conductor layer or in the four-way resistance.

導体回路にも異常は認められなかった。これに対し比較
例1で得たセラミック多層配線板は内部導体層が酸化し
、導通抵抗が高くなり、また導体回路には所々にふくれ
が発生した。
No abnormality was observed in the conductor circuit. On the other hand, in the ceramic multilayer wiring board obtained in Comparative Example 1, the internal conductor layer was oxidized, the conduction resistance became high, and blisters occurred in some places in the conductor circuit.

(発明の効果) 本発明によれば微細回路を容易に形成することができ、
内部導体層などが酸化せず、かつ内部導体層との導通抵
抗が高くなるという欠点が生じないため信頼性に優れた
セラミック多層配線板を得ることができる。
(Effects of the Invention) According to the present invention, a fine circuit can be easily formed,
Since the internal conductor layer and the like are not oxidized and the disadvantage of high conduction resistance with the internal conductor layer does not occur, it is possible to obtain a ceramic multilayer wiring board with excellent reliability.

Claims (1)

【特許請求の範囲】[Claims] 1.グリーン法により一部を表面に露出させてアルミナ
セラミックス中に内部導体層を形成し,ついで内部導体
層の露出面にニツケル−リン及び銅めつきを施し,弱還
元性雰囲気中で熱処理後,アルミナセラミックスの表面
を粗化し,さらにアルミナセラミックスの表面に導体回
路を形成することを特徴とするセラミック多層配線板の
製造法。
1. An internal conductor layer is formed in the alumina ceramic by exposing a part to the surface using the green method, then nickel-phosphorus and copper plating is applied to the exposed surface of the internal conductor layer, and after heat treatment in a weakly reducing atmosphere, the alumina ceramic A method for manufacturing a ceramic multilayer wiring board characterized by roughening the surface of the ceramic and further forming a conductor circuit on the surface of the alumina ceramic.
JP30461988A 1988-12-01 1988-12-01 Manufacture of ceramic multilayer wiring board Pending JPH02150097A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP30461988A JPH02150097A (en) 1988-12-01 1988-12-01 Manufacture of ceramic multilayer wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP30461988A JPH02150097A (en) 1988-12-01 1988-12-01 Manufacture of ceramic multilayer wiring board

Publications (1)

Publication Number Publication Date
JPH02150097A true JPH02150097A (en) 1990-06-08

Family

ID=17935202

Family Applications (1)

Application Number Title Priority Date Filing Date
JP30461988A Pending JPH02150097A (en) 1988-12-01 1988-12-01 Manufacture of ceramic multilayer wiring board

Country Status (1)

Country Link
JP (1) JPH02150097A (en)

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