JP7622772B2 - Interposer - Google Patents

Description

This disclosure relates to a wiring board and a method for manufacturing a wiring board.

For example, a manufacturing process for a flexible device includes a step of forming an insulating substrate on a glass substrate, forming wiring on the insulating substrate, and then peeling the insulating substrate from the glass substrate. In the step of peeling the insulating substrate from the glass substrate, the surface of the insulating substrate may become charged with static electricity. Static electricity may cause destruction of elements included in the wiring. Static electricity may also cause changes in the electrical characteristics of the elements.

Patent Document 1 discloses forming a conductive substrate made of polyimide resin mixed with carbon nanotubes on a support substrate, and then forming an insulating substrate on the conductive substrate. This makes electronic devices on the insulating substrate less susceptible to static electricity.

International Publication No. WO 2012/70483

According to the technology described in Patent Document 1, a flexible device is manufactured in which an electronic device is formed on one side of an insulating substrate and a conductive substrate is formed on the opposite side of the insulating substrate. In this flexible device, the conductive substrate is electrically connected to the electronic device.

In response to this, one of the objectives of the embodiments of the present disclosure is to provide a technology that prevents a conductive layer for suppressing the effects of static electricity from affecting electrical connections in a wiring board.

Another objective of the present disclosure is to provide a wiring substrate that includes an intermediate layer that does not interfere with ultraviolet light irradiation when peeling the insulating substrate from the support substrate.

A wiring board according to one embodiment of the present disclosure includes a substrate that transmits ultraviolet light, a light-transmitting layer that is provided on the substrate and transmits the ultraviolet light, a first resin layer that is provided on the light-transmitting layer, and wiring that is provided on the first resin layer.

The wiring board may have a second resin layer provided on the light-transmitting layer, and a light-shielding layer provided on the second resin layer to block the ultraviolet light, and the first resin layer may be provided on the light-shielding layer.

In the above wiring board, the light-shielding layer may be a metal layer.

In the above wiring board, the transmittance of the laminate structure formed by the substrate and the light-transmitting layer may be 35% or more (preferably 60% or more) in a predetermined wavelength band. In this case, the transmittance of the laminate structure formed by the substrate and the light-transmitting layer may be 35% or more (preferably 60% or more) at a wavelength of 308 nm or 355 nm.

In the above wiring board, the first resin layer may include a first surface, a second surface, and a through hole penetrating the first surface and the second surface, and may have an electrode provided in the through hole and electrically connected to the wiring.

In the above wiring board, the first resin layer may include a first surface, a second surface, and a bottomed hole provided on the first surface side, and may have an electrode provided in the bottomed hole and electrically connected to the wiring.

In the above wiring board, the first resin layer may include a polyimide resin.

In the above wiring board, the second resin layer may include a polyimide resin.

In the above wiring board, the substrate may be a glass substrate.

The wiring substrate may further include a thin-film transistor.

The wiring board may further have an electrode electrically connected to the wiring. The electrode may be provided in a through hole provided in the first resin layer between the wiring and the light-transmitting layer. In this case, the metal layer includes a first metal layer and a second metal layer made of a material different from the first metal layer and connected to the electrode, and the electrode and the second metal layer may have the same main metal element.

The wiring board may further have an electrode electrically connected to the wiring. The electrode may be provided in a through hole provided in the first resin layer between the wiring and the light-transmitting layer. In this case, the metal layer may include a first metal layer and a second metal layer made of a material different from the first metal layer and connected to the electrode, and the first metal layer may have a first region in contact with the second metal layer and a second region in contact with the first resin layer.

In the above wiring board, the light-transmitting layer may be a metal oxide layer.

In the above wiring board, the light-transmitting layer may be a conductive layer.

A wiring board according to one embodiment of the present disclosure has a resin layer including a first surface and a second surface opposite the first surface, wiring provided on the first surface, and a conductive material that transmits ultraviolet light is present in at least a partial area of the second surface. In this case, the conductive material may have a transmittance of 60% or more (preferably 80% or more) for the ultraviolet light at a wavelength of 308 nm or 355 nm.

In the above wiring board, the conductive material may be a metal oxide.

A wiring board, which is one embodiment of the present disclosure, includes forming a light-transmitting layer that transmits ultraviolet light on the upper surface of a substrate that transmits the ultraviolet light, and forming a first resin layer on the light-transmitting layer, the first resin layer having wiring on its upper surface or inside.

The method for manufacturing the wiring board may further include forming a second resin layer on the light-transmitting layer and forming a light-shielding layer that blocks the ultraviolet light on the second resin layer, and the first resin layer may be formed on the light-shielding layer.

The method for manufacturing the wiring board may further include, after forming the first resin layer, irradiating the first resin layer with the ultraviolet light from the side opposite the first resin layer across the substrate.

In the above-mentioned method for manufacturing a wiring board, forming the light-shielding layer includes forming a first metal layer and a second metal layer made of a material different from the first metal layer on the second resin layer, and may further include forming a third resin layer having an opening before forming the first resin layer, and forming an electrode that connects to the second metal layer on the inside of the opening by electrolytic plating using the second metal layer as a seed layer.

The method for manufacturing the wiring board may further include removing the third resin layer after forming the electrodes, and removing a portion of the second metal layer while leaving the first metal layer.

1 is a partial cross-sectional side view of a wiring board according to a first embodiment of the present disclosure. 2A to 2C are diagrams illustrating a method for manufacturing a wiring board according to the first embodiment of the present disclosure. 2A to 2C are diagrams illustrating a method for manufacturing a wiring board according to the first embodiment of the present disclosure. 2A to 2C are diagrams illustrating a method for manufacturing a wiring board according to the first embodiment of the present disclosure. 2A to 2C are diagrams illustrating a method for manufacturing a wiring board according to the first embodiment of the present disclosure. 2A to 2C are diagrams illustrating a method for manufacturing a wiring board according to the first embodiment of the present disclosure. 2A to 2C are diagrams illustrating a method for manufacturing a wiring board according to the first embodiment of the present disclosure. 2A to 2C are diagrams illustrating a method for manufacturing a wiring board according to the first embodiment of the present disclosure. FIG. 4 is a partial cross-sectional side view of a wiring board according to a second embodiment of the present disclosure. 11A to 11C are diagrams illustrating a method for manufacturing a wiring board according to a second embodiment of the present disclosure. 11A to 11C are diagrams illustrating a method for manufacturing a wiring board according to a second embodiment of the present disclosure. 11A to 11C are diagrams illustrating a method for manufacturing a wiring board according to a second embodiment of the present disclosure. 11A to 11C are diagrams illustrating a method for manufacturing a wiring board according to a second embodiment of the present disclosure. 11A to 11C are diagrams illustrating a method for manufacturing a wiring board according to a second embodiment of the present disclosure. 11A to 11C are diagrams illustrating a method for manufacturing a wiring board according to a second embodiment of the present disclosure. FIG. 11 is a partial cross-sectional side view of a wiring board according to a third embodiment of the present disclosure. 13A to 13C are diagrams illustrating a method for manufacturing a wiring board according to a third embodiment of the present disclosure. 13A to 13C are diagrams illustrating a method for manufacturing a wiring board according to a third embodiment of the present disclosure. 13A to 13C are diagrams illustrating a method for manufacturing a wiring board according to a third embodiment of the present disclosure. FIG. 11 is a partial cross-sectional side view of a wiring board according to a fourth embodiment of the present disclosure. FIG. 13 is a partial cross-sectional side view of a wiring board according to a fifth embodiment of the present disclosure. 13A to 13C are diagrams illustrating a method for manufacturing a wiring board according to a fifth embodiment of the present disclosure. FIG. 13 is a partial cross-sectional side view of a package substrate in a fifth embodiment of the present disclosure. FIG. 13 is a partial cross-sectional side view of a wiring board according to a sixth embodiment of the present disclosure. 13A to 13C are diagrams illustrating a method for manufacturing a wiring board according to a sixth embodiment of the present disclosure. 13A to 13C are diagrams illustrating a method for manufacturing a wiring board according to a sixth embodiment of the present disclosure. 13A to 13C are diagrams illustrating a method for manufacturing a wiring board according to a sixth embodiment of the present disclosure. 13A to 13C are diagrams illustrating a method for manufacturing a wiring board according to a sixth embodiment of the present disclosure. 13A to 13C are diagrams illustrating a method for manufacturing a wiring board according to a sixth embodiment of the present disclosure. FIG. 13 is a partial cross-sectional side view of a wiring board according to a sixth embodiment of the present disclosure.

Each embodiment of the present disclosure will be described below with reference to the drawings. However, this disclosure can be implemented in various forms without departing from the spirit of the disclosure, and should not be interpreted as being limited to the description of the embodiments exemplified below.

In order to clarify the explanation, the drawings may show the width, thickness, shape, etc. of each part in a schematic manner compared to the actual embodiment, but these are merely examples and do not limit the interpretation of the present disclosure. In the drawings referred to in this embodiment, the same parts or parts having similar functions are given the same or similar symbols (symbols consisting of only the letters A, B, C after the numbers), and repeated explanations may be omitted.

In this specification and claims, when describing a mode in which a structure is placed on top of another structure, the term "on" is used, unless otherwise specified, to include both a case in which another structure is placed directly above (on the top surface of) a structure so as to be in contact with the structure, and a case in which another structure is placed above the structure via yet another structure.

In this specification and claims, the expression that one structure overlaps another structure means that, when viewed from above or below, the structures at least partially overlap. In other words, it means that one of the structures is located above or below the other, and that, when viewed from above or below, the structures at least partially overlap each other.

The following describes an embodiment in which the wiring board disclosed herein is used as an interposer.

[First embodiment]
<Configuration of wiring board>
1 is a partial side cross-sectional view of a wiring board 100 according to a first embodiment of the present disclosure. The wiring board 100 includes a substrate 110, a conductive layer 120, a first resin layer 130, an electrode 140, and a thin film transistor 200.

The substrate 110 supports the conductive layer 120, the first resin layer 130, the electrode 140, and the thin film transistor 200. The substrate 110 is an insulating substrate. The substrate 110 transmits ultraviolet light. The substrate 110 transmits at least ultraviolet light of a predetermined wavelength band (e.g., a wavelength band including a wavelength of 308 nm or a wavelength of 355 nm) in the ultraviolet light region. The substrate 110 is, for example, a glass substrate (also called carrier glass).

In this embodiment, the conductive layer 120 is illustrated as an example of a light-transmitting layer. The conductive layer 120 includes, for example, a metal oxide such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide doped with aluminum (AZO), zinc oxide doped with gallium (GZO), or other conductive material. The film thickness of the conductive layer 120 is, for example, 20 nm or more and 150 nm or less.

The conductive layer 120 is provided on the substrate 110. The conductive layer 120 transmits ultraviolet light. More specifically, the conductive layer 120 transmits ultraviolet light of a predetermined wavelength band (for example, a wavelength band including a wavelength of 308 nm or a wavelength of 355 nm) in the ultraviolet light region. The transmittance of the conductive layer 120 for ultraviolet light of the wavelength band is 60% or more (preferably, 80% or more). If the transmittance of the conductive layer 120 is 60% or more, sufficient energy reaches the first resin layer 130 through the substrate 110 and the conductive layer 120 made of glass, so that peeling failure can be prevented when the first resin layer 130 is peeled off from the conductive layer 120 later. The conductive layer 120 has a transmittance of 60% or more (preferably, 80% or more) for ultraviolet light at least in the direction in which the first resin layer 130 is viewed from the substrate 110 side.

In reality, the ultraviolet light reaches the first resin layer 130 through the substrate 110 and the conductive layer 120, so the transmittance of the laminated structure formed by the substrate 110 and the conductive layer 120 affects the attenuation of the energy of the ultraviolet light. In this embodiment, the transmittance of the laminated structure formed by the substrate 110 and the conductive layer 120 is set to 35% or more (preferably 60% or more), thereby providing sufficient energy to the first resin layer 130. Strictly speaking, the transmittance of the ultraviolet light varies depending on parameters such as the type of glass forming the substrate 110, the type of metal oxide forming the conductive layer 120, and the thicknesses of the substrate 110 and the conductive layer 120. However, in any case, if the ultraviolet light incident from the back side of the substrate 110 reaches the first resin layer 130 with a transmittance of 35% or more (preferably 60% or more), peeling failure when peeling the first resin layer 130 from the conductive layer 120 can be prevented.

For measuring the transmittance of a laminated structure consisting of a glass substrate and a conductive layer (e.g., ITO), for example, Shimadzu Corporation's product "UV-mini-1240" can be used as a measuring device. For example, when using "UV-mini-1240", the mode is set to "photomeric" and the measurement wavelength is set, and then zero adjustment is performed in an air state without setting the substrate. Then, the substrate is set so that the light is irradiated almost perpendicularly to the substrate, and the transmittance is measured. In addition, when measuring the transmittance of a single conductive layer, for example, Hitachi's product "U-4100 spectrophotometer" can be used as a measuring device. For example, when using "U-4100 spectrophotometer", the mode is set to transmittance [% T], and the measurement wavelength is set, and first, a glass substrate without a conductive layer is measured as a reference. Then, a sample with a conductive layer is measured as a measurement sample. The transmittance of the single conductive layer is calculated within the device.

The first resin layer 130 is provided on the upper surface of the conductive layer 120. Here, the first resin layer 130 has insulating properties and flexibility. The first resin layer 130 includes, for example, an organic resin material. The organic resin material is, for example, a polyimide resin. However, the organic resin material may be an acrylic resin, an epoxy resin, a polyethylene terephthalate resin, or other organic resin materials. For example, the first resin layer 130 preferably has an absorptivity of 90% or more for ultraviolet light with a wavelength of 308 nm or 355 nm.

The first resin layer 130 has a first surface 132, a second surface 134, and a through hole 136. The second surface 134 is a surface opposite to the first surface 132. In other words, the first surface 132 and the second surface 134 are in a top-bottom or front-back relationship in the first resin layer 130. In this embodiment, the first surface 132 is the top surface, and the second surface 134 is the bottom surface. The first resin layer 130 is provided on the top surface of the conductive layer 120, so that the second surface 134 is in physical contact with the conductive layer 120.

The through hole 136 is a hole that penetrates the first surface 132 and the second surface 134. The through hole 136 is, for example, cylindrical, but may also be rectangular, triangular, or have another shape.

The electrode 140 is provided in the through hole 136 and electrically connects the first surface 132 and the second surface 134. That is, the electrode 140 is a through electrode. The electrode 140 is formed of, for example, copper (Cu), but may be formed of a metal other than copper. The electrode 140 may be provided in the entire through hole 136, or may be provided only in a portion of the through hole 136 (for example, the side wall portion of the through hole 136).

The thin-film transistor 200 is provided on the upper surface of the first resin layer 130. The thin-film transistor 200 is electrically connected to the electrode 140. In this embodiment, the thin-film transistor 200 is a bottom-gate type transistor. The thin-film transistor 200 includes a gate electrode 210, a first insulating layer 220, a semiconductor layer 230, a second insulating layer 240, a source electrode 250, and a drain electrode 260. The first insulating layer 220 insulates the gate electrode 210 from the semiconductor layer 230. The first insulating layer 220 is, for example, a silicon oxide film, a silicon nitride film, a silicon oxynitride film, or other inorganic insulating film. The semiconductor layer 230 is, for example, an oxide semiconductor layer. The second insulating layer 240 insulates the semiconductor layer 230 from each of the source electrode 250 and the drain electrode 260 and functions as an etching stop layer. The second insulating layer 240 may be formed of the same material as the first insulating layer 220. The source electrode 250 and the drain electrode 260 are electrodes made of, for example, ITO, IZO, or other materials. The source electrode 250 is an example of a wiring that is electrically connected to the electrode 140. The wiring that is electrically connected to the electrode 140 may be the drain electrode 260. The wiring is not limited to a thin film transistor, and may be a wiring that is electrically connected to another element.

The thin-film transistor 200 is not limited to a bottom-gate transistor. The thin-film transistor 200 may be, for example, a top-gate transistor or a multi-gate transistor.

<Method of Manufacturing Wiring Board>
2 to 8 are diagrams illustrating a method for manufacturing the wiring substrate 100. FIG.

First, as shown in FIG. 2, a conductive layer 120 is formed on the upper surface of the substrate 110. The conductive layer 120 is formed, for example, by using a sputtering method or a vapor deposition method.

Next, as shown in FIG. 3, the first resin layer 130 is formed on the upper surface of the conductive layer 120. The first resin layer 130 is formed, for example, by applying a varnish (e.g., a polyamic acid solution) to the upper surface of the conductive layer 120 and baking the varnish.

Next, as shown in FIG. 4, through-holes 136 are formed in the first resin layer 130. The through-holes 136 are formed, for example, by etching the first resin layer 130 from the first surface 132 side using an alkaline solution.

Next, as shown in FIG. 5, an electrode 140 is formed in the through hole 136. The electrode 140 is formed, for example, by electroplating. The electrode 140 may also be formed by a method of forming a conductive member on the side wall of the through hole 136, for example, by using a sputtering method or a vapor deposition method.

Next, the thin-film transistor 200 is formed on the first surface 132 of the first resin layer 130. This completes the manufacturing of the wiring substrate 100 shown in FIG. 1.

Next, as shown in FIG. 6, laser light L is irradiated onto the substrate 110 from the side opposite the first resin layer 130 (i.e., the second surface 134 side) across the substrate 110. The laser light L passes through the substrate 110 and the conductive layer 120 and is absorbed by the first resin layer 130. The energy of the laser light L causes the first resin layer 130 to peel off from the conductive layer 120, producing the wiring substrate 300. The laser light L is laser light that includes ultraviolet light, more specifically, laser light that has energy in a wavelength band that includes a wavelength of 308 nm or 355 nm.

6, for simplicity, the second surface 134 is illustrated as a flat surface, but the second surface 134 may have irregularities. In this case, after the first resin layer 130 is peeled off from the conductive layer 120, the second surface 134 may be molded to be a flat surface. Also, after the first resin layer 130 is peeled off from the conductive layer 120, as shown in FIG. 7, the conductive material 122 contained in the conductive layer 120 may be present in at least a part of the region on the second surface 134 side of the wiring board 300. The conductive material 122 remains on the wiring board 300, for example, due to diffusion when the laser light L is irradiated to the board 110. The mode of attachment of the conductive material 122 shown in FIG. 7 is one example. The conductive material 122 may be attached only to the electrode 140, may be attached only to the first resin layer 130, or may be attached to both the electrode 140 and the first resin layer 130. When the conductive material 122 adheres to the first resin layer 130, the conductive material 122 does not necessarily adhere uniformly to the second surface 134. In other words, the conductive material 122 may adhere to a first region of the second surface 134, and the conductive material 122 may not adhere to a second region of the second surface 134 that is different from the first region. In such a case, the conductive material 122 adhered to the second surface 134 may be removed by, for example, etching. The conductive material 122, like the conductive layer 120, transmits ultraviolet light of a predetermined wavelength band (for example, a wavelength band including a wavelength of 308 nm or a wavelength of 355 nm) in the ultraviolet light range. The transmittance of the conductive material 122 to ultraviolet light of the wavelength band is 60% or more (preferably 80% or more).

Next, as shown in FIG. 8, the wiring substrate 300 is transferred to the substrate 400 to manufacture the interposer 500. The wiring substrate 300 is bonded to the substrate 400 using, for example, a bonding portion 410. The bonding portion 410 is, for example, an anisotropic conductive film (ACF). The substrate 400 is, for example, a glass substrate. The substrate 400 may be a silicon substrate, a substrate made of a flexible material such as an FPC (Flexible Printed Circuits), or another substrate.

The substrate 400 has a through hole 420 formed in advance. The through hole 420 is, for example, cylindrical, but may be rectangular, triangular, or another shape. An electrode 430 is provided in the through hole 420. The electrode 430 covers the side wall of the through hole 420. The thin film transistor 200 and the electrode 430 are electrically connected via the electrode 140.

In the wiring substrate 100 described above, the conductive layer 120 is provided between the first resin layer 130 and the substrate 110. Therefore, even if static electricity is generated in the process of peeling the first resin layer 130 from the substrate 110, the first resin layer 130 is less likely to be charged by static electricity. This prevents the thin-film transistor 200 from being destroyed by static electricity and the occurrence of changes in the electrical characteristics of the thin-film transistor 200. Furthermore, the presence of the conductive layer 120 improves the adhesion of the first resin layer 130 compared to when the first resin layer 130 is formed on the upper surface of the substrate 110.

The conductive layer 120 also transmits ultraviolet light. Therefore, a peeling position is present in the area where the first resin layer 130 is present, and as a result, the first resin layer 130 is peeled off from the conductive layer 120. After this process, a wiring board 300 is manufactured in which the second surface 134 is not covered by the conductive layer 120. Therefore, the conductive layer 120 does not affect the electrical connection in the wiring board 100. Therefore, the wiring board 100 and the wiring board 300 have a configuration suitable for manufacturing the interposer 500.

[Second embodiment]
<Configuration of wiring board>
9 is a partial cross-sectional side view of a wiring board 100A according to a second embodiment of the present disclosure. The wiring board 100A includes a substrate 110, a conductive layer 120, a first resin layer 130A, an electrode 140, a second resin layer 150, a light-shielding layer 160, and a thin-film transistor 200.

The second resin layer 150 is provided on the upper surface of the conductive layer 120. The second resin layer 150 has a smaller thickness than the first resin layer 130A. The thickness of the first resin layer 130A is T. T is, for example, 300 nm or less. The second resin layer 150 is formed, for example, from the same material as the first resin layer 130A.

The light-shielding layer 160 is provided on the upper surface of the second resin layer 150. The light-shielding layer 160 covers, for example, the entire upper surface of the second resin layer 150. The light-shielding layer 160 blocks ultraviolet light of a specific wavelength band in the ultraviolet light region. The light-shielding layer 160 blocks all or part of the ultraviolet light of that wavelength band. The light-shielding layer 160 is, for example, a metal layer containing a light-shielding metal material such as chromium (Cr).

However, the light-shielding layer 160 is not limited to this, and may be a metal layer containing a metal material such as titanium (Ti), tungsten (W), nickel (Ni), copper (Cu), or molybdenum (Mo). These metal materials may be used alone or in combination with other elements. For example, the light-shielding layer 160 may be a metal layer containing a metal material such as titanium nitride (TiN), titanium-tungsten alloy (TiW), Ni alloy, or Mo alloy. Furthermore, a structure in which these metal layers are stacked may be used. For example, the light-shielding layer 160 having a stacked structure may be a structure in which copper and titanium (or copper and titanium nitride) are stacked.

The thickness of the light-shielding layer 160 is preferably 20 nm to 500 nm in order to ensure light-shielding properties against ultraviolet light. For example, when the light-shielding layer 160 is configured as a single layer, it is preferable to make it as thin as possible (for example, 30 nm to 50 nm) within a range that ensures light-shielding properties in order to shorten the time required to later remove the light-shielding layer 160. The light-shielding layer 160 also plays a role in ensuring the flatness of the peeling surface (the surface that appears on the wiring substrate 300A after the second resin layer 150 is removed).

The light-shielding layer 160 is not limited to a metal material, and may include, for example, a resin material colored black.

The first resin layer 130A is provided on the upper surface of the light-shielding layer 160. The through-hole 136 of the first resin layer 130A is a hole that penetrates the first surface 132 and the second surface 134. However, the opening of the through-hole 136 on the second surface 134 side faces the light-shielding layer 160. The electrode 140 is provided in the through-hole 136 of the first resin layer 130A and electrically connects the first surface 132 and the second surface 134. The thin-film transistor 200 is provided on the upper surface of the first resin layer 130A and electrically connects to the electrode 140.

<Method of Manufacturing Wiring Board>
10 to 14 are diagrams illustrating a method for manufacturing the wiring substrate 100A.

2, the conductive layer 120 is formed on the upper surface of the substrate 110, as shown in FIG. 10. The second resin layer 150 may be formed in the same manner as the first resin layer 130, but may also be formed of a different material than the first resin layer 130 or in a different manner than the first resin layer 130.

Next, as shown in FIG. 11, a light-shielding layer 160 is formed on the second resin layer 150. The light-shielding layer 160 is formed by, for example, a sputtering method or a vapor deposition method.

Next, as shown in FIG. 12, a first resin layer 130A is formed on the upper surface of the light-shielding layer 160. The first resin layer 130A may be formed in the same manner as the first resin layer 130. Next, as shown in FIG. 13, a through hole 136 is formed in the first resin layer 130A. Next, as shown in FIG. 14, an electrode 140 is formed in the through hole 136. Next, a thin-film transistor 200 is formed on the first surface 132 of the first resin layer 130 so as to be electrically connected to the electrode 140. This results in the wiring substrate 100A shown in FIG. 9 being manufactured.

15, the substrate 110 is irradiated with laser light L from the opposite side of the substrate 110 to the first resin layer 130A (i.e., the second surface 134 side). The laser light L passes through the substrate 110 and the conductive layer 120 and is absorbed by the second resin layer 150. The energy of the laser light L produces a wiring substrate 300A peeled off from the substrate 110 and the conductive layer 120. Since the light-shielding layer 160 is provided between the first resin layer 130A and the second resin layer 150, the laser light L does not reach (or hardly reaches) the first resin layer 130A. Therefore, the peeling position is present in the region where the second resin layer 150 exists, which is closer to the substrate 110 than the light-shielding layer 160. In other words, the light-shielding layer 160 contributes to preventing the first resin layer 130A from being burned by the laser light L, and therefore can also be called a heat-resistant layer or a barrier layer. As shown in FIG. 15, after the wiring substrate 300A is produced by peeling it off from the substrate 110 and the conductive layer 120, a deposit containing the resin contained in the second resin layer 150 may adhere to at least a portion of the lower surface of the light-shielding layer 160.

Next, the light-shielding layer 160 is removed from the wiring board 300A. For example, the wiring board 100A is etched from the second surface 134 side. This etching exposes the electrodes 140 from the second surface 134 side, and a wiring board having a configuration similar to that of the wiring board 300 described in Figures 6 and 7 is manufactured. Note that even if any deposits originating from the second resin layer 150 are attached to the lower surface of the light-shielding layer 160, they are removed together with the light-shielding layer 160. After that, this wiring board is used to manufacture an interposer 500, for example, as shown in Figure 8.

The wiring board 100A has the same effect as the wiring board 100 of the first embodiment described above. The wiring board 300A is manufactured by peeling it off from the substrate 110 and the conductive layer 120 in the region where the second resin layer 150 exists, which is the region below the light-shielding layer 160. The presence of the second resin layer 150 prevents the electrodes 140 and the conductive layer 120 from contacting each other, making it easier for the wiring board 300A to peel off from the conductive layer 120. In addition, when the light-shielding layer 160 is a metal layer, selectivity with the first resin layer 130A is ensured in the etching for removing the light-shielding layer 160.

[Third embodiment]
<Configuration of wiring board>
16 is a partial cross-sectional side view of the wiring board 100B according to the third embodiment of the present disclosure. The wiring board 100B includes a substrate 110, a conductive layer 120, a first resin layer 130B, an electrode 140B, and a thin-film transistor 200. The first resin layer 130B includes a bottomed hole 138 instead of a through hole 136. The bottomed hole 138 is provided on the first surface 132 side and is a hole having a bottom 1382. The bottom 1382 is located, for example, at a distance L from the upper surface of the conductive layer 120. The electrode 140B is provided in the bottomed hole 138 and electrically connects the first surface 102 and the bottom 1382. The electrode 140B is formed of, for example, copper (Cu), but may be formed of a metal other than copper. The electrode 140B may be provided in the entire bottomed hole 138, or may be provided only in a part (for example, a side wall) of the bottomed hole 138. The thin film transistor 200 is provided on the upper surface of the first resin layer 130B and is electrically connected to the electrode 140B.

<Method of Manufacturing Wiring Board>
17 and 18 are diagrams illustrating a method for manufacturing the wiring substrate 100B.

2 and 3, the conductive layer 120 is formed on the upper surface of the substrate 110, and the first resin layer 130B is formed on the upper surface of the conductive layer 120. Next, as shown in FIG. 17, a bottomed hole 138 is formed in the first resin layer 130B. The method for forming the bottomed hole 138 may be the same as the method for forming the through hole 136. However, the bottom 1382 does not reach the position of the conductive layer 120.

Next, as shown in FIG. 18, an electrode 140B is formed in the bottomed hole 138. The method for forming the electrode 140B may be the same as the method for forming the electrode 140. Next, a thin-film transistor 200 is formed on the first surface 132 of the first resin layer 130B. This completes the wiring substrate 100B shown in FIG. 16.

Next, as shown in FIG. 19, the substrate 110 is irradiated with laser light L from the opposite side (second surface 134 side) of the first resin layer 130B across the substrate 110. The laser light L passes through the substrate 110 and the conductive layer 120 and is absorbed by the first resin layer 130B. The energy of the laser light L produces a wiring substrate 300B that is peeled off from the substrate 110 and the conductive layer 120. Preferably, this peeling process exposes the electrode 140B from the second surface 134 side. However, even if the electrode 140B is covered by the resin contained in the first resin layer 130B and the electrode 140B is not exposed, the electrode 140B may be exposed by etching from the second surface 134 side. In FIG. 19, the second surface 134 is illustrated as a flat surface for simplicity, but the second surface 134 may have irregularities. Also, as described in FIG. 7, a wiring board 300B may be manufactured in which the conductive material contained in the conductive layer 120 is attached to at least a portion of the second surface 134 side of the wiring board 300B. Using this wiring board 300B, an interposer 500 such as that shown in FIG. 8 is manufactured.

According to the wiring board 100B, the same effect as the wiring board 100 of the first embodiment described above is achieved. In addition, a part of the area on the second surface 134 side of the first resin layer 130B is removed by the process of peeling the first resin layer 130B from the conductive layer 120. By setting the distance L from the upper surface of the conductive layer 120 in consideration of the thickness of this removed area, the bottomed hole 138 can be made into a through hole 139 by the peeling process, and the wiring board 300B can be easily applied to an interposer. In addition, since the bottomed hole 138 is formed in the first resin layer 130B, the electrode 140 and the conductive layer 120 do not contact each other, so that the wiring board 300B is easily peeled off from the conductive layer 120.

[Fourth embodiment]
20 is a partial cross-sectional side view of a wiring board 100C according to a fourth embodiment of the present disclosure. The wiring board 100C is substantially equivalent to a combination of the wiring board 100A according to the second embodiment and the wiring board 100B according to the third embodiment. That is, the wiring board 100C includes a substrate 110, a conductive layer 120, a first resin layer 130A, an electrode 140B, a second resin layer 150, a light-shielding layer 160, and a thin-film transistor 200. That is, the wiring board 100C is different from the wiring board 100A according to the second embodiment described above in that the wiring board 100C includes a bottomed hole 138 instead of a through hole 136, and includes an electrode 140B formed in the bottomed hole 138.

The manufacturing method of the wiring board 100C is also equal to a combination of the manufacturing methods of the wiring board 100A of the second embodiment and the wiring board 100B of the third embodiment. That is, first, the conductive layer 120 is formed on the upper surface of the substrate 110. Next, the second resin layer 150 is formed on the upper surface of the conductive layer 120. Next, the light-shielding layer 160 is formed on the second resin layer 150. Next, the first resin layer 130A is formed on the upper surface of the light-shielding layer 160. Next, a bottomed hole 138 is formed in the first resin layer 130A. Next, an electrode 140B is formed in the bottomed hole 138. Next, the thin-film transistor 200 is formed on the first surface 132 of the first resin layer 130A. Then, the substrate 110 is irradiated with laser light L from the opposite side (second surface 134 side) to the first resin layer 130A across the substrate 110. As a result, a wiring substrate from which the substrate 110 and the conductive layer 120 have been peeled off is manufactured.

The wiring board 100C provides the same effects as the wiring board 100A of the second embodiment and the wiring board 100B of the third embodiment described above.

[Fifth embodiment]
<Configuration of wiring board>
In the above first to fourth embodiments, the conductive layer 120 is used as an example of the light-transmitting layer, but the light-transmitting layer that can be used in the present disclosure is not limited to those having electrical conductivity. For example, when the wiring board is equipped with an electronic device (memory, etc.) that is not an electronic device weak against static electricity such as a thin film transistor, or when the wiring board does not include an electronic device and is composed of a wiring layer in which wiring and a resin layer are laminated, electrostatic destruction when peeling off the insulating substrate from the support substrate is not a problem. In this case, the light-transmitting layer may be a light-transmitting material that does not have electrical conductivity, for example, an insulator that transmits laser light including ultraviolet light. Examples of such insulators include metal oxides such as alumina (Al ₂ O ₃ ), tantalum oxide (Ta ₂ O ₅ ), and magnesium oxide (MgO), and inorganic insulators such as silicon oxide (SiO) and silicon nitride (SiN). In addition to insulators, for example, an amorphous semiconductor (IGZO) composed of indium, gallium, zinc, and oxygen may be used. However, when a light-transmitting layer is used for the purpose of this embodiment, it is desirable to select a material that has high adhesion to the first resin layer 130 .

Figure 21 is a partial cross-sectional side view of a wiring board 100D according to a fifth embodiment of the present disclosure. The wiring board 100D has a substrate 110, a light-transmitting layer 120A, a peeling layer 170, and a wiring layer 200A. Note that parts common to the first embodiment may be denoted by the same reference numerals and description thereof may be omitted.

In this embodiment, a light-transmitting layer 120A is provided on the substrate 110. The above-mentioned insulating material can be used as the light-transmitting layer 120A, but in this embodiment, a silicon oxide layer is used as the light-transmitting layer 120A.

The peeling layer 170 is an intermediate layer that serves to bond the light-transmitting layer 120A and the wiring layer 200A, and may be made of a resin material such as polyimide. As described below, in this embodiment, the peeling layer 170 and the wiring layer 200A can be peeled off from the light-transmitting layer 120A by irradiating the back side of the substrate 110 (the side on which the light-transmitting layer 120A is not provided) with laser light.

The wiring layer 200A is a structure including a seed layer 210A, a terminal 220A, wiring 230A, and a resin layer 240A. Although not shown in the figure, the resin layer 240A has a structure in which multiple resin layers are stacked.

The seed layer 210A is disposed on the release layer 170 and is used as a seed layer when forming the wiring 230A by electroplating. The terminal 220A is disposed on the resin layer 240A and functions as a connection terminal for the wiring layer 200A. For example, the terminal 220A can be used as a connection terminal for making an electrical connection with an IC chip. The wiring 230A is a wiring for electrically connecting the land 250A described below and the terminal 220A.

The resin layer 240A can be made of a resin material such as epoxy, polyimide, phenol, or acrylic. In this embodiment, an example is shown in which the peeling layer 170 is disposed between the light-transmitting layer 120A and the wiring layer 200A, but the peeling layer 170 may be omitted and the wiring layer 200A may be disposed directly on the light-transmitting layer 120A. In this case, the resin layer 240A absorbs the laser light and is modified, so that the wiring layer 200A can be peeled off from the light-transmitting layer 120A.

<Method of Manufacturing Wiring Board>
The wiring substrate 100D can be manufactured by forming the wiring layer 200A after forming the light-transmitting layer 120A and the peeling layer 170 on the substrate 110. In this embodiment, since a silicon oxide layer is used as the light-transmitting layer 120A, it can be formed by a vapor phase growth method such as a sputtering method or a plasma CVD method. The peeling layer 170 may be formed by applying a resin material dissolved in a solvent and baking it. The wiring layer 200A may be formed by forming a seed layer 210A, a terminal 220A, a wiring 230A, and a resin layer 240A by a known method.

22, laser light L is applied from the back side of the substrate 110 (the side on which the light-transmitting layer 120A is not provided). The laser light L passes through the substrate 110 and the light-transmitting layer 120A and is absorbed by the peeling layer 170. This causes the interface of the peeling layer 170 closer to the light-transmitting layer 120A to denature, and the wiring layer 200A and the peeling layer 170 can be peeled off from the light-transmitting layer 120A. The peeling layer 170 is then removed to obtain the wiring layer 200A as shown in FIG. 22. The wiring layer 200A can be used as a wiring substrate after the seed layer 210A is removed.

23 is a partial cross-sectional side view of a package substrate 600 in the fifth embodiment of the present disclosure. In FIG. 23, a land 250A is provided on the surface of the wiring layer 200A used as a wiring substrate opposite to the terminal 220A. A circuit substrate 620 is electrically connected to the land 250A via a solder ball 610A. IC chips 630A and 630B are electrically connected to the terminal 220A of the wiring layer 200A via a solder ball 610B. The IC chips 630A and 630B are sealed with a molded resin 640. The package substrate 600 in the fifth embodiment of the present disclosure electrically connects the circuit substrate 610 and the IC chips 630A and 630B using the wiring layer 200A formed on the substrate 110.

In this embodiment, an example is shown in which a silicon oxide layer, which is an insulator, is used as the light-transmitting layer 120A, but the light-transmitting layer 120A is not limited to an insulator. That is, as in the first embodiment, a metal oxide layer such as ITO may be provided as the light-transmitting layer 120A on the substrate 110, and the wiring layer 200A may be provided on top of the metal oxide layer.

Sixth Embodiment
<Configuration of wiring board>
24 is a partial side cross-sectional view of a wiring board 100E according to a sixth embodiment of the present disclosure. The wiring board 100E has a second resin layer 150, a first metal layer 160A, and a second metal layer 160B on a substrate 110 and a conductive layer 120. Note that the same reference numerals may be used to designate parts common to the first embodiment, and descriptions thereof may be omitted.

In the wiring board 100E, the first metal layer 160A is provided over almost the entire surface of the substrate 110. Since the first metal layer 160A has the role of ensuring the flatness of the peeled surface (the surface that finally appears after the second resin layer 150 is removed), it is desirable that the first metal layer 160A is provided at least in the area that will be used as the wiring board 100E after being peeled off from the substrate 110.

The second metal layer 160B is located below the electrode 140. As described below, the second metal layer 160B is used as a seed layer when forming the electrode 140 by electroplating. Therefore, when forming the electrode 140, the second metal layer 160B is provided over almost the entire surface of the substrate 110, but thereafter, the electrodes 140 are physically separated so as not to be electrically connected to each other. Therefore, the above-mentioned first metal layer 160A has a first region in contact with the second metal layer 160B and a second region in contact with the first resin layer 130A (i.e., a region not in contact with the second metal layer 160B).

In the process of manufacturing the wiring substrate 100E, the first metal layer 160A ensures the flatness of the peeled surface and also functions as a light-shielding layer when irradiating the substrate 110 with ultraviolet light. The second metal layer 160B also functions as a seed layer when forming the electrode 140. The first metal layer 160A can be made of a metal material that blocks ultraviolet light of a specific wavelength band in the ultraviolet light range. The second metal layer 160B can be made of any metal material that can be used as a seed layer for the electrode 140, but it is preferable to use a material that contains the same metal element as the material that constitutes the electrode 140 as its main component.

In this embodiment, titanium (Ti) or a titanium alloy is used as the material for the first metal layer 160A, and copper (Cu) or a copper alloy is used as the material for the second metal layer 160B. The electrode 140 is formed of copper by electroplating using the second metal layer 160B as a seed layer. Since copper has poor adhesion to resin materials, it is difficult to directly form a metal layer mainly composed of copper on the second resin layer 150. However, in this embodiment, the problem of adhesion when forming the second metal layer 160B is solved by using a material mainly composed of titanium, which has relatively good adhesion to the second resin layer 150, as the first metal layer 160A.

<Method of Manufacturing Wiring Board>
25 to 29 are diagrams illustrating a method for manufacturing the wiring substrate 100E.

In this embodiment, as shown in FIG. 25, after the second resin layer 150 is formed on the substrate 110 through a process similar to that of the second embodiment, the first metal layer 160A and the second metal layer 160B are formed by a known method. For example, the first metal layer 160A and the second metal layer 160B can be formed successively by a sputtering method.

Next, as shown in FIG. 26, an electrode 140 is formed by electroplating. Specifically, a third resin layer 710 made of, for example, an acrylic resin material is first formed on the second metal layer 160B, and an opening 712 is formed. Then, an electrode 140 that connects to the second metal layer 160B is formed inside the opening 712 by electroplating using the second metal layer 160B as a seed layer.

After the electrode 140 is formed, as shown in FIG. 27, the third resin layer 710 is removed to expose the second metal layer 160B and the electrode 140, and then a portion of the second metal layer 160B is removed in a self-aligned manner using the electrode 140 as a mask. In this embodiment, the electrode 140 and the second metal layer 160B are made of a material mainly composed of the same metal element, so the electrode 140 and the second metal layer 160B are etched simultaneously. Therefore, in this embodiment, the electrode 140 is designed to have the desired final line width, taking into account the line width of the electrode 140 and the film thickness of the second metal layer 160B.

In this embodiment, since the second metal layer 160B is selectively removed while leaving the first metal layer 160A, it is desirable that the etching selectivity between the first metal layer 160A and the second metal layer 160B is large. Of course, if the etching selectivity is small, etching can be performed by time control. In this case, in order to completely remove the second metal layer 160B, etching can be allowed to proceed until it reaches the first metal layer 160A, but the first metal layer 160A needs to have a thickness that does not lose its function as a light-shielding layer. Therefore, when performing etching by time control, it is desirable to determine the film thickness of the first metal layer 160A taking into account the overetching amount.

Next, as shown in FIG. 28, a first resin layer 130A is formed on the first metal layer 160A and the second metal layer 160B. The first resin layer 130A is formed by applying a varnish in which a resin material is dissolved in a solvent, or by laminating a dry film. Therefore, the electrode 140 is embedded in the first resin layer 130A. At this time, if necessary, the upper surface of the electrode 140 may be flattened by a method such as chemical mechanical polishing (CMP). Thereafter, a thin film transistor 200 is formed on the first resin layer 130A, thereby manufacturing the wiring substrate 100E shown in FIG. 24.

After the wiring board 100E is completed, as shown in FIG. 29, laser light L is irradiated from the back side of the substrate 110 (the side on which the conductive layer 120 is not provided). The laser light L passes through the substrate 110 and the conductive layer 120 and is absorbed by the second resin layer 150. This causes the interface of the second resin layer 150 closer to the conductive layer 120 to be denatured, and the entire layer above the second resin layer 150 can be peeled off from the conductive layer 120.

After the peeling operation is completed, the second resin layer 150 and the first metal layer 160A are removed to produce the wiring substrate 700 with the second metal layer 160B exposed on the underside. The wiring substrate 700 is then transferred to the substrate 400 shown in FIG. 8 to produce the interposer 500.

According to this embodiment, the first metal layer 160A, which functions as a light-shielding layer when irradiated with laser light, can also function as an adhesive layer for the second metal layer 160B, which functions as a seed layer. In addition, in the wiring substrate 700, the second metal layer 160B can be used as an adhesive layer when connecting to the electrode 430 in FIG. 8, so that a good connection with the substrate 400 can be ensured when manufacturing the interposer 500.

In this embodiment, an example is shown in which after forming the electrode 140, a portion of the second metal layer 160B used as a seed layer is removed, but the process of removing the second metal layer 160B may be omitted. In other words, the first metal layer 160A and the second metal layer 160B may be left stacked until the thin film transistor 200 is formed, and after peeling off the wiring substrate 700 from the substrate 110, the first metal layer 160A and the second metal layer 160B may be removed.

In the present embodiment, the second metal layer 160B is etched in a self-aligned manner using the electrode 140 as a mask. However, the second metal layer 160B may be etched using a resist mask. In this case, as in the wiring board 100F shown in FIG. 30, the line width of the second metal layer 160C is larger than the line width of the electrode 140. When a resist mask is used, the electrode 140 is not etched, so the film thickness of the second metal layer 160B can be made thick, which is advantageous when used as a seed layer. In addition, the second metal layer 160B can also be used as a land for the electrode 140, so that a good connection with the substrate 400 can be ensured when manufacturing the interposer 500.

The above-described embodiments can be implemented in any suitable combination, provided they are not mutually inconsistent. Furthermore, the configurations, numerical values, and manufacturing methods of each wiring board in the above-described embodiments are merely examples. Furthermore, those in which a person skilled in the art appropriately adds or deletes components or modifies the design based on each embodiment are also included in the scope of this disclosure, so long as they comply with the gist of this disclosure.

The wiring according to the present disclosure is not limited to the source electrode or drain electrode of a thin-film transistor. The wiring according to the present disclosure may be wiring that does not constitute a thin-film transistor, such as a conductor, a via, or other wiring.

The wiring board according to the present disclosure may not have a through hole and an electrode provided in the through hole, or a bottomed hole and an electrode provided in the bottomed hole. That is, the electrical connection of the wiring of the wiring board according to the present disclosure may be realized by a configuration other than these. The wiring board according to the present disclosure may also be a wiring board that does not have a thin film transistor.

Furthermore, even if there are other effects and advantages different from those brought about by the above-mentioned embodiments, if they are clear from the description in this specification or can be easily predicted by a person skilled in the art, they are naturally understood to be brought about by this disclosure.

The wiring board of the present disclosure is used in semiconductor devices mounted on notebook personal computers, tablet terminals, mobile phones, smartphones, digital video cameras, digital cameras, or other electrical devices. In addition to the above electronic devices, the wiring board of the present disclosure can also be widely used in semiconductor devices mounted on LED lighting, digital signage, desktop personal computers, servers, car navigation systems, or other electronic devices.

100, 100A, 100B, 100C, 100D, 100E, 100F, 300, 300A, 300B: Wiring board, 102: First surface , 104: second surface, 110: substrate, 120: conductive layer, 120A: light-transmitting layer, 122: conductive material, 130, 130A, 130B: first resin layer, 132: first surface, 134: second surface, 136, 139: through hole, 138: bottomed hole, 1382: bottom, 140: electrode, 140B: electrode, 150: second resin layer, 160: light shielding layer , 160A: first metal layer, 160B, 160C: second metal layer, 200: thin film transistor, 200 A: wiring layer, 210A: seed layer, 220A: terminal, 230A: wiring, 240A: resin layer, 250A: land, 210: gate electrode, 220: first insulating layer, 230: semiconductor layer, 240: second insulating layer , 250: source electrode, 260: drain electrode, 400: substrate, 410: joint, 420: through hole, 430: electrode, 500: interposer, 600: package substrate, 610A, 610B: solder ball, 620: circuit board, 630A, 630B: IC chip, 640: mold resin, 700: wiring board, 710: third resin layer, 712: opening

Claims (6)

a substrate having a first surface and a second surface opposite to the first surface, and a through hole penetrating the first surface and the second surface;
a first electrode covering a side wall portion of the through hole and extending on the first surface and the second surface;
a first resin layer that is bonded to the first surface via a bonding portion provided on the substrate ;
a second electrode embedded in a through hole provided inside the first resin layer and electrically connected to the first electrode;
having
the second electrode includes a metal layer in contact with the first electrode and a through electrode in contact with the metal layer ,
the metal layer is disposed between the first electrode and the through electrode,
The through electrode contacts an inner wall of the through hole provided inside the first resin layer . The interposer of claim 1, wherein the first resin layer includes a polyimide resin, an acrylic resin, an epoxy resin, or a polyethylene terephthalate resin. The interposer according to claim 1 or 2, wherein the substrate is a glass substrate, a silicon substrate, or a flexible substrate. The interposer according to any one of claims 1 to 3, further comprising a thin film transistor electrically connected to the second electrode. The interposer according to claim 1 , wherein the through electrode and the metal layer have the same main component metal element. The interposer according to any one of claims 1 to 5, wherein the joint is an anisotropic conductive film.

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