JP7416940B2 - Display panels, flexible displays, electronic devices and display panel manufacturing methods - Google Patents

Description

CROSS-REFERENCE TO RELATED APPLICATIONS This application is filed with the State Intellectual Property Office of China on November 29, 2019, which is hereby incorporated by reference in its entirety. It claims priority to Chinese Patent Application No. 201911205774.7 entitled ``Method for Manufacturing Panels''.

TECHNICAL FIELD This application relates to the field of display technology, and in particular to display panels, flexible displays, electronic devices, and methods of manufacturing display panels.

Organic light-emitting diode (OLED) display devices are thin, lightweight, wide viewing angle, active luminescence, continuously adjustable luminescent color, low cost, fast response, low energy consumption, low driving voltage, and wide operating range. It is cited as a promising next-generation display technology due to its characteristics such as temperature range, simple manufacturing process, high luminous efficiency, and flexible display.

OLED light-emitting components in OLED display devices require electron injection from the cathode during operation and therefore require a lower cathode work function. However, the cathode is typically made of a metallic material, such as aluminum, magnesium, or calcium, which has a relatively active chemistry and is susceptible to reacting with invading water vapor and oxygen. Therefore, water vapor, oxygen, etc. in the air greatly affect the lifespan of OLED light emitting components. Additionally, water vapor and oxygen may further react with the hole transport layer and electron transport layer of the OLED light emitting component, causing failure of the OLED light emitting component. Therefore, strict water-oxygen encapsulation needs to be performed on the OLED light emitting component so that each functional layer of the OLED light emitting component is completely isolated from atmospheric water vapor, oxygen, etc. This significantly extends the lifespan of OLED light emitting components and extends the lifespan of OLED display devices.

Currently, display panels of OLED display devices are usually encapsulated by using TFE (thin film encapsulation) technology during manufacturing. Display panels that use TFE for full surface encapsulation are prone to cracking when subjected to pressure or impact. In this case, water vapor and oxygen enter the cathode of the OLED light-emitting component (the cathode material is usually MgAl) and another deposited layer along the crack. As a result, the cathode loses its electrode function, and the luminous efficiency of the light-emitting layer of the OLED light-emitting component gradually decreases until the light-emitting layer can no longer emit light. As a result, dark dots or black spots occur, which affects the display effect of the OLED display device.

The technical solution of the present application provides a display panel, a flexible display, an electronic device, and a display panel manufacturing method to improve the encapsulation characteristics of the display panel.

According to a first aspect, the technical solution of the present application provides a display panel. The display panel includes a substrate used as a substrate, a thin film transistor layer disposed on the substrate, a pixel defining layer, at least two encapsulating structures, and at least two pixel units. The at least two encapsulation structures are configured to encapsulate at least two pixel units. A thin film transistor layer is disposed on the substrate, and a pixel defining layer is disposed on the thin film transistor layer and has a pixel region and a side encapsulation region, the side encapsulation region having a pixel unit encapsulated by the encapsulation structure. The pixel region and the side encapsulation region are through-holes disposed on the pixel-defining layer. The OLED light emitting component of the pixel unit may be partially or completely located within the pixel area.

If the encapsulation structure is specifically arranged, the encapsulation structure includes a first encapsulation layer and a second encapsulation layer. The first encapsulation layer is arranged on a side of the OLED light emitting component closer to the thin film transistor layer, and the first encapsulation layer is further exposed from the side encapsulation region. A second encapsulation layer is disposed on a side of the OLED light emitting component remote from the thin film transistor layer, the second encapsulation layer being in sealing contact with the first encapsulation layer in the side encapsulation region. can penetrate the side encapsulation region. By encapsulating at least two pixel units using at least two encapsulation structures, large encapsulation layers can be prevented from forming on the display panel, thereby including the display panel. The water-oxygen infiltration that occurs when the encapsulation layer cracks in scenarios such as when the flexible display is bent, rolled, and freely deformed can be effectively avoided.

In possible implementations of the present application, the number of encapsulation structures may be the same as the number of pixel units, with each encapsulation structure configured to encapsulate one pixel unit. This implements independent encapsulation of each pixel unit, improving the bending properties of the display panel.

Further, the first encapsulation layer may have a single layer structure made of inorganic material layers, or the first encapsulation layer may have a multilayer structure in which inorganic material layers and organic material layers are alternately laminated. The second encapsulation layer may be a single layer structure formed by an inorganic material layer, but is not limited to this, or the second encapsulation layer may be a monolayer structure formed by an inorganic material layer and an organic material layer. A multilayer structure formed by alternately laminating layers may also be used. The inorganic material layer may be formed by using silicon dioxide, silicon nitride, aluminum oxide, etc. to achieve a relatively good water-oxygen barrier effect.

In possible implementations of the present application, the display panel may further include metal lines, the metal lines may be located on the side of the pixel-defining layer remote from the substrate, or the metal lines may , is arranged on the first encapsulation layer, or the metal line is arranged on the layered structure of the substrate. The cathodes of the OLED light emitting components may be connected to a metal wire such that all OLED light emitting components are associated with each other. This facilitates display control of the entire display panel.

In a possible implementation of the present application, a photospacer is further arranged on the side of the pixel-defining layer remote from the substrate. In the process of forming OLED light-emitting components by vapor deposition, the photo spacer effectively prevents the vapor deposition mask for forming each functional layer of the OLED light-emitting components by vapor deposition from contacting the display panel, and reduces the product yield of the display panel. can be improved.

In possible implementations of the present application, a planarization layer may further be arranged on the side of the second encapsulation layer remote from the thin film transistor layer. A planarization layer may be arranged to provide a flat machining surface for subsequent processing. Further, the planarization layer may cover foreign matter in order to prevent foreign matter from entering other film layers disposed on the planarization layer.

Furthermore, a third encapsulation layer can further be disposed on the planarization layer, the third encapsulation layer being a full surface structure that can cover at least two encapsulation structures. This improves the water-oxygen barrier encapsulation effect of the display panel. The third encapsulation layer may have a single layer structure of inorganic material layers, or may have a multilayer structure in which inorganic material layers and organic material layers are alternately laminated.

According to a second aspect, the technical solution of the present application further provides a flexible display. The flexible display may include a protective cover, a polarizer, a touch panel, and a display panel according to the first aspect. The polarizer is fixed to the protective cover and the touch panel is placed between the polarizer and the display panel, or the touch panel is fixed to the protective cover and the polarizer is placed between the touch panel and the display panel. . Furthermore, a heat dissipation layer may be further disposed on the side of the display panel remote from the touch panel, and a protective layer may be disposed on the heat dissipation layer.

Since at least two pixel units on the display panel of the flexible display are encapsulated by at least two encapsulation structures, a large encapsulation layer can be prevented from being formed on the display panel, thereby: To effectively avoid the water-oxygen infiltration that occurs when the encapsulation layer cracks in scenarios such as the flexible display is bent, rolled, and freely deformed, and avoids the display failure problem of the flexible display.

According to a third aspect, the technical solution of the present application further provides an electronic device. The electronic device includes an intermediate frame, a rear housing, a printed circuit board, and a flexible display according to the second aspect. The intermediate frame is configured to support the printed circuit board and the flexible display. A printed circuit board and a flexible display are placed on two sides of the intermediate frame. The rear housing is located on the side of the printed circuit board remote from the intermediate frame.

The flexible display of the electronic device in this application has relatively good bending properties. In the process where flexible displays are folded or bent, the risk of cracking the encapsulation layer of the display panel of the flexible display is relatively low, thereby reducing the flexibility of the electronic device caused when water and oxygen seep through the encapsulation layer. The problem of display failure is avoided.

According to a fourth aspect, the technical solution of the present application further provides a method of manufacturing a display panel. The display panel includes a substrate, a thin film transistor layer, a pixel defining layer, at least two encapsulating structures, and at least two pixel units. The at least two encapsulation structures are configured to encapsulate at least two pixel units, the encapsulation structures include a first encapsulation layer and a second encapsulation layer, and the pixel units are OLEDs. Contains light emitting components. This method is
manufacturing a substrate;
forming a thin film transistor layer on the substrate and providing a first via on the thin film transistor layer, the first via extending to a drain of the thin film transistor layer;
forming a full-surface first encapsulation structure layer on the thin film transistor layer and patterning the full-surface first encapsulation structure layer to obtain a plurality of independent first encapsulation layers; and,
forming a pixel-defining layer and patterning the pixel-defining layer to form a pixel region and a side encapsulation region on each of the first encapsulation layers, the side encapsulation region being a pixel-defining layer; a step used to expose the encapsulation layer of 1;
forming an OLED light emitting component in the pixel region, the OLED light emitting component being connected to the drain via the first via;
In order to obtain a plurality of independent second encapsulation layers, a second encapsulation structure layer is formed on the side of the OLED light-emitting component remote from the thin film transistor layer over the entire surface corresponding to the thin film transistor layer; patterning a second encapsulation structure layer of the second encapsulation structure layer, wherein the second encapsulation layer and the first encapsulation layer are in sealing contact in side encapsulation regions. .

In possible implementations, the step of forming the first encapsulation layer specifically includes depositing SiO ₂ , SiNx, or Al ₂ on the thin film transistor layer to form an all-surface first encapsulation structure layer. depositing one or more of O ₃ and patterning and coating the first encapsulation structure layer on the entire surface to obtain at least two first encapsulation layers. , including one or more of exposing, developing, etching, or stripping.

In a possible implementation, before the pixel-defining layer is formed, the method includes the step of forming an anode on the first encapsulation layer, the anode being connected to the drain via the first via. further comprising steps. Forming the anode includes, in particular, sequentially depositing ITO, Ag, and ITO on the first encapsulation layer to form an anode material layer; patterning, including one or more of coating, exposing, developing, etching, or stripping.

Additionally, the method may further include forming a photospacer on the pixel-defining layer after the pixel-defining layer is formed and before the OLED light emitting component is formed.

A possible implementation further includes metal lines on the pixel-defining layer such that the cathode of each OLED light-emitting component is connected to the metal line to associate all OLED light-emitting components and control the display of the entire display panel. can be formed. Alternatively, the metal line may be formed on the first encapsulation layer or on the layer structure of the thin film transistor layer. Specifically, the step of forming a metal line includes, after the pixel defining layer is formed, sequentially depositing Ti, Al, and Ti to form a metal layer, and forming a metal layer to obtain a metal line. patterning the substrate, including one or more of coating, exposing, developing, etching, or stripping.

In a possible implementation, forming the second encapsulation layer specifically includes depositing SiO on the pixel-defining layer and the OLED light-emitting component to form a full-surface second encapsulation structure layer. ₂ , SiNx, or _Al2O3 and patterning the second encapsulation structure layer on the entire _surface to obtain at least two second encapsulation layers. comprising one or more of coating, exposing, developing, etching, or stripping.

After the second encapsulation layer is formed, a planarization layer may be further formed on the second encapsulation layer to provide a flat surface for subsequent layer structure processing. Further, the planarization layer may cover foreign matter in order to prevent foreign matter from entering other film layers disposed on the planarization layer.

In possible implementations, the manufacturing method may further include forming a third encapsulation layer on the planarization layer, the third encapsulation layer covering the plurality of encapsulation units. . In this way, a full surface encapsulation layer is formed on the display panel, thereby improving the water-oxygen barrier effect of the display panel.

According to a fifth aspect, the technical solution of the present application further provides a display panel. The display panel includes a substrate used as a substrate, a thin film transistor layer, a pixel defining layer, at least two encapsulating structures, and at least two pixel units. The at least two encapsulation structures may be configured to encapsulate at least two pixel units. A thin film transistor layer is disposed on the substrate, a pixel defining layer is disposed on the thin film transistor layer, the pixel defining layer has a pixel region and a side encapsulation region, the side encapsulation region is surrounded by an encapsulation structure. Disposed around the encapsulated pixel unit, the pixel region and the side encapsulation regions are through holes disposed in the pixel definition layer. The pixel unit includes an OLED light emitting component, the OLED light emitting component being partially or completely disposed within the pixel area. The thin film transistor layer includes a layer of inorganic material, and a via is provided at a position corresponding to the side encapsulation region, the via exposing the layer of inorganic material.

Since the thin film transistor layer includes an inorganic material layer, and the inorganic material layer can achieve a good water-oxygen barrier effect, the inorganic material layer of the thin film transistor layer is used as an encapsulation layer to implement pixel unit encapsulation. can be done.

If the encapsulation structure is specifically arranged, the encapsulation structure is arranged on the side of the OLED light emitting component remote from the thin film transistor layer. The encapsulation structure may pass through the side encapsulation region and the via and is in sealing contact with the inorganic material layer exposed from the via of the thin film transistor layer within the side encapsulation region. The technical solution of the present application can prevent the formation of a large encapsulation layer by using at least two encapsulation structures to encapsulate at least two pixel units; This can effectively avoid the water-oxygen infiltration that occurs when the encapsulation layer cracks in scenarios such as when the flexible display including the display panel is bent, rolled, and freely deformed. In addition, by using the inorganic material layer of the thin film transistor layer as an encapsulation layer that encapsulates the encapsulation portion, the steps of processing the display panel can be effectively reduced, and the bending characteristics of the display panel are improved. Manufacturing difficulty and manufacturing costs are reduced. Additionally, in this embodiment of the present application, in addition to encapsulating the OLED light emitting components, the encapsulation structure includes a planarization layer, a source, a drain, an interlayer dielectric layer, an intermetallic dielectric layer, and a gate. One or more of the structures can be further encapsulated. This protects the encapsulated structure.

In possible implementations of the present application, the number of encapsulation structures may be the same as the number of pixel units, with each encapsulation structure configured to encapsulate one pixel unit. This implements independent encapsulation of each pixel unit, improving the bending properties of the display panel.

Further, the encapsulated structure may have a single layer structure including inorganic material layers, or may have a multilayer structure in which inorganic material layers and organic material layers are alternately laminated. The inorganic material layer may be formed by using silicon dioxide, silicon nitride, aluminum oxide, etc. to achieve a relatively good water-oxygen barrier effect.

In possible implementations of the present application, the display panel may further include metal lines, the metal lines may be located on the side of the pixel-defining layer remote from the substrate, or the metal lines may , arranged on the layer structure of the thin film transistor layer. The cathodes of the OLED light emitting components may be connected to a metal wire such that all OLED light emitting components are associated with each other. This facilitates display control of the entire display panel.

In a possible implementation of the present application, a photospacer is further arranged on the side of the pixel-defining layer remote from the substrate. In the process of forming OLED light-emitting components by vapor deposition, the photo spacer effectively prevents the vapor deposition mask for forming each functional layer of the OLED light-emitting components by vapor deposition from contacting the display panel, and reduces the product yield of the display panel. can be improved.

In possible implementations of the present application, a planarization layer may further be arranged on the side of the encapsulation structure remote from the thin film transistor layer. A planarization layer may be arranged to provide a flat machining surface for subsequent processing. Further, the planarization layer may cover foreign matter in order to prevent foreign matter from entering other film layers disposed on the planarization layer.

Furthermore, a third encapsulation layer can further be disposed on the planarization layer, the third encapsulation layer being a full surface structure that can cover at least two encapsulation structures. This improves the water-oxygen barrier encapsulation effect of the display panel. The third encapsulation layer may have a single layer structure of inorganic material layers, or may have a multilayer structure in which inorganic material layers and organic material layers are alternately laminated.

According to a sixth aspect, the technical solution of the present application further provides a flexible display. The flexible display may include a protective cover, a polarizer, a touch panel, and a display panel according to the fifth aspect. The polarizer is fixed to the protective cover and the touch panel is placed between the polarizer and the display panel, or the touch panel is fixed to the protective cover and the polarizer is placed between the touch panel and the display panel. . Furthermore, a heat dissipation layer may be further disposed on the side of the display panel remote from the touch panel, and a protective layer may be disposed on the heat dissipation layer.

Since at least two pixel units on the display panel of the flexible display are encapsulated by at least two encapsulation structures, a large encapsulation layer can be prevented from being formed on the display panel, thereby: It effectively avoids the water-oxygen infiltration that occurs when the encapsulation layer cracks in scenarios such as the flexible display is bent, rolled, and freely deformed, and alleviates the display failure problem of the flexible display.

According to a seventh aspect, the technical solution of the present application further provides an electronic device. The electronic device includes an intermediate frame, a rear housing, a printed circuit board, and a flexible display of the sixth aspect. The intermediate frame is configured to support the printed circuit board and the flexible display. A printed circuit board and a flexible display are placed on two sides of the intermediate frame. The rear housing is located on the side of the printed circuit board remote from the intermediate frame.

The flexible display of the electronic device in this application has relatively good bending properties. In the process where flexible displays are folded or bent, the risk of cracking the encapsulation layer of the display panel of the flexible display is relatively low, thereby reducing the flexibility of the electronic device caused when water and oxygen seep through the encapsulation layer. The problem of display failure is avoided.

According to an eighth aspect, the technical solution of the present application further provides a method for manufacturing a display panel. The display panel includes a substrate, a thin film transistor layer, a pixel defining layer, at least two encapsulating structures, and at least two pixel units. The at least two encapsulating structures are configured to encapsulate at least two pixel units, the pixel units including OLED light emitting components. This method is
manufacturing a substrate;
forming a thin film transistor layer on the substrate and providing a first via on the thin film transistor layer, the first via extending to a drain of the thin film transistor layer;
providing a second via on the thin film transistor layer, the second via extending to an inorganic material layer of the thin film transistor layer;
forming a pixel-defining layer and patterning the pixel-defining layer to form a pixel region and a side encapsulation region, the side encapsulation region being used to expose an inorganic material layer of the thin film transistor layer; The steps to be taken and
forming an OLED light emitting component in the pixel region, the OLED light emitting component being connected to the drain via the first via;
In order to obtain at least two independent encapsulation structures, on the side of the OLED light emitting component remote from the thin film transistor layer, a full surface encapsulation structure layer corresponding to the thin film transistor layer is formed; patterning the encapsulation structure and the inorganic material layer of the thin film transistor layer in sealing contact within the side encapsulation regions.

In a possible implementation, before the pixel-defining layer is formed, the method includes the step of forming an anode on the first encapsulation layer, the anode being connected to the drain via the first via. further comprising steps. Forming the anode includes, in particular, sequentially depositing ITO, Ag, and ITO on the first encapsulation layer to form an anode material layer; patterning, including one or more of coating, exposing, developing, etching, or stripping.

Additionally, the method may further include forming a photospacer on the pixel-defining layer after the pixel-defining layer is formed and before the OLED light emitting component is formed.

A possible implementation further includes metal lines on the pixel-defining layer such that the cathode of each OLED light-emitting component is connected to the metal line to associate all OLED light-emitting components and control the display of the entire display panel. can be formed. Alternatively, the metal line may be formed on the first encapsulation layer or on the layer structure of the thin film transistor layer. Specifically, the step of forming a metal line includes, after the pixel defining layer is formed, sequentially depositing Ti, Al, and Ti to form a metal layer, and forming a metal layer to obtain a metal line. patterning the substrate, including one or more of coating, exposing, developing, etching, or stripping.

In possible implementations, forming the encapsulation structure specifically includes depositing one or more of SiO ₂ , SiNx, or Al ₂ O ₃ on the pixel-defining layer and the OLED light emitting component; forming a full-surface encapsulation structure layer; and patterning the full-surface encapsulation structure layer to obtain at least two independent encapsulation structures, the steps comprising: coating, exposing, developing; and one or more of etching, etching, or stripping.

After the encapsulation structure is formed, a planarization layer may be further formed on the second encapsulation layer to provide a flat surface for subsequent layer structure processing. Further, the planarization layer may cover foreign matter in order to prevent foreign matter from entering other film layers disposed on the planarization layer.

In possible implementations, the manufacturing method may further include forming a third encapsulation layer on the planarization layer, the third encapsulation layer covering the plurality of encapsulation units. . In this way, a full surface encapsulation layer is formed on the display panel, thereby improving the water-oxygen barrier effect of the display panel.

According to a ninth aspect, the technical solution of the present application further provides a display panel. The display panel includes a substrate used as a substrate, a thin film transistor layer, a pixel defining layer, at least two encapsulating structures, and at least two pixel units. The at least two encapsulation structures may be configured to encapsulate at least two pixel units. A thin film transistor layer is disposed on the substrate, a pixel defining layer is disposed on the thin film transistor layer, the pixel defining layer has a pixel region and a side encapsulation region, the side encapsulation region is surrounded by an encapsulation structure. Disposed around the encapsulated pixel unit, the pixel region and the side encapsulation regions are through holes disposed in the pixel definition layer. The pixel unit includes an OLED light emitting component, the OLED light emitting component being partially or completely disposed within the pixel area. The substrate includes a layer of inorganic material and is provided with a via at a location corresponding to the side encapsulation region, the via exposing the layer of inorganic material.

Since the inorganic material layer can achieve a good water-oxygen barrier effect, the inorganic material layer of the substrate can be used as an encapsulation layer to encapsulate the encapsulation unit.

If the encapsulation structure is specifically arranged, the encapsulation structure is arranged on the side of the OLED light emitting component remote from the thin film transistor layer. The encapsulation structure may pass through the side encapsulation region and the via and is in sealing contact with the inorganic material layer exposed from the via of the substrate within the side encapsulation region.

The technical solution of the present application can prevent the formation of a large encapsulation layer by using at least two encapsulation structures to encapsulate at least two pixel units; This can effectively avoid the water-oxygen infiltration that occurs when the encapsulation layer cracks in scenarios such as when the flexible display including the display panel is bent, rolled, and freely deformed. In addition, by using the inorganic material layer of the substrate as an encapsulation layer that encapsulates the encapsulation part, the steps for processing the display panel can be effectively reduced, the bending properties of the display panel are improved, and the manufacturing Difficulty and manufacturing costs are reduced. Additionally, in this embodiment of the present application, in addition to encapsulating the OLED light emitting components, the encapsulation structure includes a planarization layer, a source, a drain, an interlayer dielectric layer, an intermetallic dielectric layer, and a gate. One or more of the structures can be further encapsulated. This protects the encapsulated structure.

1 is a schematic diagram of the structure of an electronic device according to an embodiment of the present application; FIG. 1 is a schematic diagram of the structure of a flexible display according to an embodiment of the present application; FIG. FIG. 1 is a schematic diagram of a structure of a display panel according to an embodiment. 1 is a schematic diagram of the structure of a display panel according to an embodiment of the present application; FIG. 1 is a schematic diagram of the structure of an OLED light emitting component according to an embodiment of the present application; FIG. 1 is a schematic diagram of the structure of an encapsulation structure according to an embodiment of the present application; FIG. 7 is a sectional view taken along line AA in FIG. 6. FIG. 7 is a sectional view taken along line BB in FIG. 6. FIG. 1 is a schematic diagram of the structure of an LTPS-TFT substrate according to an embodiment of the present application; FIG. 1 is a top view of a display panel with a first encapsulation layer formed thereon, according to an embodiment of the present application; FIG. 1 is a cross-sectional view of a display panel with a first encapsulation layer formed thereon, according to an embodiment of the present application; FIG. 1 is a cross-sectional view of a display panel with an anode formed thereon, according to an embodiment of the present application; FIG. 1 is a cross-sectional view of a display panel with a pixel-defining layer formed thereon according to an embodiment of the present application; FIG. FIG. 3 is a schematic diagram of the structure of the connection between the third metal grid line and the cathode according to an embodiment of the present application; 15 is a sectional view taken along the line CC in FIG. 14. FIG. 15 is a sectional view taken along line DD in FIG. 14. FIG. 1 is a cross-sectional view of a display panel on which photo spacers are formed according to an embodiment of the present application. 1 is a cross-sectional view of a display panel with OLEDs formed thereon, according to an embodiment of the present application; FIG. FIG. 2 is a cross-sectional view of a display panel with a second encapsulation layer formed thereon, according to an embodiment of the present application. FIG. 3 is a cross-sectional view of a display panel with a second encapsulation layer formed thereon, according to another embodiment of the present application. FIG. 2 is a cross-sectional view of a display panel on which a second planarization layer is formed according to an embodiment of the present application. FIG. 3 is a cross-sectional view of a display panel with a third encapsulation layer formed thereon, according to an embodiment of the present application. FIG. 3 is a schematic diagram of the structure of a display panel according to another embodiment of the present application.

In order to facilitate understanding of the display panel provided in the embodiments of the present application, the application scenario of the display panel provided in the embodiments of the present application will first be described below. The display panel may be placed on an electronic device such as a mobile phone, tablet computer, wearable device, or palmtop computer (personal digital assistant, PDA). As shown in FIG. 1, the electronic device may generally include a display 101, an intermediate frame 102, a rear housing 103, and a printed circuit board (PCB 104). Intermediate frame 102 may be configured to support a printed circuit board and display 101. A display 101 and a printed circuit board are arranged on either side of the intermediate frame 102. The rear housing 103 is located on the side of the printed circuit board remote from the intermediate frame 102. Furthermore, the electronic device may further include a component 1041 located on the PCB 104. Component 1041 may be placed on the side of PCB 104 facing intermediate frame 102, but is not limited thereto. The display panels provided in embodiments of the present application are specifically placed within a display of an electronic device. The display may be a flexible display or a rigid display. The flexible display may be an OLED flexible display or a quantum dot light emitting diode (QLED) flexible display. In the following embodiments of the present application, an example is used for explanation where the display is an OLED flexible display, and the way the OLED flexible display is arranged is similar to the way other forms of displays are arranged.

As shown in FIG. 2, the OLED flexible display in this embodiment of the present application may include, but is not limited to, a protective cover 201, a polarizer 202, a touch panel 203, a display panel 204, a heat dissipation layer 205, and a protective layer 206. Not done. Please refer to FIG. 2 for the specific arrangement of the OLED flexible display. Polarizer 202 is fixed to protective cover 201, and touch panel 203 is arranged between polarizer 202 and display panel 204. Alternatively, after the touch panel 203 is fixed to the protective cover 201, the polarizer 202 may be placed between the touch panel 203 and the display panel 204.

The protective cover 201 may be a transparent glass cover or a cover made of organic material, such as polyimide, to implement the protective function and reduce the impact on the display effect of the display. Polarizer 202 may be a circular polarizer to avoid reflection of anode light. The touch panel 203 may be arranged independently or may have an integral structure with the display panel 204. The heat dissipation layer 205 may be made of copper foil for heat dissipation. Protective layer 206 may be a protective foam. The layered structure of the flexible display may be adhered to each other using an optically clear adhesive or an opaque pressure sensitive adhesive (not shown). Furthermore, although a plurality of pixel units (not shown) are arranged on the display panel 204, the plurality of pixel units may have any shape, and the method of arranging the plurality of pixel units is not limited in this application. Water vapor, oxygen, etc. in the air greatly affect the lifespan of the OLED light-emitting components of the pixel unit. Therefore, strict water-oxygen encapsulation must be performed for the pixel units on the display panel so that all functional layers of the OLED light-emitting component are completely isolated from atmospheric water vapor, oxygen, etc. There is.

FIG. 3 shows a typical OLED flexible display display panel. The display panel has a top encapsulation layer 301 and a bottom encapsulation layer 302. In this embodiment, the "top" of the display panel means the side closer to the user when the display panel is in use. The upper encapsulation layer 301 is a monolithic structure that covers the entire display panel, and includes a first inorganic layer 3011, a second inorganic layer 3012, and a layer between the first inorganic layer 3011 and the second inorganic layer 3012. and a flexible sandwich layer 3013 arranged therein. The first inorganic layer 3011 and the second inorganic layer 3012 may be a SiO ₂ layer or a SiNx layer manufactured by a chemical vapor deposition (CVD) method. The flexible sandwich layer 3013 may be a polyimide (PI) or a cured polyester polymer organic layer formed using ink jet print (IJP) technology. The SiO ₂ or SiN , a water-oxygen buffer can be implemented to some extent. The upper encapsulation layer 301 is a full surface structure and the structure is a rigid structure. When the upper encapsulation layer is bent, the stress on the upper encapsulation layer becomes relatively large and cracks are more likely to occur. In this case, if a crack occurs in the first inorganic layer 3011 or the second inorganic layer 3012, the pixel unit of the display panel and Water and oxygen enter the OLED light emitting components of the cathode layer. As a result, the OLED light emitting component becomes defective or the cathode loses electrical characteristics, resulting in black spots on the OLED flexible display. Additionally, since the upper encapsulation layer 301 has a full surface structure, water and oxygen that enter the display panel through cracks will diffuse between adjacent pixel units. As a result, the OLED light-emitting components become defective or the cathodes of the OLED light-emitting components lose their electrical characteristics, and seriously, the entire OLED flexible display has trouble displaying.

In addition, the lower encapsulation layer 302 generally includes a first substrate material layer PI 1 and a second substrate material layer PI 2 (the first substrate material layer PI 1 and the second substrate material layer PI 2 in the substrate of the display panel). both of the layers PI 2 may be polyimide polymer organic layers) and a barrier layer 3021 arranged between the first substrate material layer PI 1 and the second substrate material layer PI 2 It is. Barrier layer 3021 is typically a SiO ₂ or SiNx layer. The lower encapsulation layer 302 is a full surface structure and a rigid structure. When the lower encapsulation layer is bent, it is also more prone to cracking. When a crack occurs in the lower encapsulation layer 302, water and oxygen also enter the OLED light emitting component along the crack. As a result, block spots occur on the OLED flexible display. Additionally, since the lower encapsulation layer 302 has a full surface structure, water and oxygen that enter the display panel through cracks will diffuse between adjacent pixel units. As a result, the OLED light-emitting components become defective or the cathodes of the OLED light-emitting components lose their electrical characteristics, and seriously, the entire OLED flexible display has trouble displaying.

Therefore, when the OLED flexible display is bent or folded, water and oxygen can enter through the cracks, causing corrosion of the OLED light-emitting components. As a result, the OLED light emitting component cannot be powered on or the OLED light emitting component is degraded and, as a result, cannot emit light.

To solve the above problem, one embodiment of the present application eliminates water-oxygen infiltration that occurs when the encapsulation layer cracks in scenarios such as when the display panel is bent, rolled, and freely deformed. To provide a display panel to solve and alleviate defective problems such as black spots on flexible displays. The structure of the display panel will be described in detail below with reference to the accompanying drawings.

As shown in FIG. 4, one embodiment of the present application provides a display panel. The display panel includes a substrate, a thin film transistor layer, a pixel definition layer 412, a pixel unit, and an encapsulation structure. A thin film transistor layer is disposed on the substrate. A pixel definition layer is disposed on the thin film transistor layer. As shown in FIG. 4, in this embodiment of the present application, the substrate may provide flexible bearers for each upper layer, such as a thin film transistor layer. The substrate may include, but is not limited to, a first substrate material layer PI 1, a barrier layer 402, and a second substrate material layer PI 2 stacked in order from bottom to top (in this embodiment, the display panel "Top" means the side closer to the user when the display panel is in use). Specifically, the material of the first substrate material layer PI 1 may be a flexible polyimide substrate material, or a flexible material such as polyethylene terephthalate (PET), paper, metal, or ultra-thin glass. The barrier layer 402 may be configured to perform a water and oxygen barrier, and the material of the second substrate material layer PI 2 may also be a flexible polyimide substrate material; It may also be a flexible material such as polyethylene terephthalate (PET), paper, metal, ultra-thin glass, or the like. In some embodiments of the present application, the barrier layer 402 or the second substrate material layer PI 2 in the substrate may alternatively be omitted to simplify the structure of the substrate.

When the thin film transistor layer is specifically arranged, the thin film transistor layer includes a buffer layer 403, an active layer, a gate insulator layer 405, a gate G, a first metal grid line M1, an intermetal insulating layer 406, a metal capacitor 407, an interlayer insulating layer. 408, a source S, a drain D, a second metal grid line M2, and a first planarization layer 409. This is not limited in this embodiment of the present application.

Optionally, in this embodiment of the present application, a low temperature poly silicon (LTPS) thin film transistor (TFT) is used as an example. The thin film transistor layer may include a gate insulator layer 405, an intermetal dielectric layer 406, an interlayer dielectric layer 408, and a first planarization layer 409. Optionally, the thin film transistor layer may include a buffer layer 403, a gate insulator layer 405, an intermetal dielectric layer 406, an interlayer dielectric layer 408, and a first planarization layer 409. Optionally, the thin film transistor layers include a buffer layer 403, an active layer, a gate insulator layer 405, a gate G, an intermetal insulating layer 406, an interlayer insulating layer 408, a source S, a drain D, and a first planarization layer 409. May include. In this embodiment of the present application, the thin film transistor layers include a buffer layer 403, an active layer, a gate insulator layer 405, a gate G, a first metal grid line M1, an intermetal insulating layer 406, a metal capacitor 407, an interlayer insulating layer 408 , a source S, a drain D, a second metal grid line M2, and a first planarization layer 409. Please refer to FIG. 4. Hereinafter, each layer structure of the thin film transistor layer in this embodiment of the present application will be described in detail.

Buffer layer 403 may be configured to prevent impurity ions from affecting the characteristics of thin film transistor layers disposed on the substrate and also to perform a water-oxygen barrier.

The active layer is mainly composed of P-Si and LTPS. The active layer is a TFT semiconductor layer, and the semiconductor switches and conductive lines may be formed based on different doping. As shown in FIG. 4, the P-Si in the center of the active layer in FIG. 4 is used to represent a semiconductor switch, and two locations on both sides of the P-Si connect the source S and drain D to the P-Si. A conductor that becomes a conductive wire for connection.

A gate insulator layer 405 may isolate the active layer from the gate G.

A gate G is formed on the gate insulator layer 405 and is used as a TFT component switch. For example, in the case of a P-type TFT, when a negative voltage is applied to the gate, a relatively large current exists in the source and drain, and the TFT exhibits an on state, or when a positive voltage is applied to the gate, There is only a weak leakage current on the source and drain, and the TFT exhibits an off state, and for N-type TFT, when a negative voltage is applied to the gate, there is only a weak leakage current on the source and drain, and the TFT exhibits an off-state, or when a positive voltage is applied to the gate, a relatively large current exists in the source and drain, and the TFT exhibits an on-state.

The first metal grid line M1 is formed on the gate insulator layer 405 and may be formed together with the gate G, which typically becomes a scan line. The screen display is a progressive scanning display, so the scanning line connects the TFT switch gates of all rows to turn on the TFT gate switches row by row, and the data line signal and power line signal refresh the information of each row. make it possible.

An inner metal dielectric (IMD) layer 406 is used as an insulating layer between the first metal grid line M1 and a metal capacitor (MC) 407, and as an insulating layer of the metal capacitor 407. Good too.

The metal capacitor 407 may be used as a capacitive power-on board and other drive lines, and the first metal grid line M1 may be used as a capacitive power-down board.

An inner layer dielectric (ILD) layer 408 is used as an insulator layer between the gate G and the source and drain.

A source S is formed on the interlayer insulating layer 408 and connected to the active layer. After the source S is connected to the active layer, ohmic contacts are formed to implement the circuit connection.

A drain D is formed on the interlayer insulating layer 408 and connected to the active layer. After the drain D is connected to the active layer, an ohmic contact is formed to implement the circuit connection.

The second metal grid line M2 is connected to the metal capacitor 407 via a via 4081 in the interlayer insulating layer 408. Interlayer dielectric layer 408 may be used as an insulator layer between M2 and a structure such as metal capacitor 407. Further, the second metal grid line M2 may be formed together with the source S and drain D, and is used as a drive line for the source S and drain D to transmit data signals, power signals, and the like. Specifically, data and power signals are provided via an integrated circuit chip (IC) and typically transmitted via a second metal grid line M2. The transmission direction is typically perpendicular to the scan line direction of column transmission. Each column of pixels has an independent data line connected to the TFT source S or drain D in the column for transmission. Power signals are also accessed to the TFT sources S or drains D of each column for transmission. However, unlike data lines, power signals are relatively simple DC signals or fixed value pulse signals. Therefore, all power lines are usually short-circuited for unified transmission.

The first planarization (PLN) layer 409 has the functions of planarization, insulation, and phase protection against variations in the substrate electrode.

When the pixel defining layer 412 is specifically provided, the pixel defining layer 412 may be a layered structure formed by applying a photoresist-based organic material onto the thin film transistor layer through a slit coating. In addition, the pixel region 4121 and the side encapsulation region 4122 can be obtained by processing the pixel definition layer 412, such as exposure or development. The pixel region 4121 and the side encapsulation region 4122 may each be a hole structure passing through the pixel defining layer 412, and the side encapsulation region 4122 is formed around the pixel unit encapsulated by the encapsulation structure. Placed.

A pixel unit is the smallest unit for implementing the display function of a display panel, and includes an OLED light emitting component. The OLED light emitting component may be located within the pixel area. FIG. 5 is a schematic diagram of a layer structure of an OLED light emitting component according to an embodiment of the present application. The OLED light emitting component includes an anode 411, a hole injection layer (HIL) 414, a hole transport layer (HTL) 415, and an emission layer (EL) 416, which are stacked in order. , an electron transport layer (ETL) 417, a cathode 418, and a capping layer (CPL) 419. Please refer to FIGS. 4 and 5 together. In the process of manufacturing each layer structure of OLED light emitting components, the materials used to form each layer structure are fluids, so some materials are It will be appreciated that although extending outside the region 4121, the light emitting effect of the OLED light emitting component is not affected. It is noted that in this embodiment of the present application, an example is used for explanation in which the OLED light emitting component is partially located within the pixel area. Alternatively, the OLED light emitting component may be placed completely within the pixel area. This is not limited in this embodiment of the present application.

If the encapsulation structure is specifically arranged, the encapsulation structure may have a one-to-one correspondence with the pixel unit. For example, each pixel unit is encapsulated by one encapsulation structure. Specifically, the encapsulation structure includes a first encapsulation layer 410 and a second encapsulation layer 420. A first encapsulation layer 410 is disposed between the OLED light emitting component and the thin film transistor layer and may be exposed from side encapsulation regions 4122 of the pixel definition layer 412. From FIG. 4, the second encapsulation layer 420 covers the pixel unit, and the second encapsulation layer 420 penetrates the side encapsulation region 4122 to make sealing contact with the first encapsulation layer 410. I understand. In this way, each pixel unit is encapsulated by a first encapsulation layer 410 and a second encapsulation layer 420 such that each pixel unit is independently encapsulated. Additionally, a pixel definition layer 412 is formed between two adjacent encapsulation structures. The material of the pixel defining layer 412 is an organic material and is a flexible material, so that adjacent encapsulation structures can be flexibly connected. Therefore, the technical solution in this application can prevent the formation of a large encapsulation layer on the display panel, and the OLED flexible display including the display panel can be bent, rolled and deformed freely. The water-oxygen infiltration that occurs when the encapsulation layer cracks in such scenarios can be effectively avoided. In this embodiment, the material of the first encapsulation layer 410 may be an inorganic material such as, but not limited to, SiO ₂ , SiNx, or Al ₂ O ₃ , and the material of the second encapsulation layer 420 The material may also be an inorganic material such as, but not limited to, SiO ₂ , SiNx, or Al ₂ O ₃ . This achieves a relatively good water-oxygen barrier effect. The first encapsulation layer 410 and the second encapsulation layer 420 may be a single-layer inorganic encapsulation layer, or may be an encapsulation layer with a multilayer laminate structure in which inorganic layers and organic layers are alternately laminated. For example, it may have a three-layer structure in which an inorganic layer, an organic layer, and an inorganic layer are laminated in order, or a four-layer structure in which an inorganic layer, an organic layer, and an inorganic layer are laminated in order. It will be understood that a five-layer structure of five or more laminated layers may be used.

Since each pixel unit is independently encapsulated by one encapsulation structure, forming a large encapsulation layer on the display panel can be prevented. Encapsulation structures are independent of each other. When the display panel is applied to an OLED flexible display, even if the OLED flexible display is bent in any direction more than 100,000 times, the display panel can still have a good encapsulation function. Therefore, the display panel in this embodiment of the present application can reduce the risk of cracking of the encapsulation layer in application scenarios such as when the OLED flexible display is bent, rolled and freely deformed, thereby reducing the risk of cracking of the encapsulation layer. and can avoid the problem of display defects in flexible displays that occur when oxygen permeates through the encapsulation layer and enters the display panel. Additionally, since each pixel unit is independently encapsulated, water and oxygen entering any encapsulation structure can be further prevented from diffusing between adjacent OLED light emitting components, thereby The light emitting performance of the light emitting component can be prevented from being affected.

Additionally, note that multiple pixel units (the number of multiple pixel units is less than the total number of pixel units on the display panel) may alternatively be encapsulated by one encapsulation structure. I want to be The encapsulating structure may be of any shape. Please refer to FIG. For example, for a display panel with a fixed single folding direction (the curve with an arrow in the figure indicates the folding direction), all pixel units are arranged in columns or rows to implement pixel unit encapsulation. may be grouped into columns or rows along the folding direction to form an encapsulated structure of. Thereby, the folding performance of the display panel in a single fixed folding direction of the display panel can be effectively improved. In addition, compared to embodiments that encapsulate each pixel unit independently, the present embodiment of forming column or row encapsulation structures to implement pixel unit encapsulation presents manufacturing difficulties and Manufacturing costs can be effectively reduced. Please continue to refer to FIG. In some other embodiments of the present application, several adjacent pixel units may be encapsulated by one encapsulation structure (see dash-dotted rectangular box in the figure). Generally, there are a relatively large number of pixel units on a display panel, and the area of an encapsulation structure for encapsulating several adjacent pixel units is smaller than the area of the entire display panel. Therefore, the encapsulation method in this embodiment can also meet the bending requirements of the display panel and implement good encapsulation features. On the display panel, each pixel unit is independently encapsulated, or multiple pixel units less than the total number of pixel units on the display panel are encapsulated by one encapsulation structure. A pixel unit will be explained. Therefore, in this application, both of the aforementioned two encapsulation structures are referred to as pixel-level encapsulation structures.

Further placing metal lines on the display panel to implement electrical connections between the OLED light emitting components encapsulated by the pixel-level encapsulation structure on the display panel to control the display across the display panel. be able to. If a metal line is specifically arranged, the metal line may be the third metal grid line M3 in FIG. 4 . Referring to FIG. 6, the cathode 418 of the OLED light emitting component of each pixel unit is connected to the third metal grid line M3. In this way, as shown in FIG. can be reached. Electrons can reach the light emitting layer 416 from the cathode 418 through the electron transport layer 417. On the light emitting layer 416, holes and electrons are combined with each other to form excitons in an excited state. The excitons transfer energy to the organic light emitting molecules on the light emitting layer 416 and excite the electrons of the organic light emitting molecules to transition from the ground state to the excited state. The excited state of the electron beam is deactivated to generate photons and emit light. Since the cathodes 418 of all OLED light emitting components are connected through the third metal grid line M3, the third metal grid line M3 transmits cathode drive signals to the cathodes 418 of all OLED light emitting components simultaneously. Therefore, synchronous cathode signal control can be implemented. The material of the third metal grid line M3 may be titanium aluminum alloy, molybdenum, or the like. Also, if the third metal grid line M3 is specifically arranged, please continue to refer to FIG. 4. The third metal grid line M3 is arranged on the side of the pixel definition layer 412 that is remote from the thin film transistor layer. Alternatively, please refer to FIGS. 7 and 8. FIG. 7 is a cross-sectional view taken along line AA in FIG. 6, and is a cross-sectional view of the display panel at a position where the third metal grid line M3 is not connected to the cathode 418. FIG. 8 is a cross-sectional view taken along line BB in FIG. 6, and is a cross-sectional view of the display panel at a position where the third metal grid line M3 is connected to the cathode 418. In the embodiment shown in FIGS. 7 and 8, the third metal grid line M3 may be disposed on the first encapsulation layer 410. Alternatively, in other embodiments, the third metal grid line M3 may be disposed on a layer structure of a thin film transistor layer (eg, planarization layer 409, interlayer dielectric layer 408, or intermetal dielectric layer 406).

Please continue to refer to FIG. The display panel in this embodiment of the present application may further include a photo spacer 413 disposed on the pixel definition layer 412, and the photo spacer 413 may be a photo spacer. Placing the photo spacer 413 on the pixel-defining layer 412 ensures that the deposition mask for forming each functional layer of the OLED light-emitting component by vapor deposition contacts the display panel during the process of forming the OLED light-emitting component by vapor deposition. It can be effectively prevented and the product yield of display panels can be improved.

In addition to the above structure, the display panel may further include a second planarization layer 421. The second planarization layer 421 is arranged on the side of the second encapsulation layer 420 remote from the thin film transistor layer. By depositing the second planarization layer 421, a flat processed surface can be provided in subsequent processing. Further, the second planarization layer 421 may cover foreign matter and prevent the foreign matter from entering other film layers disposed on the second planarization layer 421. Further, please continue to refer to FIG. A third encapsulation layer 422 over the entire surface may further be provided on the second planarization layer 421 . In this application, a full-surface encapsulation structure placed on a display panel is referred to as a panel-level encapsulation structure. Accordingly, the display panel has both a pixel-level encapsulation structure and a panel-level encapsulation structure to help improve the water-oxygen barrier effect of the display panel. Further, the third encapsulation layer 422 may be a single-layer inorganic encapsulation layer, or may be an encapsulation layer with a multilayered structure in which inorganic layers and organic layers are alternately laminated. For example, it may have a three-layer structure in which an inorganic layer, an organic layer, and an inorganic layer are laminated in this order, or a four-layer structure in which an inorganic layer, an organic layer, an inorganic layer, and an organic layer are laminated in this order. , or may have a structure of five or more layers formed by lamination.

The display panel in this embodiment of the present application comprises both a pixel-level encapsulation structure and a panel-level encapsulation structure, providing dual protection of the pixel units. In this case, even if water and oxygen enter the display panel through the panel-level encapsulation structure, water and oxygen cannot enter the OLED light-emitting component due to the barrier of the pixel-level encapsulation structure. . Therefore, this solution can help improve the water-oxygen barrier effect of the display panel.

One embodiment of the present application further provides a flexible display. A flexible display may include, but is not limited to, a protective cover, a polarizer, a touch panel, a display panel, a heat dissipation layer, and a protective layer. When a flexible display is specifically arranged, the polarizer is fixed to the protective cover and the touch panel is placed between the polarizer and the display panel. Alternatively, a polarizer may be placed between the touch panel and the display panel after the touch panel is fixed to the protective cover. The display panel may be a display panel of any one of the embodiments described above.

The protective cover may be a transparent glass cover or a cover made of organic materials such as polyimide to implement the protective function and reduce the impact on the display effect of the display. The polarizer may be a circular polarizer to avoid reflection of the anode light. The touch panel may be arranged independently or may be integrated with the display panel. The heat dissipation layer may be a copper foil for heat dissipation. The protective layer may be a protective foam. The layered structure of the flexible display may be adhered to each other using an optically transparent adhesive or an opaque pressure sensitive adhesive.

If the display panel is particularly arranged, the display panel includes a substrate, a thin film transistor layer, a pixel defining layer, at least two encapsulating structures and at least two pixel units. The at least two encapsulation structures are configured to encapsulate at least two pixel units. A thin film transistor layer is disposed on the substrate. A pixel definition layer is disposed on the thin film transistor layer. In this embodiment of the present application, the substrate may provide flexible bearers for each upper layer, such as a thin film transistor layer. The substrate may include, but is not limited to, a first substrate material layer, a barrier layer, and a second substrate material layer stacked in order from bottom to top. In some embodiments of the present application, a barrier layer or a second substrate material layer within the substrate may be omitted to simplify the structure of the substrate.

When the thin film transistor layer is specifically arranged, the thin film transistor layer includes a buffer layer, an active layer, a gate insulator layer, a gate, a first metal grid line, an intermetal insulating layer, a metal capacitor, an interlayer insulating layer, a source, a drain, a first 2 metal grid lines, and a first planarization layer. This is not limited in this embodiment of the present application.

If the pixel definition layer is specifically arranged, the pixel region and the side encapsulation region are arranged on the pixel definition layer. The pixel region and the side encapsulation region may be hole structures passing through the pixel defining layer, and the side encapsulation region is arranged around the pixel unit encapsulated by the encapsulation structure. A pixel unit is the smallest unit for implementing the display function of a display panel, and includes an OLED light emitting component. The OLED light emitting component is located partially or completely within the pixel area.

If the encapsulation structure is specifically arranged, the encapsulation structure may have a one-to-one correspondence with the pixel unit. For example, each pixel unit is encapsulated by one encapsulation structure. Specifically, the encapsulation structure includes a first encapsulation layer and a second encapsulation layer. The first encapsulation layer may be disposed between the OLED light emitting component and the thin film transistor layer and exposed from the side encapsulation region of the pixel definition layer. A second encapsulation layer covers the pixel unit, and the second encapsulation layer passes through the side encapsulation regions to make sealing contact with the first encapsulation layer. In this way, each pixel unit is encapsulated by the first encapsulation layer and the second encapsulation layer such that each pixel unit is independently encapsulated.

In a possible embodiment, multiple pixel units (the number of multiple pixel units is less than the total number of pixel units on the display panel) may alternatively be encapsulated by one encapsulation structure. . The encapsulating structure may be of any shape. For example, for a display panel with a fixed single folding direction, all pixel units are aligned in the folding direction to form a column or row encapsulation structure to implement pixel unit encapsulation. may be grouped into columns or rows along the line.

Even if the flexible display in this embodiment is bent in any direction more than 100,000 times, the display panel can still have good encapsulation characteristics. This can avoid water-oxygen infiltration caused by cracks in the encapsulation layer in application scenarios where the flexible display is bent, rolled or freely deformed, thereby avoiding water and oxygen infiltration. The problem of display defects in flexible displays caused by oxygen penetrating through the encapsulation layer and entering the display panel can be avoided. In addition, each pixel unit is encapsulated independently or by grouping, which prevents water and oxygen entering any encapsulation structure from diffusing between adjacent encapsulation structures. Furthermore, it is possible to prevent light emission defects in the entire flexible display.

One embodiment of the present application further provides an electronic device. The electronic device includes an intermediate frame, a rear housing, a printed circuit board, and a flexible display according to any one of the embodiments described above. The intermediate frame may be configured to support a printed circuit board and an OLED flexible display. An OLED flexible display and a printed circuit board are placed on either side of the intermediate frame. The rear housing is located on the side of the printed circuit board remote from the intermediate frame.

The electronic device in this embodiment of the present application may be a foldable device. In the process of folding OLED flexible displays of electronic devices, the risk of cracking the encapsulation layer of the display panel of the flexible display is relatively low, thereby preventing water and oxygen from penetrating through the encapsulation layer and entering the display panel. The resulting problem of poor display of OLED flexible displays is avoided.

To further understand the structure of the display panel in the present application, one embodiment of the present application further provides a process for manufacturing the display panel. The manufacturing process includes the following detailed steps.

Step 001: Manufacture a substrate. In this embodiment of the present application, a top-gate low temperature poly-silicon (LTPS) thin film transistor (TFT) substrate may be used as an example. Please refer to FIG. 9 for the method of setting the layer structure of the substrate. The substrate may be formed on a bearer layer 401, which may be a bearer glass layer, to provide support in the manufacturing process of the display panel. In addition, vias 4091 need to be secured on the first planarization layer 409 to facilitate subsequent electrode connections. Since the process of manufacturing LTPS-TFT substrates is relatively mature, the process of manufacturing LTPS-TFT substrates is not described in detail in this application.

Step 002: Manufacturing the first encapsulation layer 410. In this step, a _SiO2 , _SiNx , or _Al2O3 deposited layer is formed by chemical vapor deposition (CVD), atomic layer deposition (ALD), etc. to form the first encapsulation layer. It can function as layer 410. Then, the first encapsulation layer 410 is patterned by applying a photoresist, exposing it to light, developing it, etching it, peeling off the photoresist, and the like. Therefore, the first encapsulation layer 410 is cut corresponding to each region for forming a pixel unit, and an independent first encapsulation layer 410 corresponding to each pixel unit is formed. See FIG. 10 for the pattern of the first encapsulation layer 410 formed in step 002. The dashed lines represent the regions forming the pixel units 43, and the solid lines represent the independently formed first encapsulation layer 410. Further, FIG. 11 is a cross-sectional view of the display panel after manufacturing the first encapsulation layer 410. As can be seen, the independent first encapsulation layer 410 corresponding to each pixel unit avoids the vias 4091 secured on the first planarization layer 409 to facilitate subsequent electrode connections. It is formed by

Step 003: Manufacture anode 411. Generally, indium tin oxide (ITO), Ag, and ITO are sequentially deposited by physical vapor deposition (PVD) to fabricate the anode 411 of the OLED light emitting component. The anode 411 can then be patterned by photoresist coating, exposure, development, etching, photoresist stripping, etc. to form the anode 411 shown in FIG. 12. Anode 411 may be connected in contact with drain D via via 4091 to implement a seal.

Step 004: Manufacturing a pixel definition layer (PDL) 412. First, a photoresist-based organic material is applied to the structure formed after step 003, for example, the first planarization layer 409, the first encapsulation layer 410, or the anode 411, by slit coating. Good too. Thereafter, by performing exposure, development, etc., a patterned pixel definition layer 412 can be obtained. As shown in FIG. 13, a pixel region 4121 and a side encapsulation region 4122 formed around the pixel region 4121 are formed on the patterned pixel definition layer 412. OLED light emitting components of the pixel unit may be formed within the pixel region 4121, with side encapsulation regions 4122 for exposing the first encapsulation layer 410 for implementing subsequent pixel unit encapsulation. used for.

Step 005: Then fabricate a third metal grid line M3 connected to the cathodes so as to electrically connect the cathodes of the OLED light emitting components of all pixel units. Furthermore, some third metal grid lines M3 may also be used as data lines for transmitting data signals.

Generally, when the third metal grid line M3 is manufactured, materials such as Ti, Al, and Ti may be sequentially deposited first to form a metal layer on the pixel-defining layer 412, or Mo Materials such as may be deposited by PVD. The metal layer may then be patterned to form third metal grid lines M3 by one or more of photoresist coating, exposure, development, etching, and photoresist stripping. FIG. 14 shows a solution for the wiring of the third metal grid line M3 (the figure includes the pattern of the third metal grid line M3 and the subsequently formed cathode 418).

Further, FIG. 15 is a sectional view taken along the line CC in FIG. 14. FIG. 15 is a cross-sectional view of the display panel at a position where the third metal grid line M3 is not connected to the cathode 418 after step 005. FIG. 16 is a sectional view taken along line DD in FIG. 14. FIG. 16 is a cross-sectional view of the display panel at a position where the third metal grid line M3 is connected to the cathode 418 after step 005.

In possible embodiments of the present application, after step 005, the manufacturing process may optionally include step 006: manufacturing a photo spacer (PS) 413. When specifically forming the photo spacers 413, it is common to first apply a photoresist by slit coating, and then obtain the photo spacers 413 by exposure, development, and the like. Please refer to FIG. 17 for the stacking relationship between the manufactured photo spacer 413 and the manufactured pixel definition layer 412. As shown in FIG. 17, the cross-sectional shape of the photo spacer 413 may be a trapezoid, or may have another shape such as a rectangle. Further, the position at which the photo spacer 413 is arranged may also be selected depending on the specific situation. Fabricating the photospacer 413 on the pixel-defining layer 412 can effectively prevent the mask from contacting the surface of the display panel during the subsequent deposition process to form the OLED light-emitting component.

Step 007: Fabricate the patterned OLED light emitting component. The OLED light emitting component includes a hole injection layer (HIL) 414, a hole transport layer (HTL) 415, an emission layer (EL) 416, and an electron transport layer (EL) 416, which are stacked in this order. a transport layer (ETL) 417, a cathode 418, and a capping layer (CPL) 419.

See FIGS. 17 and 18. When an OLED light-emitting component is formed within a pixel region 4121 defined by a pixel-defining layer 412, each layer structure of the OLED light-emitting component uses edge thickness mismatch and undercut of another film layer. and patterned by fine metal mask (FFM) deposition, printing, film lift off, and laser etching. In FIG. 18, the hole injection layer 414, hole transport layer 415, light emitting layer 416, electron transport layer 417, cathode 418, and capping layer 419 are all deposited layer patterning designs of the OLED light emitting component implemented by FFM. used as an example to present.

It is noted that in this embodiment of the present application, an example is used for explanation in which the OLED light emitting component is partially located within the pixel area. Alternatively, the OLED light emitting component may be placed completely within the pixel area. This is not limited in this embodiment of the present application.

Step 008: Manufacturing the second encapsulation layer 420. Please refer to FIG. 19. When specifically manufacturing the second encapsulation layer 420, first, SiO ₂ , SiNx, or Al ₂ O ₃ may be deposited as the second encapsulation layer 420 using a CVD or ALD method. The second encapsulation layer 420 is then patterned by photoresist coating, exposure, development, etching, photoresist stripping, etc. to form independent second capsules located above each pixel unit and corresponding to each pixel unit. A chemical layer 420 can be formed. The first encapsulation layer 410 between adjacent pixel units is also arranged independently, so that the second encapsulation layer 420 and the first encapsulation layer 410 of the pixel unit overlap the side encapsulation of the pixel-defining layer 412. A sealing contact may be made by using a sealed region 4122. FIG. 19 shows pixel encapsulation at a location where the third metal grid line M3 is not connected to the cathode 418. FIG. 20 shows pixel encapsulation at the location where the third metal grid line M3 is connected to the cathode 418.

In the aforementioned processing steps of manufacturing a display panel, a corresponding second encapsulation layer 420 and a corresponding first encapsulation layer 410 are formed for each pixel unit, such that each pixel unit is independently encapsulated. In other words, a pixel-level encapsulation structure of the display panel is formed. In this way, by cutting the encapsulation connections between pixel units, it is possible to prevent the formation of large encapsulation layers, thereby causing the OLED flexible display including the display panel to be bent and rolled. , the water-oxygen infiltration that occurs when the encapsulation layer cracks in scenarios such as being freely deformed can be effectively avoided. Furthermore, OLED flexible displays can further implement true multi-directional folding, curling, free deformation, and small radius bending, thereby implementing true free flexible encapsulation.

Further, the pixel definition layer 412 is provided with grooves and protrusions, which may be transferred to the second encapsulation layer 420. However, to facilitate subsequent processing, please refer to FIG. 21. A second planarization layer 421 may further be formed on the display panel formed after step 008. Further, the second planarization layer 421 may cover foreign matter and prevent the foreign matter from entering other film layers disposed on the second planarization layer 421.

Further, please refer to FIG. 22. A full-surface third encapsulation layer 422 may further be formed on the second planarization layer 421 to form a full-surface water-oxygen barrier encapsulation on the display panel. Encapsulation layer 422 may be deposited with SiO ₂ , SiNx, or Al ₂ O ₃ . Therefore, an encapsulation mode that combines both pixel-level encapsulation structure and panel-level encapsulation structure is formed on the display panel to further improve the water-oxygen barrier encapsulation effect of the display panel.

At the end of the manufacturing process of the display panel in this application, a laser can be used to illuminate the interface between the bearer layer 401 and the first substrate material layer PI 1, so that the bearer layer 401 1 loses its adhesion to the substrate material layer PI 1 and thus the bearer layer 401 is removed. A flexible display panel is thereby obtained.

After the display panel is processed, the display panel may be cut based on the specific size requirements of the OLED flexible display. The touch panel and polarizer are then attached and the necessary bonding processes are performed to implement the electrical connections. A flexible cover, copper foil for heat dissipation, protective film, etc. are attached. Finally, the OLED flexible display is assembled with customized features and the necessary performance checks are performed to complete the manufacturing of the OLED flexible display.

Please refer to FIG. 23. In some embodiments of the present application, a display panel is further provided. The display panel includes a substrate, a thin film transistor layer, a pixel definition layer 412, a pixel unit, and an encapsulation structure. The encapsulation structure is configured to encapsulate the pixel unit. Pixel definition layer 412 has a pixel region and side encapsulation regions arranged around a pixel unit encapsulated by an encapsulation structure. The pixel definition layer 412 may be formed by coating a photoresist-based organic material on the thin film transistor layer through a slit coating, or by forming a pixel region or a side encapsulation region by exposure, development, or the like.

The thin film transistor layers may include, but are not limited to, a stacked buffer layer 403, an active layer, a gate insulator layer 405, an intermetal dielectric layer 406, an interlayer dielectric layer 408, and a first planarization layer 409. The buffer layer 403, gate insulator layer 405, intermetal insulating layer 406, and interlayer insulating layer 408 generally have an inorganic layer structure made of an inorganic material such as SiO ₂ , SiNx, Al ₂ O ₃ , etc., and have relatively good properties. A water-oxygen barrier effect can be obtained. Therefore, in this embodiment, the above-described inorganic layer structure of the thin film transistor layer can be used as the first encapsulation layer. In addition, in this embodiment, a via is further provided on the thin film transistor layer at a position corresponding to the side encapsulation region, and the via is connected to the inorganic layer structure of the thin film transistor layer (for example, the interlayer dielectric layer 408, the intermetal dielectric layer 406, gate insulator layer 405, buffer layer 403). For example, in FIG. 23, the interlayer insulating layer 408 is exposed by a via on the thin film transistor layer.

In this embodiment of the present application, the pixel unit may include, but is not limited to, an OLED light emitting component. The OLED light emitting component is located partially or completely within the pixel area. If the encapsulation structure is specifically arranged, the encapsulation structure used as the second encapsulation layer 420 covers each pixel unit in a one-to-one correspondence. In other words, each pixel unit is encapsulated by one encapsulation structure. The second encapsulation layer 420 makes sealing contact with the inorganic layer structure (e.g., interlayer dielectric layer 408) of the thin film transistor layer through side encapsulation regions and vias on the thin film transistor layer, thereby making each pixel unit is wrapped by an inorganic layer structure (e.g., interlayer dielectric layer 408) of the thin film transistor layer and the second encapsulation layer 420, encapsulating each pixel unit independently, in other words, forming a pixel-level encapsulation structure. do. This can prevent the formation of a large encapsulation layer, thereby preventing the encapsulation layer from forming in scenarios where the OLED flexible display, including the display panel, is bent, rolled or deformed freely. Water-oxygen infiltration that occurs when cracking can be effectively avoided.

It should be noted that FIG. 23 is an example. In this embodiment, the pixel unit includes an OLED light emitting component, a planarization layer 409, a source S, and a drain D. Optionally, the pixel unit may further include an interlayer insulating layer 408. Optionally, the pixel unit may further include an intermetal insulating layer 406 and a gate G.

Additionally, in this embodiment, multiple pixel units (the number of multiple pixel units is less than the total number of pixel units on the display panel) are alternatively encapsulated by one encapsulation structure as a whole. may be done. The encapsulating structure may be of any shape. Please refer to FIG. For example, for a display panel with a fixed single folding direction (the curve with an arrow in the figure indicates the folding direction), all pixel units can be grouped into columns or rows to create columns or rows of capsules. pixel unit encapsulation can be implemented. This improves the bending properties of the display panel and reduces manufacturing difficulty and cost. Please continue to refer to FIG. In some other embodiments of the present application, several adjacent pixel units may be encapsulated by one encapsulation structure (see dash-dotted rectangular box in the figure). On the display panel, each pixel unit is independently encapsulated, or multiple pixel units less than the total number of pixel units on the display panel are encapsulated by one encapsulation structure. A pixel unit will be explained. Therefore, in this application, both of the aforementioned two encapsulation structures are referred to as pixel-level encapsulation structures.

In this embodiment, the pixel units on the display panel are independently encapsulated, so that each pixel unit or n (n<total number of pixel units on the display panel) pixel units is integrated into one encapsulation structure. (a pixel-level encapsulation structure). This can effectively improve the bending properties of the display panel, reduce the possibility of damage to the encapsulation structure in the process of bending the display panel, alleviate problems such as defective OLED light-emitting components, and display The lifespan of OLED flexible displays including panels can be extended. Additionally, in this embodiment of the present application, in addition to encapsulating the OLED light emitting components, the encapsulation structure includes a planarization layer 409, a source S, a drain D, an interlayer dielectric layer 408, an intermetal dielectric layer 406 , and gate G can be further encapsulated. This protects the encapsulated structure. Additionally, because existing structures are used as part of the encapsulation structure, processing steps are eliminated, reducing cost and manufacturing time.

Furthermore, a third metal grid line M3 may further be arranged on the display panel, and the cathode 418 of the OLED light emitting component of each pixel unit is connected to the third metal grid line M3. The material of the third metal grid line M3 may be titanium aluminum alloy, molybdenum, or the like. If the third metal grid line M3 is specifically arranged, please refer to FIG. 23. The third metal grid line M3 may be located on the side of the pixel definition layer 412 that is remote from the thin film transistor layer. Alternatively, the third metal grid line M3 may be placed on the layer structure of the thin film transistor layer (eg, the planarization layer 409, the interlayer insulation layer 408, or the intermetal insulation layer 406).

Please continue to refer to FIG. 23. The display panel in this embodiment of the present application may further include a photo spacer 413 disposed on the pixel definition layer 412, and the photo spacer 413 may be a photo spacer. Placing the photo spacer 413 on the pixel-defining layer 412 ensures that the deposition mask for forming each functional layer of the OLED light-emitting component by vapor deposition contacts the display panel during the process of forming the OLED light-emitting component by vapor deposition. It can be effectively prevented and the product yield of display panels can be improved.

In addition to the above structure, the display panel may further include a second planarization layer 421. The second planarization layer 421 is arranged on the side of the second encapsulation layer 420 remote from the thin film transistor layer. By depositing the second planarization layer 421, a flat processed surface can be provided in subsequent processing. Further, the second planarization layer 421 may cover foreign matter and prevent the foreign matter from entering other film layers disposed on the second planarization layer 421. Further, please continue to refer to FIG. 23. A third encapsulation layer 422 over the entire surface may further be provided on the second planarization layer 421 . In this embodiment, a full-surface encapsulation structure placed on a display panel is referred to as a panel-level encapsulation structure. Accordingly, the display panel has both a pixel-level encapsulation structure and a panel-level encapsulation structure to help improve the water-oxygen barrier effect of the display panel.

The manufacturing process for manufacturing the display panel in this embodiment is similar to the process for manufacturing the display panels shown in FIGS. 9 to 22. Details are not explained here again. The difference between the process for manufacturing the display panel in this embodiment and the process for manufacturing the display panel described above is that in this embodiment, the inorganic layer structure (for example, the interlayer insulating layer 408) of the thin film transistor layer is configured to be exposed. The defined vias need to be provided at locations corresponding to the side encapsulation regions of the pixel definition layer on the thin film transistor layer, so that when the second encapsulation layer 420 is formed, the second encapsulation layer 420 Layer 420 and the inorganic layer structure of the thin film transistor layer (eg, interlayer dielectric layer 408) can be in sealing contact via vias, thereby achieving pixel-level encapsulation of the display panel. One process for manufacturing the display panel in this embodiment includes, for example, the following steps.

Step 001: Manufacture a substrate. For example, the substrate includes a first layer of substrate material, a barrier layer, and a second layer of substrate material stacked in sequence.

Step 002: Forming a thin film transistor layer on a substrate, the thin film transistor layer including one or more of an inorganic material layer, such as a buffer layer, a gate insulator layer, an intermetal insulation layer, and an interlayer insulation layer.

Step 003: Provide a first via and a second via on the thin film transistor layer. The first via is configured to expose the drain of the thin film transistor layer, and the second via extends to any one of the aforementioned inorganic layer structures of the thin film transistor layer.

Step 004: Manufacture the anode. For the specific process of manufacturing the anode, please refer to the process of manufacturing the display panel in the embodiment described above. Details are not explained here again. The anode may contact and be connected to the drain via a first via to implement the seal.

Step 005: Fabricate the pixel definition layer. For the specific process of manufacturing the pixel definition layer, please refer to the process of manufacturing the display panel in the embodiment described above. Details are not explained here again. The formed pixel definition layer has a pixel region and a side encapsulation region. The OLED light emitting component of the pixel unit may be formed within the pixel area. A side encapsulation region is placed opposite the second via and exposes an inorganic layer of the thin film transistor layer, followed by implementing pixel unit encapsulation.

Step 006: Fabricate a third metal grid line connected to the cathodes so as to then electrically connect the cathodes of the OLED light emitting components of all pixel units. For the specific process of manufacturing the third metal grid line, please refer to the process of manufacturing the display panel in the embodiment described above. Details are not explained here again.

Step 007: Manufacture of photo spacers For the specific process of manufacturing photo spacers, please refer to the process of manufacturing the display panel in the above embodiment. Details are not explained here again. By fabricating the photospacer on the pixel-defining layer, it is possible to effectively prevent the mask from contacting the surface of the display panel during the subsequent deposition process to form the OLED light-emitting component.

Step 008: Fabricate the patterned OLED light emitting component. When an OLED light emitting component is formed in a pixel region of the pixel defining layer, the OLED light emitting component may be partially located within the pixel region, or the OLED light emitting component may be completely located within the pixel region. This is not limited in this embodiment of the present application. For the layer structure and specific manufacturing process of the OLED light emitting component, please refer to the manufacturing process of the display panel in the above embodiments. Details are not explained here again.

Step 009: Manufacture the encapsulation structure. First, SiO ₂ , SiNx, or Al ₂ O ₃ can be deposited by CVD, ALD, etc. to form a full surface encapsulation structure layer. The entire surface encapsulation structure layer is then patterned by photoresist coating, exposure, development, etching, photoresist stripping, etc. to form an independent encapsulation structure located above and corresponding to each pixel unit. can be formed. The encapsulation structure of the thin film transistor layer and the inorganic material layer may be in sealing contact through side encapsulation regions of the pixel-defining layer.

Additionally, the pixel defining layer may be provided with grooves and protrusions, and the grooves and protrusions may be transferred to the encapsulation structure. However, a planarization layer may be further formed on the display panel formed after step 009 to facilitate subsequent processing. Further, the planarization layer may cover foreign matter in order to prevent foreign matter from entering other film layers disposed on the planarization layer. Furthermore, a third encapsulation layer over the entire surface can be formed on the planarization layer.

Further, in some embodiments of the present application, the substrate may include a stacked first substrate material layer PI 1, a barrier layer 402, and a second substrate material layer PI 2. The barrier layer 402 generally has an inorganic layer structure made of an inorganic material such as SiO ₂ , SiNx, Al ₂ O ₃ or the like, and can obtain a relatively good water-oxygen barrier effect. Accordingly, in some embodiments of the present application, the inorganic layer structure of the substrate (eg, barrier layer 402) can be used as the first encapsulation layer. In this case, a via may be provided on the substrate at a position corresponding to the side encapsulation region on the thin film transistor layer, and the via may be provided in the inorganic layer structure of the substrate (for example, the barrier layer 402). may be exposed. Pixel unit encapsulation is similar to previous embodiments. Details are not explained here again.

One embodiment of the present application further provides a flexible display. A flexible display may include, but is not limited to, a protective cover, a polarizer, a touch panel, a display panel, a heat dissipation layer, and a protective layer. When a flexible display is specifically arranged, the polarizer is fixed to the protective cover and the touch panel is placed between the polarizer and the display panel. Alternatively, a polarizer may be placed between the touch panel and the display panel after the touch panel is fixed to the protective cover. The display panel may be a display panel of any one of the embodiments described above.

In this embodiment, the thin film transistor layer may include, but is not limited to, a stacked buffer layer, an active layer, a gate insulator layer, an intermetal insulating layer, an interlayer insulating layer, and a first planarization layer. The buffer layer, gate insulator layer, intermetal insulating layer, and interlayer insulating layer generally have an inorganic layer structure made of inorganic materials such as SiO ₂ , SiNx, Al ₂ O _3, etc., and have a relatively good water-oxygen barrier. effect can be obtained. Therefore, in this embodiment, the above-described inorganic layer structure of the thin film transistor layer can be used as the first encapsulation layer.

If the encapsulation structure is specifically arranged, the encapsulation structure used as the second encapsulation layer covers each pixel unit in a one-to-one correspondence. In other words, each pixel unit is encapsulated by one encapsulation structure. The second encapsulation layer makes sealing contact with the inorganic layer structure (e.g., interlayer dielectric layer) of the thin film transistor layer through side encapsulation regions and vias on the thin film transistor layer, such that each pixel unit The thin film transistor layer and the second encapsulation layer are wrapped by an inorganic layer structure (eg, an interlayer dielectric layer) to independently encapsulate each pixel unit, in other words, form a pixel-level encapsulation structure. Note that in this embodiment, the pixel unit includes an OLED light emitting component, a planarization layer, a source, and a drain. Optionally, the pixel unit may further include an interlayer insulating layer. Optionally, the pixel unit may further include an intermetal dielectric layer and a gate.

In a possible embodiment, multiple pixel units (the number of multiple pixel units is less than the total number of pixel units on the display panel) may alternatively be encapsulated by one encapsulation structure. . The encapsulating structure may be of any shape. For example, for a display panel with a fixed single folding direction, all pixel units are aligned in the folding direction to form a column or row encapsulation structure to implement pixel unit encapsulation. may be grouped into columns or rows along the line.

Even if the flexible display in this embodiment is bent in any direction more than 100,000 times, the display panel can still have good encapsulation characteristics. This can avoid water-oxygen infiltration caused by cracks in the encapsulation layer in application scenarios where the flexible display is bent, rolled or freely deformed, thereby avoiding water and oxygen infiltration. The problem of display defects in flexible displays caused by oxygen penetrating through the encapsulation layer and entering the display panel can be avoided. In addition, each pixel unit is encapsulated independently or by grouping, which prevents water and oxygen entering any encapsulation structure from diffusing between adjacent encapsulation structures. Furthermore, it is possible to prevent light emission defects in the entire flexible display.

One embodiment of the present application further provides an electronic device. The electronic device includes an intermediate frame, a rear housing, a printed circuit board, and a flexible display according to any one of the embodiments described above. The intermediate frame may be configured to support a printed circuit board and a flexible display. A flexible display and a printed circuit board are placed on either side of the intermediate frame. The rear housing is located on the side of the printed circuit board remote from the intermediate frame.

The electronic device in this embodiment of the present application may be a foldable device. In the process of folding the flexible display of electronic devices, the risk of cracking the encapsulation layer of the display panel of the flexible display is relatively low, thereby causing water and oxygen to penetrate through the encapsulation layer and enter the display panel. The problem of poor display on flexible displays is avoided.

The foregoing descriptions are only specific implementations of the present application and do not limit the protection scope of the present application. Any variations or substitutions easily figured out by a person skilled in the art within the technical scope disclosed in this application shall fall within the protection scope of this application. Therefore, the protection scope of this application shall be subject to the protection scope of the claims.

101 Display 102 Intermediate frame 103 Rear housing 104 PCB
1041 Components 301 Upper encapsulation layer 3011 First inorganic layer 3012 Second inorganic layer 3013 Flexible sandwich layer 302 Lower encapsulation layer 201 Protective cover 202 Polarizer 203 Touch panel 204 Display panel 205 Heat dissipation layer 206 Protective layer 401 Bearer layer 3021 Barrier Layer 402 Barrier layer 403 Buffer layer 404 Active layer 405 Gate insulator layer 406 Intermetal insulating layer 407 Metal capacitor 408 Interlayer insulating layer 409 First planarization layer 4081 Via 4091 Via PI 1 First substrate material layer PI 2 Second Substrate material layer G Gate M1 First metal grid line M2 Second metal grid line M3 Third metal grid line S Source D Drain 410 First encapsulation layer 411 Anode 412 Pixel definition layer 4121 Pixel region 4122 Side part Encapsulation region 413 Photospacer 414 Hole injection layer 415 Hole transport layer 416 Light emitting layer 417 Electron transport layer 418 Cathode 419 Cap layer 420 Second encapsulation layer 421 Second flattening layer 422 Third encapsulation layer 43 pixel unit.

Claims (19)

A display panel comprising a substrate, a thin film transistor layer, a pixel-defining layer, at least two encapsulating structures, and at least two pixel units, the at least two encapsulating structures including the at least two pixel units. It is configured to encapsulate the unit and
the thin film transistor layer is disposed on the substrate,
the pixel, the pixel-defining layer being disposed on the thin film transistor layer, the pixel-defining layer including a pixel region and a side encapsulation region, the side encapsulation region being encapsulated by the encapsulation structure; the pixel region and the side encapsulation region are through-holes disposed on the pixel-defining layer;
the pixel unit includes an OLED light emitting component, the OLED light emitting component being partially or completely disposed within the pixel area;
The encapsulation structure includes a first encapsulation layer and a second encapsulation layer, the first encapsulation layer being disposed on a side of the OLED light emitting component proximate to the thin film transistor layer; two encapsulation layers are disposed on a side of the OLED light emitting component remote from the thin film transistor layer, the first encapsulation layer and the second encapsulation layer being encapsulated within the side encapsulation region. are in contact with each other,
a photo-spacer is disposed only on the pixel-defining layer disposed outside the area surrounded by the side encapsulation region , and the top of the photo-spacer is higher than the top of the OLED light emitting component;
display panel. The display panel of claim 1, wherein the number of encapsulating structures is the same as the number of pixel units, and each of the encapsulating structures is configured to encapsulate one pixel unit. The first encapsulation layer has a single layer structure consisting of an inorganic material layer or a multilayer structure in which inorganic material layers and organic material layers are alternately laminated,
The second encapsulation layer has a single layer structure consisting of an inorganic material layer, or a multilayer structure in which inorganic material layers and organic material layers are alternately laminated.
A display panel according to claim 1 or 2. The display panel of claim 1, wherein the display panel further comprises a metal line, and the cathodes of all OLED light emitting components are connected via the metal line. the metal line is disposed on a side of the pixel defining layer remote from the thin film transistor layer, or the metal line is disposed on the first encapsulation layer, or the metal line The display panel according to claim 4, wherein is arranged on the layer structure of the thin film transistor layer. A flexible display comprising a protective cover, a polarizer, a touch panel, and the display panel according to any one of claims 1 to 5, wherein the polarizer is fixed to the protective cover, and the touch panel is disposed between the polarizer and the display panel, or the touch panel is fixed to the protective cover, and the polarizer is disposed between the touch panel and the display panel. , flexible display. An electronic device comprising an intermediate frame, a rear housing, a printed circuit board, and a flexible display according to claim 6,
the intermediate frame is configured to support the printed circuit board and the flexible display, the printed circuit board and the flexible display being disposed on opposite sides of the intermediate frame;
The electronic device, wherein the rear housing is located on a side of the printed circuit board remote from the intermediate frame. A method of manufacturing a display panel, the display panel comprising a substrate, a thin film transistor layer, a pixel defining layer, at least two encapsulation structures, and at least two pixel units, the at least two encapsulation structures comprising: A structure is configured to encapsulate the at least two pixel units, the encapsulation structure including a first encapsulation layer and a second encapsulation layer, and the pixel unit comprising an OLED light emitting component. The method comprises:
manufacturing the substrate;
forming the thin film transistor layer on the substrate and providing a first via on the thin film transistor layer, the first via extending to a drain of the thin film transistor layer;
forming a full-surface first encapsulation structure layer on the thin film transistor layer and patterning the full-surface first encapsulation structure layer to obtain at least two independent first encapsulation layers; do, step,
forming a pixel-defining layer and patterning the pixel-defining layer to form a pixel region and a side encapsulation region on each of the first encapsulation layers; a region is used to expose the first encapsulation layer;
forming a photospacer only on the pixel-defining layer disposed outside an area surrounded by the side encapsulation region , the top of the photospacer being higher than the top of the OLED light emitting component; step and
forming the OLED light emitting component in the pixel region, the OLED light emitting component being connected to the drain via the first via;
forming a second encapsulation structure layer on the entire surface corresponding to the thin film transistor layer on the side of the OLED light emitting component remote from the thin film transistor layer to obtain at least two independent second encapsulation layers; patterning the entire surface second encapsulation structure layer, the second encapsulation layer and the first encapsulation layer being in sealing contact within the side encapsulation regions; Steps and steps
manufacturing methods, including The step of forming a first encapsulation layer specifically comprises:
depositing one or more of SiO ₂ , SiNx, or Al ₂ O ₃ on the thin film transistor layer to form the entire surface first encapsulation structure layer;
patterning the entire surface first encapsulation structure layer to obtain the first encapsulation layer, including coating, exposing, developing, etching or peeling; 9. The manufacturing method of claim 8, comprising the steps of: forming an anode on the first encapsulation layer before the pixel defining layer is formed, the anode being connected to the drain via the first via; The manufacturing method according to claim 8 or 9, comprising: The step of forming an anode specifically includes:
sequentially depositing ITO, Ag, and ITO on the first encapsulation layer to form an anode material layer;
patterning the anode material layer to obtain the anode, comprising one or more of coating, exposing, developing, etching, or stripping; The manufacturing method according to claim 10, comprising: 9. The manufacturing method of claim 8, further comprising forming a metal line, the cathode of each OLED light emitting component being connected to the metal line. Specifically, the step of forming the metal wire includes:
After the pixel defining layer is formed, sequentially depositing Ti, Al, and Ti to form a metal layer;
patterning the metal layer to obtain the metal line, comprising one or more of coating, exposing, developing, etching, or stripping; and,
The manufacturing method according to claim 12, comprising: The step of forming a second encapsulation layer specifically comprises:
depositing one or more of SiO ₂ , SiNx, or Al ₂ O ₃ on the pixel-defining layer and the OLED light-emitting component to form the entire surface second encapsulation structure layer; and,
patterning the entire surface second encapsulation structure layer to obtain the second encapsulation layer, including coating, exposing, developing, etching or peeling; a step, including one or more of the steps;
The manufacturing method according to claim 8, comprising: A display panel comprising a substrate, a thin film transistor layer, a pixel-defining layer, at least two encapsulating structures, and at least two pixel units, the at least two encapsulating structures including the at least two pixel units. It is configured to encapsulate the unit and
the thin film transistor layer is disposed on the substrate,
the pixel, the pixel-defining layer being disposed on the thin film transistor layer, the pixel-defining layer including a pixel region and a side encapsulation region, the side encapsulation region being encapsulated by the encapsulation structure; the pixel region and the side encapsulation region are through-holes disposed on the pixel-defining layer;
The thin film transistor layer is made of an inorganic material layer, and a via is provided at a position corresponding to the side encapsulation region, and the via exposes the inorganic material layer.
the pixel unit includes an OLED light emitting component, the OLED light emitting component being partially or completely disposed within the pixel area;
the encapsulation structure is disposed on a side of the OLED light emitting component remote from the thin film transistor layer, the encapsulation structure and the inorganic material layer being in sealing contact within the side encapsulation region; ,
a photo-spacer is disposed only on the pixel-defining layer disposed outside the area surrounded by the side encapsulation region , and the top of the photo-spacer is higher than the top of the OLED light emitting component;
display panel. 16. The display panel of claim 15, wherein the number of encapsulation structures is the same as the number of pixel units, and each of the encapsulation structures is configured to encapsulate one pixel unit. 17. The display panel according to claim 15, wherein the encapsulation structure has a single layer structure including inorganic material layers or a multilayer structure in which inorganic material layers and organic material layers are alternately laminated. 16. The display panel of claim 15, wherein the display panel further comprises a metal line, and the cathodes of all OLED light emitting components are connected via the metal line. 19. The metal line according to claim 18, wherein the metal line is arranged on a side of the pixel defining layer that is spaced apart from the thin film transistor layer, or the metal line is arranged on a layer structure of the thin film transistor layer. display panel.

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