JP6608672B2 - 半導体装置及びその製造方法、リードフレーム及びその製造方法 - Google Patents
半導体装置及びその製造方法、リードフレーム及びその製造方法 Download PDFInfo
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- JP6608672B2 JP6608672B2 JP2015214850A JP2015214850A JP6608672B2 JP 6608672 B2 JP6608672 B2 JP 6608672B2 JP 2015214850 A JP2015214850 A JP 2015214850A JP 2015214850 A JP2015214850 A JP 2015214850A JP 6608672 B2 JP6608672 B2 JP 6608672B2
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- lead frame
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- semiconductor chip
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Classifications
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- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
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Description
[第1の実施の形態に係る半導体装置の構造]
まず、第1の実施の形態に係る半導体装置の構造について説明する。図1は、第1の実施の形態に係る半導体装置を例示する図であり、図1(a)は平面図、図1(b)は図1(a)のA−A線に沿う断面図、図1(c)は図1(b)のBの部分拡大断面図、図1(d)は図1(b)のBの部分拡大平面図である。但し、図1(a)では、便宜上、金属線30及び樹脂部40の図示は省略されている。又、図1(d)では、便宜上、樹脂部40の図示は省略されている。
次に、第1の実施の形態に係る半導体装置の製造方法について説明する。図3〜図9は、第1の実施の形態に係る半導体装置の製造工程を例示する図である。
第2の実施の形態では、第1の実施の形態とは段差面の位置が異なる例を示す。なお、第2の実施の形態において、既に説明した実施の形態と同一構成部についての説明は省略する場合がある。
第3の実施の形態では、リードが2つの段差面を備える例を示す。なお、第3の実施の形態において、既に説明した実施の形態と同一構成部についての説明は省略する場合がある。
第4の実施の形態では、ダイパッドの半導体チップを搭載する面に高密度凹凸部を形成する例を示す。なお、第4の実施の形態において、既に説明した実施の形態と同一構成部についての説明は省略する場合がある。
ここでは、各実施の形態の変形例を示す。各変形例は、上記の何れの実施の形態に適用しても構わない。
まず、図30に示す試験用サンプルを作製した。具体的には、銅からなる平坦な金属板であるリードフレーム材100の上面に、凹部の平面形状が直径0.02mm以上0.060mm以下の円である凹凸部を形成した。そして、凹凸部の表面にめっきを施さないで、凹凸部上に表1に示す作製条件で樹脂カップ140を形成した。なお、6種類のSレシオにおいて、各々6個の試験用サンプルを作製し、6回測定を行った。但し、Sレシオ=1は、凹凸部を形成しない試験用サンプル(比較例:従来品)である。又、Sレシオを求める際の表面積の測定は、3次元測定レーザ顕微鏡(オリンパス社製 LEXT OLS4100)を用いて行った。
銅からなるリードフレーム材100の上面に実施例1と同様の凹凸部を形成し、凹凸部の表面に銀めっきを施し、銀めっきを施した凹凸部上に樹脂カップ140を形成した以外は実施例1と同様にしてカップシェア試験を実施した。なお、銀めっき膜の厚さは約6μmとした。
銅からなるリードフレーム材100の上面に実施例1と同様の凹凸部を形成し、凹凸部の表面にNi/Pd/Auめっきを施し、Ni/Pd/Auめっきを施した凹凸部上に樹脂カップ140を形成した以外は実施例1と同様にしてカップシェア試験を実施した。
銅からなるリードフレームの上面に、凹部の平面形状が直径0.02mm以上0.060mm以下の円であって、Sレシオが1.7以上の凹凸部、すなわち高密度凹凸部を形成することにより、樹脂部と接する部分の表面積が増加する。そのため、アンカー効果が生じ、リードフレームと樹脂部との密着性を向上することができる。
(付記1) 柱状の端子部を備えたリードフレームと、
前記リードフレームに搭載された半導体チップと、
前記リードフレーム及び前記半導体チップを被覆する封止樹脂と、を有し、
前記端子部の一方の端面側は前記封止樹脂に被覆され、他方の端面側は前記封止樹脂から突出し、
前記一方の端面に、凹凸部が形成されている半導体装置。
(付記2) 板材の一方の面に端子となる柱状の突起部を備え、
前記板材の一方の面の前記突起部の周囲に、前記一方の面が突出した段差面が形成され、
前記突起部及び前記段差面が形成された領域は、封止樹脂による被覆領域であるリードフレーム。
(付記3) 板材の一方の面に端子となる柱状の突起部を備え、
前記突起部の上端面に、凹凸部が形成され、
前記突起部が形成された領域は、封止樹脂による被覆領域であるリードフレーム。
10、10S リードフレーム
11 ダイパッド
11g、12 リード
12d、12e 段差面
12T 突起部
12x、12y 段差部
13、14、15 金属膜
17 接着材
18 高密度凹凸部
20 半導体チップ
30 金属線
40 樹脂部
50 バンプ
300、310、320、330 レジスト
300x、300y、320x、330x、330y 開口部
Claims (14)
- 柱状の端子部を備えたリードフレームと、
前記リードフレームに搭載された半導体チップと、
前記リードフレーム及び前記半導体チップを被覆する封止樹脂と、を有し、
前記端子部の一方の端面側は前記封止樹脂に被覆され、他方の端面側は前記封止樹脂から突出し、
前記端子部の側面に、前記一方の端面側に向いた段差面が形成され、
前記段差面には凹凸部が形成され、
前記段差面は前記封止樹脂に被覆され、
前記凹凸部における凹部の平面形状は直径0.02mm以上0.060mm以下の円、又は、直径0.02mm以上0.060mm以下の外接円に接する多角形であり、
表面積がS 0 の平坦面に凹凸部を形成し、凹凸部の表面積がSであった場合のS 0 とSとの比率S/S 0 が1.7以上である半導体装置。 - 柱状の端子部を備えたリードフレームと、
前記リードフレームに搭載された半導体チップと、
前記リードフレーム及び前記半導体チップを被覆する封止樹脂と、を有し、
前記端子部の一方の端面側は前記封止樹脂に被覆され、他方の端面側は前記封止樹脂から突出し、
前記端子部の側面に、前記一方の端面側に向いた段差面が形成され、
前記段差面には凹凸部が形成され、
前記段差面の外周側に第2の段差面が階段状に形成され、
前記段差面及び前記第2の段差面は、前記封止樹脂に被覆されている半導体装置。 - 前記凹凸部における凹部の平面形状は直径0.02mm以上0.060mm以下の円、又は、直径0.02mm以上0.060mm以下の外接円に接する多角形である請求項2に記載の半導体装置。
- 表面積がS0の平坦面に凹凸部を形成し、凹凸部の表面積がSであった場合のS0とSとの比率S/S0が1.7以上である請求項3に記載の半導体装置。
- 前記端子部において、前記段差面及び前記段差面よりも前記他方の端面側の側面の一部が前記封止樹脂に被覆されている請求項1乃至4の何れか一項に記載の半導体装置。
- 前記リードフレームは、半導体チップが搭載されるチップ搭載部を有し、
前記チップ搭載部の前記半導体チップを搭載する面に、前記凹凸部が形成されている請求項1乃至5の何れか一項に記載の半導体装置。 - 板材の一方の面に接続端子となる柱状の突起部を備え、
前記板材の一方の面の前記突起部の周囲には凹凸部が形成され、
前記突起部及び前記凹凸部が形成された領域は、封止樹脂による被覆領域であり、
前記凹凸部における凹部の平面形状は直径0.02mm以上0.060mm以下の円、又は、直径0.02mm以上0.060mm以下の外接円に接する多角形であり、
表面積がS 0 の平坦面に凹凸部を形成し、凹凸部の表面積がSであった場合のS 0 とSとの比率S/S 0 が1.7以上であるリードフレーム。 - 前記突起部の周囲に、前記一方の面が突出した段差面が形成され、
前記段差面に前記凹凸部が形成されている請求項7に記載のリードフレーム。 - 前記板材の他方の面に金属膜が形成され、
前記金属膜は、前記板材の他方の面の、前記突起部及び前記段差面と平面視で重複する領域を含むように形成されている請求項8に記載のリードフレーム。 - 前記一方の面は、半導体チップが搭載されるチップ搭載領域を有し、
前記チップ搭載領域に、前記凹凸部が形成されている請求項7乃至9の何れか一項に記載のリードフレーム。 - 金属製の板材をエッチングして、前記板材の一方の面に柱状の突起部を形成すると共に、前記板材の一方の面の前記突起部の周囲に凹凸部を形成する工程を有し、
前記凹凸部が形成される領域は、封止樹脂による被覆領域であるリードフレームの製造方法。 - 前記凹凸部における凹部の平面形状は直径0.02mm以上0.060mm以下の円、又は、直径0.02mm以上0.060mm以下の外接円に接する多角形であり、
表面積がS0の平坦面に凹凸部を形成し、凹凸部の表面積がSであった場合のS0とSとの比率S/S0が1.7以上である請求項11に記載のリードフレームの製造方法。 - 前記板材の他方の面に金属膜を形成する工程を有し、
前記金属膜は、前記板材の他方の面の、前記突起部及び前記凹凸部の形成領域と平面視で重複する領域を含むように形成される請求項11又は12に記載のリードフレームの製造方法。 - 一方の面上に形成された柱状の突起部と、前記突起部の周囲の一方の面上に形成された凹凸部と、他方の面の前記突起部及び前記凹凸部と重複する領域に形成された金属膜と、を有するリードフレームを用意する工程と、
前記リードフレームの一方の面上に、前記突起部と電気的に接続して半導体チップを搭載する工程と、
前記リードフレームの一方の面上に、前記突起部及び前記半導体チップを被覆する封止樹脂を形成する工程と、
前記金属膜をマスクとして、前記リードフレームの他方の面側から前記リードフレームをエッチングし、一方の端面側が前記封止樹脂に被覆され、他方の端面側が前記封止樹脂から突出した柱状の接続端子を形成する工程と、を有する半導体装置の製造方法。
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