JP6216157B2 - 電子部品装置及びその製造方法 - Google Patents
電子部品装置及びその製造方法 Download PDFInfo
- Publication number
- JP6216157B2 JP6216157B2 JP2013110634A JP2013110634A JP6216157B2 JP 6216157 B2 JP6216157 B2 JP 6216157B2 JP 2013110634 A JP2013110634 A JP 2013110634A JP 2013110634 A JP2013110634 A JP 2013110634A JP 6216157 B2 JP6216157 B2 JP 6216157B2
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- JP
- Japan
- Prior art keywords
- electronic component
- hole
- connection pad
- insulating layer
- connection
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
- H01L2924/1815—Shape
- H01L2924/1816—Exposing the passive side of the semiconductor or solid-state body
- H01L2924/18161—Exposing the passive side of the semiconductor or solid-state body of a flip chip
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/35—Mechanical effects
- H01L2924/351—Thermal stress
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Geometry (AREA)
- Manufacturing & Machinery (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Description
金属接合材60は、接続ホールHの底から接続ホールHの高さの途中まで形成される。図10の例では、接続ホールHの高さの半分の位置まで金属接合材60が形成される。
(その他の実施の形態)
図17に示す第1変形例の電子部品装置1aのように、枠部材30の開口部30a内に複数の半導体素子40を横方向に並べて実装してもよい。同一の半導体素子40を横方向に並べてもよいし、CPUとメモリとの組み合わせなどのように、異なる種類の半導体素子を横方向に並べてもよい。また、半導体素子とキャパシタなどの受動素子を横方向に並べて実装してもよい。
Claims (8)
- 中央部に部品接続用パッドを備え、前記中央部の周囲に外部接続用パッドを備えた一層からなる配線層と、
前記配線層の上面と側面とを被覆する絶縁層であって、前記配線層の下面と前記絶縁層の下面とが面一になって形成された一層からなる前記絶縁層と、
前記絶縁層に形成され、前記部品接続用パッドの上面を露出する第1ホールと、
前記絶縁層に形成され、前記外部接続用パッドの上面を露出する第2ホールと、
前記絶縁層の上に配置され、前記部品接続用パッドが配置された中央部の領域に開口部が設けられ、前記外部接続用パッド上に前記第2ホールに連通する第3ホールが設けられた枠部材と、
前記第2ホールと前記第3ホールとにより構築される接続ホールと、
前記枠部材の開口部内に配置され、前記部品接続用パッドに接続された電子部品と、
前記枠部材の開口部に形成され、前記電子部品を封止する封止樹脂と、
前記接続ホール内の前記外部接続用パッドの上に形成された金属めっきからなる金属接合材と、
前記外部接続用パッドの下面に接して形成された接続端子と
を有し、
前記金属接合材は、前記接続ホールの高さの途中まで形成され、前記接続ホールの上部側が空洞になっていることを特徴とする電子部品装置。 - 前記金属接合材は、錫、錫/銀系はんだ、又は錫/銀/銅系はんだであることを特徴とする請求項1に記載の電子部品装置。
- 前記電子部品が前記封止樹脂から露出していることを特徴とする請求項1又は2に記載の電子部品装置。
- 中央部に部品接続用パッドを備え、前記中央部の周囲に外部接続用パッドを備えた一層からなる配線層と、
前記配線層の上面と側面とを被覆する絶縁層であって、前記配線層の下面と前記絶縁層の下面とが面一になって形成された一層からなる前記絶縁層と、
前記絶縁層に形成され、前記部品接続用パッドの上面を露出する第1ホールと、
前記絶縁層に形成され、前記外部接続用パッドの上面を露出する第2ホールと、
前記絶縁層の上に配置され、前記部品接続用パッドが配置された中央部の領域に開口部が設けられ、前記外部接続用パッド上に前記第2ホールに連通する第3ホールが設けられた枠部材と、
前記第2ホールと前記第3ホールとにより構築される接続ホールと、
前記枠部材の開口部内に配置され、前記部品接続用パッドに接続された電子部品と、
前記枠部材の開口部に形成され、前記電子部品を封止する封止樹脂と、
前記接続ホール内の前記外部接続用パッドの上に形成された金属めっきからなる金属接合材と、
前記外部接続用パッドの下面に接して形成された接続端子と
を有する電子部品装置が複数個で積層されて構築され、
下側の前記電子部品装置の金属接合材に上側の前記電子部品装置の接続端子が埋め込まれて接合されており、
積層された複数の前記電子部品装置の最上に配置された前記電子部品装置において、前記金属接合材は、前記接続ホールの高さの途中まで形成され、前記接続ホールの上部側が空洞になっていることを特徴とする積層型の電子部品装置。 - 金属板の一方の面に、中央部に部品接続用パッドを備え、前記中央部の周囲に外部接続用パッドを備えた一層からなる配線層を形成すると共に、前記金属板の他方の面に、前記外部接続用パッドに対応する位置に電極パッドを形成する工程であって、前記配線層の上面及び側面が露出した状態で形成され、
前記配線層の上面と側面とを被覆する一層からなる絶縁層を形成する工程と、
前記絶縁層の上に、前記部品接続用パッドが配置された中央部の領域に開口部が設けられた枠部材を形成する工程と、
前記外部接続用パッドの上に、前記絶縁層のホールと前記枠部材のホールとにより構築される接続ホールを形成すると共に、前記部品接続用パッド上の前記絶縁層にコンタクトホールを形成する工程と、
前記コンタクトホールを通して前記部品接続用パッドに電子部品の接続電極を接続する工程と、
前記枠部材の開口部に、前記電子部品を封止する封止樹脂を形成する工程と、
前記接続ホールの高さの途中まで金属めっきからなる金属接合材を形成して前記接続ホールの上部側に空洞を残すと共に、前記電極パッドの上にマスク金属層を形成する工程と、
前記マスク金属層をマスクにして前記金属板をエッチングして、前記外部接続用パッドに接する接続端子を形成する工程と
を有することを特徴とする電子部品装置の製造方法。 - 前記封止樹脂を形成する工程の後に、
前記封止樹脂、前記電子部品及び前記枠部材を削ることにより、前記電子部品を露出させる工程を有することを特徴とする請求項5に記載の電子部品装置の製造方法。 - 前記金属接合材は、錫、錫/銀系はんだ、又は錫/銀/銅系はんだであることを特徴とする請求項5又は6に記載の電子部品装置の製造方法。
- 金属板の一方の面に、中央部に部品接続用パッドを備え、前記中央部の周囲に外部接続用パッドを備えた一層からなる配線層を形成すると共に、前記金属板の他方の面に、前記外部接続用パッドに対応する位置に電極パッドを形成する工程であって、前記配線層の上面及び側面が露出した状態で形成され、
前記配線層の上面と側面とを被覆する一層からなる絶縁層を形成する工程と、
前記絶縁層の上に、前記部品接続用パッドが配置された中央部の領域に開口部が設けられた枠部材を形成する工程と、
前記外部接続用パッドの上に、前記絶縁層のホールと前記枠部材のホールとにより構築される接続ホールを形成すると共に、前記部品接続用パッド上の前記絶縁層にコンタクトホールを形成する工程と、
前記コンタクトホールを通して前記部品接続用パッドに電子部品の接続電極を接続する工程と、
前記枠部材の開口部に、前記電子部品を封止する封止樹脂を形成する工程と、
前記接続ホールの高さの途中まで金属めっきからなる金属接合材を形成して前記接続ホールの上部側に空洞を残すと共に、前記電極パッドの上にマスク金属層を形成する工程と、
前記マスク金属層をマスクにして前記金属板をエッチングして、前記外部接続用パッドに接する接続端子を形成する工程と
を含む製造方法により電子部品装置を複数個用意し、
下側の前記電子部品装置の金属接合材に上側の前記電子部品装置の接続端子を埋め込んで接合し、
積層された複数の前記電子部品装置の最上に配置された前記電子部品装置において、前記接続ホールの上部側に前記空洞が残されることを特徴とする積層型の電子部品装置の製造方法。
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