JP6171841B2 - Semiconductor device - Google Patents

Description

  The technique described in this specification relates to a semiconductor device including a support substrate, a semiconductor element, and a sealing resin.

  Patent Document 1 discloses a semiconductor device including a box-shaped support, a semiconductor element placed on the bottom surface of the support, and a sealing resin that fills the support and covers the semiconductor element. ing. In this semiconductor device, when exposed to a high temperature, stress is applied to the periphery of the semiconductor element due to the difference in thermal expansion coefficient between the sealing resin, the semiconductor element, and the support. This stress causes the semiconductor element and the support to peel off. In order to relieve this stress, in Patent Document 1, a through-hole portion that penetrates the bottom surface of the support around the region where the semiconductor element is placed is provided. The through hole portion is used as a degassing port or a sealing resin injection port when the sealing resin is injected into the supporting body while deaeration inside the supporting body, and the through hole portion is filled with the sealing resin. .

JP 2008-300462 A

  In a semiconductor device in which a semiconductor element is mounted on a support substrate and the upper surface of the support substrate and the semiconductor element are covered with a sealing resin, the heat generation of the semiconductor element is caused by exposing the lower surface of the support substrate from the sealing resin. Is efficiently radiated from the support substrate. When forming a slit in such a support substrate, if the sealing resin is filled in the slit as in Patent Document 1, the heat transfer path of the support substrate is hindered by the sealing resin, and the heat dissipation of the support substrate May decrease.

  A semiconductor device disclosed in this specification includes a support substrate, a semiconductor element mounted on the upper surface of the support substrate, and a sealing resin that covers the upper surface of the support substrate and the semiconductor element. In this semiconductor device, the lower surface of the support substrate is exposed from the sealing resin, and a slit extending from the lower surface of the support substrate through the support substrate and extending upward into the sealing resin is provided. A metal film is provided on the support substrate.

  In the above semiconductor device, a slit is provided that extends from the lower surface of the support substrate through the support substrate and extends upward into the sealing resin. As a result, stress is suppressed from being applied to the periphery of the semiconductor element when exposed to a high temperature. Further, in the above semiconductor device, a metal film is provided on the support substrate portion of the inner wall of the slit. Since the metal film is provided, when the semiconductor device is mounted on the mounting substrate by soldering or the like, the solder is sucked into the slit and enters the slit. Due to the presence of solder in the slit, it is possible to suppress a decrease in heat dissipation of the support substrate as compared with a case where the slit is hollow or a case where the slit is filled with a sealing resin. That is, according to the semiconductor device described above, it is possible to relieve stress when the semiconductor device is exposed to a high temperature and to ensure heat dissipation of the support substrate.

  In the semiconductor device described above, it is preferable that the upper end of the slit extends above the upper surface of the semiconductor element. Moreover, the stress relaxation material may be filled in the sealing resin portion of the slit.

It is a top view of the semiconductor device concerning an example. It is the II-II sectional view taken on the line of FIG. It is a figure explaining an example of the manufacturing process of the semiconductor device which concerns on an Example. It is a figure which shows the state which mounted the semiconductor device which concerns on an Example on the mounting board | substrate.

  As shown in FIGS. 1 and 2, the semiconductor device 10 according to the present embodiment includes a support substrate 100, a semiconductor element 110, a plurality of leads 141 and 142, and a sealing resin 150. This is a package type semiconductor device. The semiconductor element 110 is placed on the upper surface (the surface in the positive z-axis direction) of the support substrate 100 and fixed to the upper surface of the support substrate 100 via a conventionally known metal paste 120 such as a silver paste. The sealing resin 150 covers the upper surface of the support substrate 100 and the upper surface and side surfaces of the semiconductor element 110. The support substrate 100 is a heat sink, and the lower surface (surface in the negative direction of the z axis) is exposed from the sealing resin 150. The material of the sealing resin 150 is not particularly limited, and a conventionally known sealing resin such as polyimide can be used. The leads 141 and 142 extend from the inside of the sealing resin 150 to the outside. Inside the sealing resin, electrode pads provided on the surface of the semiconductor element 110 and the leads 141 and 142 are connected by wires 131 and 132, respectively.

  The semiconductor device 10 is provided with slits 101 and 102 that extend from the lower surface of the support substrate 100 through the support substrate 100 and extend upward into the sealing resin 150. The slits 101 and 102 extend to both end portions of the sealing resin 150 in the y direction. The slit 101 is provided between the lead 141 and the semiconductor element 110. The slit 102 is provided between the lead 142 and the semiconductor element 110. The support substrate 100 is divided by the slits 101 and 102 into a central portion 100b where the semiconductor element 110 is placed and side portions 100a and 100c that are closer to the leads 141 and 142 than the central portion 100b, respectively.

  The slit 101 includes a portion 101 a formed in the sealing resin 150 and a portion 101 b formed in the support substrate 100. The upper end 101 c of the slit 101 extends to a position above the upper surface of the semiconductor element 110 and below the wire 131. The slit 102 includes a portion 102 a formed in the sealing resin 150 and a portion 102 b formed in the support substrate 100. The upper end 102 c of the slit 102 extends to a position above the upper surface of the semiconductor element 110 and below the wire 132. Metal films 103 and 104 are provided on the inner wall surfaces of the portions 101b and 102b, respectively. The metal films 103 and 104 are plating films, and are not particularly limited. However, a material having high affinity with solder such as tin, gold, and silver can be suitably used.

  As a manufacturing method of the semiconductor device 10, a conventionally known die bonding process, wire bonding process, and molding process can be used. In the die bonding process, the semiconductor element 110 is fixed to the upper surface of the support substrate 100 with the metal paste 120. In the wire bonding process, the semiconductor element 110 and the leads 141 and 142 are connected via the wires 131 and 132, respectively. In the molding process, the upper surface of the support substrate 100 and the semiconductor element 110 are covered with the sealing resin 150. For example, after performing a die bonding step, a wire bonding step, and a molding step by a conventionally known method, slits 101 and 102 are formed by cutting the lower surface side of the support substrate 100, and the metal film 103 is further formed. , 104 are formed by plating, so that the semiconductor device 10 can be manufactured. When the metal films 103 and 104 are formed by plating, the metal films 103 and 104 are not formed on the sealing resin 150. Therefore, the metal films 103 and 104 may be selectively formed on the inner walls of the portions 101b and 102b. it can.

  As shown in FIG. 3, when a plurality of semiconductor devices 10 are formed on the lead frame 90, after the molding process, the semiconductor devices 10 adjacent to each other in the y direction are cut once to form slits 101 or A slit 102 can also be formed. The slits 101 and 102 can be easily formed using a package dicing process in which a plurality of semiconductor devices 10 are separated from each other by dicing. Note that the step of forming the metal films 103 and 104 can be performed simultaneously with the step of plating the exterior after the package dicing step.

  When the slits 101 and 102 are formed by the method shown in FIG. 3, both ends of the slits 101 and 102 in the y direction extend to both ends of the sealing resin 150 in the y direction.

  When the semiconductor device 10 is exposed to a high temperature, stress is applied around the semiconductor element 110 due to the difference in thermal expansion coefficient between the sealing resin 150, the semiconductor element 110, and the support substrate 100. This stress can cause the support substrate 100 and the semiconductor element 110 to peel off. In the semiconductor device 10, the stress is relieved by the slits 101 and 102 provided around the semiconductor element 110. In particular, since the slits 101 and 102 have their upper ends 101c and 102c extending upward from the upper surface of the semiconductor element 110, the portions 101a and 102a are present on the sides of the semiconductor element 110 in the x direction, which is more effective. In addition, the stress applied around the semiconductor element 110 can be relaxed.

  FIG. 4 shows a state in which the semiconductor device 10 is mounted on the upper surface of the mounting substrate 20 by soldering. At the time of mounting, the upper surface of the mounting substrate 20 and the lower surface of the support substrate 100 are joined and fixed via the solder 30. The upper surface of the mounting substrate 20 and the lower surfaces of the tips in the negative direction and the positive direction of the leads 141 and 142 are joined and fixed via solders 241 and 242, respectively. In the semiconductor device 10, metal films 103 and 104 are provided on the inner walls of the portions 101b and 102b of the slits 101 and 102, respectively. Since the metal films 103 and 104 are made of a material having a high affinity with the solder 30, when the semiconductor device 10 is mounted on the mounting substrate 20, a part of the solder 30 is sucked into the slits 101 and 102. ,invade. As a result, the solder 101 sucked up from the solder 30 is filled in the portion 101b of the slit 101, and the solder 302 sucked up from the solder 30 is filled in the portion 102b of the slit 102.

  Most of the heat generated in the semiconductor device 10 is radiated through the support substrate 100. When the insides of the slits 101 and 102 are hollow as before the semiconductor device 10 is mounted, or when the slits 101 and 102 are filled with sealing resin as in Patent Document 1, the side portions 100a and 100c from the central portion 100b. The heat transfer path to is obstructed by the slits 101 and 102. The heat generated by the semiconductor device 10 is dissipated through the central portion 100b, and the side portions 100a and 100c hardly contribute to the heat dissipation, resulting in a decrease in heat dissipation. On the other hand, after the semiconductor device 10 is mounted on the mounting substrate 20, the solders 301 and 302 enter the slits 101 and 102, so that the side part 100 a is inserted from the central part 100 b through the solders 301 and 302. , 100c. Heat is dissipated in the entire support substrate 100, and heat dissipation of the support substrate 100 can be ensured.

  Further, the solders 301 and 302 do not enter the portion 101a of the slit 101 and the portion 102a of the slit 102 where the metal films 103 and 104 are not formed. For this reason, when the semiconductor device 10 after mounting is exposed to a high temperature, the stress is relieved by the portions 101a and 102a.

  In the above embodiment, the upper ends 101c and 102c of the slits 101 and 102 extend upward from the upper surface of the semiconductor element 110, but the present invention is not limited to this. The upper ends 101c and 102c are preferably included within a range of ± 200 μm in the z direction and 500 μm in the x direction from the closest point on the upper surface of the semiconductor element 110. Specifically, the upper end 102c is illustrated as an example. The upper end of the upper end of the semiconductor element 110 in FIG. It is preferable that 102c is located.

  In the above embodiment, the case where the support substrate 100 is a heat sink has been described as an example. However, the present invention is not limited to this. The support substrate may be an exposed die pad, for example.

  Further, both end portions in the y direction of the slits 101 and 102 do not have to extend to both ends of the sealing resin 150. The sealing resin 150 may have both end portions in the y direction, or may be partially connected to the central portion 100b and the side portions 100a, 100c, for example, because the support substrate 100 has both end portions in the y direction. May be. In the case where the central portion 100b and the side portions 100a and 100c are partially connected, a support substrate in which through holes are provided in advance in the portions to become the slits 101 and 102, a die bonding step, a wire bonding step, A molding process or the like may be performed. Furthermore, a slit can be formed by using the metal mold | die in which the projection part match | combined with the shape of a slit is used in a molding process.

  Further, the stress relaxation material may be filled in the portion 101a of the slit 101 and the portion 102a of the slit 102. As the stress relaxation material, for example, a low elastic material such as an elastomer can be suitably used.

  As mentioned above, although the Example of this invention was described in detail, these are only illustrations and do not limit a claim. The technology described in the claims includes various modifications and changes of the specific examples illustrated above.

  The technical elements described in this specification or the drawings exhibit technical usefulness alone or in various combinations, and are not limited to the combinations described in the claims at the time of filing. In addition, the technology exemplified in this specification or the drawings can achieve a plurality of objects at the same time, and has technical usefulness by achieving one of the objects.

10: Semiconductor device 20: Mounting substrate 90: Lead frame 100 Support substrate 100a, 100c: Side portion 100b: Central portion 101, 102: Slit 101a, 101b, 102a, 102b: Part 101c, 102c: Upper end 103, 104: Metal Film 110: Semiconductor element 120: Metal paste 131, 132: Wire 141, 142: Lead 150: Sealing resin

Claims (3)

A support substrate;
A semiconductor element mounted on the upper surface of the support substrate;
A sealing resin that covers the upper surface of the support substrate and the semiconductor element ;
A lead connected to the upper surface of the semiconductor element and extending laterally from the sealing resin;
A semiconductor device comprising:
The lower surface of the support substrate is exposed from the sealing resin,
A slit extending from the lower surface of the support substrate through the support substrate and extending upward into the sealing resin is provided,
A semiconductor device in which a metal film is provided on a support substrate portion of an inner wall of a slit.   The semiconductor device according to claim 1, wherein an upper end of the slit extends to a position higher than an upper surface of the semiconductor element.   The semiconductor device according to claim 1, wherein a stress relaxation material is filled in a sealing resin portion of the slit.

Images