JP4823605B2 - Exposure apparatus, exposure method, and pattern manufacturing system - Google Patents

Description

  The present invention relates to an exposure apparatus that exposes a circuit pattern, an exposure method, and a pattern manufacturing system, and more particularly, to an exposure apparatus that inspects a circuit pattern formed on a substrate in a multilayer printed circuit board manufacturing process, an exposure method, and The present invention relates to a pattern manufacturing system.

  In order to operate an electronic circuit, a wiring board on which an element is mounted is used. The wiring pattern formed on this wiring board tends to be miniaturized and densified, and a highly accurate wiring forming technique is required.

  Recently, the miniaturization of mobile phones and digital cameras has progressed, and various components have been miniaturized and improved in performance, and multilayer substrates in which a plurality of substrates are laminated are widely used. In such multilayer substrates, In addition to the wiring pattern formed on the surface of each layer, wiring patterns (via holes, lead insertion holes for discrete components, etc.) that connect the wiring patterns of each layer stacked are also formed. However, higher accuracy is required.

  Generally, the wiring pattern of a wiring board is formed by the following processes.

  That is, the etching resist (for example, dry film type, liquid type, electrodeposition type, etc.) is formed on the surface of the pre-exposure substrate, and then exposed through an exposure mask on which a desired pattern is drawn. Bake the exposure pattern on the resist.

  Next, after forming a desired etching resist pattern on the pre-exposure substrate by development processing, the conductor layer exposed by the etching processing is removed by etching, and then the etching resist pattern is peeled off to obtain a desired The wiring pattern is obtained.

  However, the higher the wiring pattern density, the higher the probability that defects (pattern chipping, pattern thickening, protrusions, etc.) will occur in each step of exposure, development, and etching.

  For this reason, in the manufacturing process of a printed wiring board, a defective part of a wiring pattern is detected by visual inspection or an inspection device (AOI: Automatic Optical Inspection) (see, for example, Patent Document 1 and Patent Document 2).

  By the way, since a printed wiring board used for a mobile phone or the like is small in size, it is usually manufactured in a plurality. For example, a printed wiring board in which a plurality of pieces are arranged on a substrate called a work is manufactured using a printed wiring board in a mounting unit as one piece. In this case, the detection of the defective portion is performed in units of pieces that are the final product.

  Patent Document 1 describes a method of identifying a defective portion by marking the portion by scratching the portion with a cutter or applying ink when a defect is detected.

Patent Document 2 describes a method of stacking a sheet having a sheet size in which a defect is detected and replacing it with a non-defective sheet size substrate.
JP 2002-329813 A JP 2003-8210 A

  However, in the case of a multilayer substrate, even if a defect is detected in the inner layer substrate and marking is made at that position, the defective portion of the inner layer cannot be identified after the outer layer substrate is laminated. In addition, as described in Patent Document 1, marking is performed by scratching a defective portion with a cutter or the like, or as described in Patent Document 2, a defective substrate is cut and replaced with a non-defective product. In such a case, chips and the like may remain on the substrate and cause defects.

  In view of the above circumstances, an object of the present invention is to provide an exposure apparatus, an exposure method, and a pattern manufacturing system that can easily identify a defective portion in a multilayer substrate.

In order to achieve the above object, an exposure apparatus according to claim 1 is attached to an outer layer substrate and an inner layer substrate constituting a multilayer substrate based on exposure data for forming a target formation pattern through development and etching. In an exposure apparatus that directly draws and exposes a resist on a material to be etched with a predetermined exposure amount, the outer layer substrate and the inner layer substrate include a plurality of unit substrates for forming a formation pattern. An input means for inputting defect information including information related to the position of a defective unit substrate, which is output from an inspection unit that inspects each unit substrate for defects in the formation pattern formed on the unit substrate, and a defective portion can be identified. as, on the basis of the defect information, the position for forming the pattern of the or the failure of a unit substrate as the solid pattern is formed at a position of the unit substrate of the defect As not performed, characterized by comprising a changing means for changing at least one of the resist pattern of the solder resist to be applied to the exposure data and the outer substrate for exposing the outer layer substrate.

  Here, the “material to be etched” refers to a material that is etched by an etching solution, such as a copper foil attached on a substrate.

  According to the present invention, it is a result of inspecting an inner layer substrate in which a formation pattern is formed on each unit substrate by exposure, development, and etching, and defect information including information on the position of a defective unit substrate is input.

When exposing the outer layer substrate among the substrates constituting the multilayer substrate , a solid pattern is formed at the position of the defective unit substrate based on the defect information so that the defective portion can be identified by the changing means. as or so that the position for forming the pattern of the unit substrate defects are not formed, to change at least one of the resist pattern of the solder resist to be applied to the exposure data and the outer layer substrate for exposing the outer layer substrate. Then, or outer layer substrate is exposed by the exposure data after the change, you or solder resist is applied to the outer layer substrate with the resist pattern after the change.

  This makes it possible to easily recognize the presence of a defective unit substrate on the inner layer substrate and the position thereof, and to prevent components from being erroneously mounted on the defective substrate.

  According to a second aspect of the present invention, the information processing apparatus may further include providing means for assigning an identification code to the inner layer substrate, and the defect information may include an identification code of an inner layer substrate including a defective unit substrate. Thus, by attaching an identification code to the inner layer substrate, it is possible to easily identify the inner layer substrate having a defective unit substrate. The applying unit may be an exposure unit that exposes the identification code so that the identification code is formed by exposure, development, and etching in the same manner as the pattern formed on the substrate. A means for making a corresponding notch or a means for attaching an identification code by printing may be used.

The exposure method according to claim 3 is based on the exposure data for forming the target formation pattern through development and etching, and the resist on the etching target material attached to the outer layer substrate and the inner layer substrate constituting the multilayer substrate, In the exposure method in which direct exposure is performed with a predetermined exposure amount, the outer layer substrate and the inner layer substrate are provided with a plurality of unit substrates for forming a formation pattern, and the formation pattern formed on the unit substrate of the inner layer substrate output from the inspecting means for inspecting the defective units each substrate receives the defect information including information about the position of the defective unit substrate, so that the defective portion is distinguishable, on the basis of the defect information, the The outer substrate is exposed so that a solid pattern is formed at the position of the defective unit substrate or a formation pattern is not formed at the position of the defective unit substrate. And changes at least one of the resist pattern of the solder resist to be applied to the exposure data and the outer substrate to.

  According to the present invention, it is possible to easily recognize the presence of a defective unit substrate on the inner layer substrate and its position, and to prevent components from being erroneously mounted on the defective substrate.

5. The pattern manufacturing system according to claim 4 , wherein a predetermined exposure amount is applied to an outer layer substrate constituting the multilayer substrate and a resist on an etching target material attached to the inner layer substrate based on exposure data for forming a target formation pattern. A pattern manufacturing system comprising: an exposure unit that directly draws and exposes the resist; a developing unit that develops the exposed resist to form a resist pattern; and an etching unit that forms a formation pattern by etching the material to be etched The outer layer substrate and the inner layer substrate are formed by arranging a plurality of unit substrates for forming a formation pattern, and the unit substrate of the inner layer substrate is inspected for defects in the formation pattern, Inspecting means for generating defect information including information on the position of the defective unit substrate and the defect information so that the defective part can be identified. Zui and such that said formed pattern or the position of the defective unit substrates as solid pattern is formed is not formed at the position of the defective unit substrate, said exposure data and said for exposing the outer substrate And changing means for changing at least one of the resist patterns of the solder resist applied to the outer layer substrate.

  According to the present invention, it is possible to easily recognize the presence of a defective unit substrate on the inner layer substrate and its position, and to prevent components from being erroneously mounted on the defective substrate.

According to a fifth aspect of the present invention, when the inspection unit inspects the outer layer substrate, whether or not there is a defective unit substrate in the inner layer substrate corresponding to the outer layer substrate is determined based on the defect information. If there is a defective unit substrate, only the unit substrates other than the unit substrate may be inspected. Thereby, useless inspection can be eliminated and inspection time can be shortened.

  According to the present invention, there is an effect that a defective portion in a multilayer substrate can be easily identified.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

  FIG. 1 is a diagram showing a schematic configuration of a pattern manufacturing system 1, and a case where a circuit pattern which is an example of a formation pattern is manufactured by the pattern manufacturing system 1 will be described.

  When a circuit pattern is formed on a substrate, first, a copper foil as a circuit forming material is stuck on the substrate in the copper foil sticking step A, and the upper surface of the copper foil stuck in the leveling step B is machined. Surface treatment is performed by polishing or chemical polishing, and in the lamination step C, a resist (resist material) is laminated on the surface of the surface-adjusted copper foil.

  Next, the pattern manufacturing system 1 of the present invention exposes the resist applied to the substrate, develops the exposed resist to form a resist pattern, and etches the copper foil on the substrate on which the resist pattern is formed. To form a formation pattern.

  The pattern manufacturing system 1 includes a direct drawing type exposure apparatus (exposure unit) 4 that exposes a pattern to a laminated resist material, a developing unit (development unit) 5 that develops the exposed resist to form a resist pattern, An etching apparatus (etching unit) 6 is provided that forms a formation pattern by etching a copper foil on a substrate on which a resist pattern is formed.

  The etching device 6 has an image recognition device (image recognition means) such as an optical inspection machine (AOI) using a CCD camera so that image information obtained by scanning a formation pattern formed by etching a copper foil can be obtained. The image recognition apparatus 60 is connected to the exposure apparatus 4 via the network 8, and the defect information 200 generated based on the image information 200 is transmitted from the image recognition apparatus 60 to the exposure apparatus 4.

  A target formation pattern (circuit pattern to be actually formed) designed using CAD (Computer Aided Design) or the like is taken into CAM (Computer Aided Manufacturing) 7, and the CAM 7 performs imposition layout processing of the target formation pattern. For processing that includes coordinate values, line width, etc. for processing circuit patterns after adding additional information such as marking for alignment, symbol data for identification, dummy data for pattern equalization, etc. It is converted into pattern data 100 (for example, Gerber data) and output to the exposure apparatus 4.

  As shown in FIG. 2, the exposure apparatus 4 performs exposure on both sides of the substrate in accordance with the data conversion means 41 that converts the processing pattern data 100 input from the CAM 7 into a format suitable for processing, and the processing pattern data 100. Control means (including an exposure light source) 44 and a memory 46 for storing defect information to be described later are provided.

  As the exposure apparatus 4, a direct drawing apparatus that directly draws on a resist using a laser or the like is used. For example, as shown in FIG. 3, the laser direct drawing apparatus 40 divides the laser beam LB emitted from the laser generator into a plurality of drawing light beams L via a beam splitter or beam separator, and the divided light beams are arranged in a line. Are drawn in the main scanning direction (Y direction) and the sub-scanning direction (X direction) on the substrate S set on the drawing table T. The light beam LL is scanned to draw with dots arranged in a line on the substrate S. Specifically, it is disclosed in Japanese Patent Application Laid-Open Nos. 7-15993 and 9-323180. Alternatively, a spatial light modulation element such as an LCD (Liquid Crystal Display Element) or DMD (Digital Micromirror Device) may be used as the direct drawing type exposure apparatus.

  When drawing on the resist on the substrate with such a laser direct drawing apparatus 40, the processing pattern data 100 converted into raster data is used as drawing data, and the exposure control means 44 performs exposure based on the drawing data. Is done.

  The work board 20 (see FIG. 4) targeted by the pattern manufacturing system 1 in the present embodiment is supplied by cutting an original material board manufactured by a board manufacturer or the like into a predetermined size for a printed wiring board. It is. In the pattern manufacturing system 1 according to the present embodiment, a plurality of circuit patterns are designed on the work board 20 supplied from the board manufacturer or the like, and wiring formation on the work board 20 is performed at once. The substrate is cut to obtain a plurality of unit wiring boards on which a desired wiring pattern is formed simultaneously. In other words, an electronic component (IC) package is one in which an electronic component such as an IC chip is mounted on a unit wiring board (piece). A wiring area sheet 50 in which a plurality of pieces 52, which are wiring areas of one electronic component package provided with a pad and wiring provided at a position where an IC chip is mounted, is arranged vertically and horizontally, and the sheet 50 of the same piece 52 or different The work board 20 in the wiring area in which a plurality of sheets 50 of the pieces 52 are arranged vertically and horizontally is designed.

  Next, the operation when each printed wiring board constituting the multilayer board is manufactured using the pattern manufacturing system 1 will be described with reference to the flowchart of FIG.

  In the following, as an example, a case will be described in which each printed wiring board constituting the multilayer board is separately manufactured and the multilayer board is manufactured by laminating them together, but the manufacturing method is limited to this. is not.

  First, in order to manufacture a circuit pattern, the exposure apparatus 4 receives substrate processing pattern data 100 from the CAM 7 (S100), and the exposure apparatus 4 receives the processing pattern data 100 in a vector data format such as Gerber data received. The data conversion means 41 converts the data into processing pattern data (drawing data) in a raster data format (S102).

  Then, the exposure control means 44 performs an exposure process as shown in FIG. 6 (S104). This process will be described later.

  When the resist coated on the copper foil of the substrate is exposed, development is performed by the developing device 5 to remove unnecessary resist (in the case of a positive type resist, the exposed resist is removed, in the case of a negative type resist) The resist that has not been exposed is removed), and a resist pattern is formed on the upper surface of the copper foil (S106).

  Further, the copper foil on the substrate on which the resist pattern is formed is etched by the etching device 6 to form a formation pattern (S108).

  When the formation pattern is formed, the image recognition device 60 performs an inspection process as shown in FIG. 7 and generates defect information 200 (S110). The defect information is stored in the image recognition device 60 and is output to the exposure device 4 and stored in the memory 46 of the exposure device 4.

  In this way, the next substrate is similarly processed, and each printed wiring board (outer layer substrate and inner layer substrate) constituting the multilayer substrate is manufactured.

  When a multilayer substrate is manufactured by a method of laminating an outer layer substrate and an inner layer substrate in a lump, each substrate is drilled with a laser or the like, and the holes are filled with a conductive material, so-called IVH (Interstitial Via Hole). ) Is formed. Then, the outer layer substrate and the inner layer substrate in which such via holes are formed are collectively laminated and pressed, and a solder resist is applied to produce a multilayer substrate.

  In addition to this, an outer layer substrate on which a circuit pattern is not formed and a plurality of inner layer substrates on which a circuit pattern is formed are stacked and pressed, drilled with a drill or the like, and then plated to form a through hole. And after forming a circuit pattern on an outer layer board | substrate, you may produce a multilayer board | substrate by the method of giving a soldering resist. In the case of a so-called build-up substrate, the inner substrate is laminated as described above to produce a core substrate, and the build-up layer is formed on the core substrate. In this case, a via hole is formed in the buildup layer by laser processing or the like.

  Next, an exposure process executed by the exposure apparatus 4 will be described with reference to a flowchart shown in FIG.

  As shown in FIG. 6, in the exposure process, a work ID for specifying the work board 20 is set at a predetermined position outside the circuit pattern formation area (outside the formation area of the piece 52) on the work board 20, for example, at the substrate end. The part is exposed (S200). The work ID includes, for example, a first code representing the type of the work board 20 in any combination of alphabets, a second code 'I' or 'O' indicating the inner layer or outer layer, and a serial number. It is possible to use an identification code that is a combination of the third code represented by For example, in the case of work ID AAA-I-1, the work board type is “AAA”, which is used for the inner layer, and indicates that the work board 20 has the serial number “1”. Note that work IDs are assigned to the work boards 20 constituting the same multilayer board so that the first code indicating the type of the work board and the third code indicating the serial number are the same. The method of assigning the work ID is not limited to this, and any work ID may be used as long as it can identify the type of work board 20, the distinction between the inner layer and the outer layer, and the serial number.

  Whether the work board 20 to be exposed is for the outer layer or the inner layer is included in the processing pattern data 100 including data indicating the outer layer or the inner layer, and is identified by the exposure control 44. The work ID may be exposed, but the method is not limited to this.

  If the work board 20 is for the outer layer to be exposed (S202-Y), the defect information 200 is stored from the memory 46 in which the defect information 200 generated by the inspection processing by the image recognition device 60 is stored, as will be described later. Is read (S204). This defect information 200 is the result of inspecting the inner-layer work board 20 for defects in the formed pattern after etching (such as chipping of wiring patterns, thickening, etc.) for each piece. Information such as ID is included. The piece position is specified by inspection by the image recognition device 60, and is represented by coordinate data on the work board 20, for example.

  Then, based on the defect information 200, it is determined whether or not there is a piece in which a defect is detected in the inner layer work board 20 corresponding to the outer layer work board 20 to be exposed (S206). That is, the work ID included in the defect information 200 is compared with the work ID exposed on the work board 20 for the outer layer to be exposed, and the work ID in which the first code and the third code of the work ID match. Is included in the defect information 200.

  If there is a defective piece 52 on the corresponding inner layer work board 20 (S206-Y), the piece position of the defective piece is obtained from the defect information 200, and exposure drawing data is obtained according to the position. change. That is, instead of the circuit pattern to be formed on the piece corresponding to the piece position of the defective piece, the drawing data is changed so that the identification mark indicating that it is defective is exposed. The identification mark may be a character such as “NG” or may be a predetermined symbol or mark. Also, the drawing data is not changed so that the identification mark is exposed, but the drawing data is changed so that the circuit pattern to be formed on the piece is not exposed, that is, the portion is blank. Good. Further, the drawing data may be changed so that the entire surface is exposed (filled with a solid pattern).

  Then, the outer layer work board 20 is exposed based on the drawing data. On the other hand, when the work board 20 to be exposed is the work board 20 for the inner layer (S202-N), the work board 20 for the inner layer is exposed without changing the drawing data.

  After the exposure, development and etching are performed as described above, and a circuit pattern and a work ID are formed on the work board 20.

  In this way, when the work board 20 for the outer layer is exposed, if there is a defective piece on the corresponding work board 20 for the inner layer, the drawing data is partially changed so that it can be easily identified. Since the exposure is performed, the defective piece can be easily identified. For this reason, it is possible to prevent components from being erroneously mounted on the defective piece.

  The identification mark is not formed at the position of the defective piece by exposing the identification mark at the time of outer layer exposure, but is further applied at the position of the defective piece at the time of applying a solder resist in a later process or character printing such as silk printing. You may make it form.

  Next, the inspection process executed by the image recognition device 60 will be described with reference to the flowchart shown in FIG.

  In the inspection process, the work ID is first read (S300). Based on the second code of the read work ID, it is determined whether the work board 20 to be inspected is for the outer layer or the inner layer. If it is for the outer layer (S302-Y), the outer layer to be inspected Based on the defect information 200, it is determined whether or not there is a piece in which a defect is detected in the inner layer work board 20 corresponding to the work board 20 (S306). That is, the work ID included in the defect information 200 is compared with the work ID exposed on the work layer 20 for the outer layer to be inspected, and the work IDs that match the first code and the third code of the work ID. Is included in the defect information 200.

  If there is a defective piece 52 on the corresponding inner layer work board 20 (S306-Y), the piece position of the defective piece is acquired from the defect information 200, and the piece 52 excluding the piece 52 at that position is acquired. All inspections are performed (S308). In addition, various well-known methods can be used for the inspection of the piece 52, for example, a method described in JP-A-11-337498 can be used.

  When a defective piece exists on the outer layer work board 20 (S310-Y), a predetermined corresponding process is performed (S312). When a defective piece does not exist (S310-N), this routine is executed. finish. The corresponding processing includes processing for storing the position of the defective piece and the work ID as defect information of the outer layer work board 20, and processing for marking the position of the defective piece with ink or the like.

  On the other hand, when there is no defective piece on the inner layer work board 20 corresponding to the work board 20 to be inspected (S306-N), all pieces are inspected (S314).

  When the work board 20 to be inspected is the inner layer work board 20 (S302-N), all pieces are inspected (S316). If there is a defective piece (S318-Y), the defect information 200 is stored in a memory (not shown) in the image recognition device 60 and output to the exposure device 4 (S320). (S318-N), this routine is terminated. The defect information 200 includes information for specifying the position of the defective piece, for example, a piece number and coordinate data, in addition to the work ID of the defective piece as described above. In the case of coordinate data, for example, coordinate data of the center position of the defective piece may be used, or coordinate data of all corners of the defective piece may be included so that the shape and size of the defective piece can be specified. The present invention is not limited to the above as long as the position of the defective piece can be specified. In the case of a piece number, it is necessary to store in advance the position information corresponding to the piece number in the exposure device 4 and the image recognition device 60.

  As described above, when there is a defective piece on the work board 20 for the inner layer, the work ID and position information of the piece are output to the exposure apparatus 4 as defect information. Can be easily identified.

  Therefore, when the exposure apparatus 4 exposes the work board 20 for the outer layer, it is possible to easily expose the identification mark indicating that the position of the defective piece is defective. Moreover, in this embodiment, since the position of the defective piece can be identified without scratching the defective piece, it is possible to prevent a defect due to chips or the like.

  Further, in the inspection of the work board 20 for the outer layer, since the inspection is not performed for the position where the defective piece exists, the useless inspection can be omitted and the inspection time can be shortened.

  In this embodiment, the case where the work ID is exposed and formed as a pattern has been described. However, the present invention is not limited to this, and a notch or the like corresponding to the work ID may be provided at the end of the substrate. Etc. may be printed.

  When manufacturing a build-up board, the work ID assigned to the inner-layer board is read when the build-up layer is formed, and the work ID and the defect information 200 are collated to expose the identification mark at the position of the defective piece. You may make it do. In this case, since the work ID formed on the inner layer substrate cannot be read by image recognition, for example, an X-ray reader is provided separately or in the exposure apparatus 4 to read the work ID formed on the inner layer substrate. You can do it. In the case of a build-up substrate, the identification mark may be formed only on the outermost layer of the build-up layer, or the identification mark may be formed only on the solder resist.

  Further, in the present embodiment, the case where the drawing data (exposure data) is directly changed according to the position of the defective piece and the work board 20 for the outer layer is exposed has been described, but for processing according to the position of the defective piece The pattern data 100 may be changed, converted into drawing data, and exposed.

It is a figure for demonstrating the structure of a pattern manufacturing system. It is a block diagram of an exposure apparatus. It is a figure of a laser direct drawing apparatus. It is a flowchart showing a correction table creation process. It is a flowchart showing operation | movement of a pattern manufacturing system. It is a flowchart showing operation | movement of an exposure apparatus. 5 is a flowchart showing the operation of the image recognition device 60.

Explanation of symbols

A copper foil sticking process B leveling process C lamination process 1 pattern manufacturing system 4 exposure apparatus (input means, applying means)
5 Developing device 6 Etching device 7 CAM
8 Network 20 Work board 40 Laser direct drawing device 41 Data conversion means 44 Exposure control means (change means)
46 Memory 50 Sheet 52 Piece 60 Image recognition apparatus 100 Processing pattern data 200 Defect information

Claims (5)

Based on the exposure data for forming the target formation pattern through development and etching, the resist on the etching target material attached to the outer layer substrate and the inner layer substrate constituting the multilayer substrate is directly drawn and exposed at a predetermined exposure amount. In the exposure apparatus,
The outer layer substrate and the inner layer substrate include a plurality of unit substrates for forming a formation pattern,
An input unit for inputting defect information including information on the position of the defective unit substrate, output from an inspection unit that inspects each unit substrate for defects in the formation pattern formed on the unit substrate of the inner layer substrate;
Based on the defect information, a solid pattern is formed at the position of the defective unit substrate, or a formation pattern is not formed at the position of the defective unit substrate , so that a defective portion can be identified . changing means for changing at least one of the resist pattern of the solder resist to be applied to the exposure data and the outer substrate for exposing the outer layer substrate,
An exposure apparatus comprising:   The exposure apparatus according to claim 1, further comprising an applying unit that applies an identification code to the inner layer substrate, wherein the defect information includes an identification code of an inner layer substrate including a defective unit substrate. Based on the exposure data for forming the target formation pattern through development and etching, the resist on the etching target material attached to the outer layer substrate and the inner layer substrate constituting the multilayer substrate is directly drawn and exposed at a predetermined exposure amount. In the exposure method,
The outer layer substrate and the inner layer substrate include a plurality of unit substrates for forming a formation pattern,
Input defect information including information related to the position of the defective unit substrate, output from an inspection unit that inspects each unit substrate for defects in the formation pattern formed on the unit substrate of the inner layer substrate,
Based on the defect information, a solid pattern is formed at the position of the defective unit substrate, or a formation pattern is not formed at the position of the defective unit substrate , so that a defective portion can be identified . exposure method characterized by changing at least one of the resist pattern of the solder resist to be applied to the exposure data and the outer substrate for exposing the outer layer substrate. Based on the exposure data for forming the target formation pattern, an exposure unit that directly draws and exposes the resist on the etching target material attached to the outer layer substrate and the inner layer substrate constituting the multilayer substrate with a predetermined exposure amount, and exposure In a pattern manufacturing system comprising: a developing unit that develops the resist formed to form a resist pattern; and an etching unit that etches the material to be etched to form a formation pattern.
The outer layer substrate and the inner layer substrate include a plurality of unit substrates for forming a formation pattern,
An inspection means for inspecting each unit substrate for defects in the formation pattern formed on the unit substrate of the inner layer substrate, and generating defect information including information on the position of the defective unit substrate;
Based on the defect information, a solid pattern is formed at the position of the defective unit substrate, or a formation pattern is not formed at the position of the defective unit substrate , so that a defective portion can be identified . changing means for changing at least one of the resist pattern of the solder resist to be applied to the exposure data and the outer substrate for exposing the outer layer substrate,
A pattern manufacturing system comprising: When inspecting the outer layer substrate, the inspection means determines whether or not a defective unit substrate exists in the inner layer substrate corresponding to the outer layer substrate based on the defect information, and the defective unit substrate exists. 5. The pattern manufacturing system according to claim 4, wherein only the unit substrates other than the unit substrate are inspected.

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