JP4584368B2 - Signal generator - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a signal generator that generates various signals that serve as the operation reference of the apparatus, and is particularly suitable for use in a digital camera, an image processing apparatus, or the like that uses both a timing signal and a synchronization signal.
[0002]
[Prior art]
In general, in order to satisfy the user's desire to improve the function of this device while reducing the size of the device, the device has developed a semi-custom IC such as a gate array that has been developed and has a high density. Efforts such as mounting have been made. As a specific example of this, for example, an image processing apparatus that is actually mounted at high density includes image input means and signal processing means. An image processing apparatus is an encoder which is one of signal processing means for image signals for constituting an obtained image as well as inputting an image by a two-dimensional image sensor such as a CCD (Charge Coupled Device). Thus, processing is performed so that a television standard signal can be obtained. The image sensor requires a timing signal as a driving signal when driven, and a synchronization signal is necessary for encoding a signal obtained from the image sensor. The timing signal and the synchronization signal are usually generated by a common clock signal. Due to the commonality of the signals used in this way and the demand for miniaturization as described above, the part that recently generates the timing signal and the synchronization signal is integrated and packed in the IC.
[0003]
By the way, it is generally known that an image sensor has a characteristic that when an ambient temperature rises, dark current flowing through the image sensor increases, and as a result, an obtained image deteriorates image quality. . For example, in the image processing apparatus described in JP-A-64-50670, in order to cope with such a problem, the clock generation prohibiting means is operated except for a specific case, and the generation of the clock signal is stopped, It has been proposed to suppress the temperature rise in the apparatus.
[0004]
Further, the signal processing used in the image processing apparatus outputs an image signal through many processes. In correlated double sampling (CDS), processing is performed so as to suppress noise contained in an analog signal obtained from an image sensor. Next, A / D conversion is performed in order to perform subsequent signal processing with digital signals, and various digital signal processing is performed on the basis of the signals converted into digital signals by the digital signal processor (DSP) and converted into video signals by the encoder. ing.
[0005]
[Problems to be solved by the invention]
By the way, if the CDS, A / D, DSP, for example, enters before the imaging signal is supplied to the encoder, the timing signal supplied to the encoder in accordance with these signal processing, that is, the synchronization signal is delayed by several tens of clocks. There must be. When this delay adjustment is large, the edge portion of the synchronization signal may enter the effective screen area of the video signal. In this case, the synchronization signal may affect the timing signal used for other signal processing, such as jitter.
[0006]
Further, when signal charges are read from the two-dimensional image sensor by the all-pixel reading method, depending on the synchronization signal, the signal charge can be seen near the center of the screen.
[0007]
When one timing signal (synchronous signal) enters a position in such an effective video area, multiple signal generation parts are included in the IC, so the effect of current fluctuations is timed indirectly. I get a signal. For this reason, it appears as jitter on the screen. Problems that occur with the use of ICs include vertical streaks appearing at the left edge of the screen, and vertical streaks appearing in the center of the screen.
[0008]
An object of the present invention is to provide a signal generator capable of eliminating the above-described drawbacks of the prior art and preventing the influence of noise caused by jitter or the like generated in an effective image area of a video signal.
[0009]
[Means for Solving the Problems]
In order to solve the above-described problems, the present invention generates a plurality of types of reference signals that indicate timing and synchronization relationships respectively defined in a supply destination device using a clock signal that is an operation reference for signal processing. In the generating device, from the first reference signal generating means for generating the reference signal maintaining the timing relationship, the second reference signal generating means for generating the reference signal maintaining the synchronization relationship, and the second reference signal generating means Output control means for controlling signal output to the supply destination device, and signal pause means for temporarily halting the output of the second reference signal generating means in response to a control signal from the output control means. Features.
[0010]
Here, the output control means performs control to stop the output from the signal pause means when reading the signal for recording from the supply destination device that supplies the output of the first reference signal generation means, and from the signal pause means In order to resume output supply, it is preferable to perform control in synchronization with the output of the second reference signal generating means.
[0011]
The signal suspending means is preferably disposed immediately before the means that consumes the largest amount of power, and the operation of the means that consumes the largest amount of power can be controlled according to the control means. Power consumption can be reduced.
[0012]
The signal pause means may be arranged at a position immediately before the clock signal is supplied to the second reference signal generating means. As a result, the supply of the clock signal to the second reference signal generating means can be controlled.
[0013]
The first reference signal generating means and the second reference signal generating means are characterized in that they are provided in the same chip, which is advantageous when downsizing.
[0014]
The signal generator of the present invention operates the signal pause means in accordance with the control of the output control means to temporarily pause the output from the second reference signal generation means, so that the second reference signal generation means The output signal affects the output from the first reference signal generating means, and it is possible to prevent the adverse effect such as jitter from appearing in the signal read from the supply destination apparatus.
[0015]
DETAILED DESCRIPTION OF THE INVENTION
Next, an embodiment of a signal generator according to the present invention will be described in detail with reference to the accompanying drawings.
[0016]
The signal generation device according to the present invention is a device that generates a plurality of timing signals and generates a semi-custom IC, for example, in order to reduce the size of a portion that generates these timing signals, and is bundled as a result. . This signal generator is used in a timing signal generator such as a digital camera or an image processing apparatus that requires two timing signals so as to supply timing for driving the imaging means and converting the imaging signal into a video signal.
[0017]
In this embodiment, a case where the signal generator of the present invention is applied to the timing signal generator 10 will be described. The timing signal generation device 10 includes a timing signal generation unit 11, a synchronization signal generation unit 12, a control unit 13, and an output selection unit 14.
[0018]
The timing signal generation unit 11 generates a reference signal for operating each unit of the device to which the timing signal generation device 10 is applied based on a clock signal supplied from an original oscillation unit (not shown). For example, the synchronization signal generation unit 12 generates a synchronization signal conforming to the standard of the video signal in accordance with the clock signal supplied from the original oscillation unit. The synchronization signal generation unit 12 supplies an output signal obtained by operating each unit in order according to the timing signal supplied from the timing signal generation unit 11 to, for example, an encoder that converts it into a video signal, and also supplies it to the control unit 13 is doing.
[0019]
The control unit 13 is supplied with the signal generated by the synchronization signal generation unit 12. The control unit 13 supplies a control signal to the output selection unit 14. The control unit 13 performs control so as to stop the output from the output selection unit 14 when reading a signal for recording from the supply destination device that supplies the output of the timing signal generation unit 11. Further, the control unit 13 performs control so as to synchronize with the output of the synchronization signal generation unit 12 when the output supply from the output selection unit 14 is resumed. In particular, among the outputs of the synchronization signal generator 12, the vertical synchronization signal (VD) is used to maintain the synchronization relationship.
[0020]
When the output selection unit 14 passes the output signal from the synchronization signal generation unit 12 according to the control signal supplied from the control unit 13 (ON state), the output selection unit 14 temporarily stops outputting the output signal from the synchronization signal generation unit 12 When selecting (OFF state), the signal selection is switched. In FIG. 1, it is preferably provided on the output side of the synchronization signal generator 12, for example, at a position immediately before the input of a buffer or the like with the largest power consumption. As a result, the range to be stopped in various signal processes can be minimized, and the power consumption can be effectively suppressed. The output selection unit 14 generates a synchronization signal so as not to interrupt the supply of the clock signal to the timing signal generation unit 11 and to temporarily stop the supply of the clock signal to the synchronization signal generation unit 12. It may be arranged at the position of the clock signal input side of the unit 12 (not shown). In this way, the output selection unit 14 can suspend output from the synchronization signal generation unit 12 for a predetermined period by controlling on / off of the supply of the clock signal supplied to the synchronization signal generation unit 12. it can.
[0021]
Next, the case where the timing signal generation device 10 is applied to, for example, the electronic still camera 20 shown in FIG. 2 will be described. The electronic still camera 20 includes an optical system 21, an image sensor (CCD) 22, a preprocessing unit 23, an A / D conversion unit 24, a DSP 25, an encoder 26, and a release shutter button 27 in addition to the timing signal generation device 10. Yes. The optical system 21 includes a single lens or a plurality of lenses and a mechanism for driving a diaphragm and a shutter.
[0022]
The image sensor (CCD) 22 is provided with a two-dimensional array of pixel cells. Immediately before the image sensor 22, a color filter array corresponding to a color filter is disposed in each pixel cell. The pixel cell outputs an electric signal (analog signal) as an imaging signal by photoelectrically converting incident light transmitted through the color filter array.
[0023]
The preprocessing unit 23 includes a correlated double sampling circuit that reduces random noise or the like included in the supplied imaging signal and a preamplifier circuit that amplifies the noise-removed signal to a predetermined level. The A / D conversion unit 24 samples the imaging signal supplied from the preprocessing unit 23 using the timing signal from the timing signal generation unit 11 and converts it into a digital signal. The DSP25 is a semi-custom IC that performs various types of signal processing with digital signals and reduces circuit size and power consumption. The optical system 21, the image sensor (CCD) 22, the pre-processing unit 23, the A / D conversion unit 24, and the DSP 25 are required for driving and signal processing of these units from the timing signal generating unit 11 of the timing signal generating device 10. A timing signal is supplied as a valid reference signal.
[0024]
The encoder 26 includes a function of converting the supplied imaging signal so as to become a television standard signal. A synchronization signal is supplied to the encoder 26 as a necessary reference signal from the synchronization signal generator 12 of the timing signal generator 10. By supplying the synchronization signal, the encoder 26 generates a signal that satisfies the timing relationship of the television standard, that is, the synchronization relationship, of the imaging signal.
[0025]
The release shutter button 27 is provided to notify the electronic still camera 20 of the exposure light quantity adjustment operation and the photographing timing. A signal corresponding to the operation of the release shutter button 27 is supplied to the control unit 13.
[0026]
In the operation of the electronic still camera 20, first, for example, the release shutter button 27, which is an operation button, is pressed halfway down to measure the exposure amount. In the pixel cell of the image sensor (CCD) 22, incident light is received through the optical system 21. The aperture of the optical system 21 and the shutter drive mechanism are set so that exposure control is optimized based on the amount of light received at this time. As shown in FIG. 3 (a), when the vertical synchronization signal (hereinafter referred to as VD signal) is regarded as a reference signal and the operation relationship of each part is viewed, the image sensor 22 shows the exposure shown in FIG. 3 (b) after a predetermined time has elapsed. The exposure of the incident light amount adjusted at the rising edge of the control signal is started. The image sensor 22 ends the exposure simultaneously with the fall of the VD signal (see the main imaging in FIG. 3). For example, during monitoring, the image sensor 22 reads out the signal charges accumulated in the pixel cells due to this exposure according to the timing of the next VD signal after the exposure ends (see the monitoring period in FIG. 3).
[0027]
When the power is turned on, the electronic still camera 20 displays an image of the object scene using, for example, the above-described signal for displaying on the monitor. For this reason, generally, the imaging signal read by the image sensor 22 is sequentially sent to the preprocessing unit 23, the A / D conversion unit 24, the DSP 25, and the encoder 26. The encoder 26 sends the television standardized output to the electronic viewfinder. In this way, the scene to be photographed is displayed.
[0028]
Next, the user presses down the release shutter button 27 completely to start the main imaging (see arrow T1 in FIG. 3). At this time, the optical system 21 is driven so as to optimize the operation of the mechanism in the optical system 21, for example, with a timing signal supplied from the timing signal generator 11 of the timing signal generator 10. The image sensor 22 accumulates signal charges by exposing with an amount of light corresponding to the setting by driving. After the fall of the VD signal indicated by the arrow T2 in FIG. 3, the image sensor 22 reads the signal charge according to the drive signal generated from the supplied timing signal in the same manner as described above. The read imaging signals are sequentially sent to the preprocessing unit 23, the A / D conversion unit 24, the DSP 25, and the encoder 26. However, at the moment when the release shutter button 27 is completely pressed down, an operation instruction signal for so-called main reading is supplied to the control unit 13. At this time, the control unit 13 outputs a control signal to the output selection unit 14 so as to turn off the period ST in FIG. Since the output selection unit 14 is turned off, the synchronization signal generated by the synchronization signal generation unit 12 of the timing signal generation device 10 is not supplied to the encoder 26. As a result, the encoder 26 stops the signal processing operation, and the screen is turned off during this period ST. During such screen processing, although not shown, the output from the DSP 25 is supplied to, for example, a data compression unit and the data compression processing is performed. After this data compression processing, it is recorded on a recording medium such as an IC card.
[0029]
After the end of the recording, the control signal supplies, for example, a control signal for turning on the operation to the output selection unit 14 in synchronization with the VD signal supplied from the synchronization signal generation unit 12 next. A synchronization signal is supplied to the encoder 26 via the output selection unit 14 that has been turned on. The encoder 26 resumes operation in synchronization with the VD signal.
[0030]
Here, as a comparison, the recording signal obtained at the time of CCD reading so far is supplied to the encoder by multiple signal processing when the timing signal generator 11 and the synchronization signal generator 12 are bundled in the same IC. Since the synchronization signal needs to be delayed by several tens of clock signals, the synchronization signal appears in the effective video area 40 of FIG. At this time, jitter or the like occurred in the output of the timing signal generator 11. This jitter or the like is because the device is made more susceptible to current fluctuations by enclosing a plurality of signal generators in the IC in order to reduce the size of the device. When the read data is processed and monitored and displayed, for example, as shown in FIG. 4, the screen has a vertical stripe 41 at the left end of the screen and a vertical stripe 42 at the center of the screen. There was a phenomenon that lowered the image quality.
[0031]
With this configuration, since the operation of the encoder 26 is stopped by eliminating the supply of the synchronization signal to the encoder 26 during reading, the influence on the output from the timing signal generator 11 can be prevented. As a result, it is possible to record data with good image quality without jitter such as vertical stripes in the recording data.
[0032]
As described above, the output selection unit 14 of the timing signal generation device 10 stops the operation necessary for the subsequent encoding process when it is provided immediately before the input of the synchronization signal supplied to the buffer with the largest power consumption. Without consuming too much power.
[0033]
【The invention's effect】
As described above, according to the signal generating apparatus of the present invention, the signal pause means is operated according to the control of the output control means to temporarily pause the output from the second reference signal generating means, and the second reference Since the output signal of the signal generating unit affects the output from the first reference signal generating unit and the adverse effect such as jitter can be prevented from appearing in the signal read from the supply destination device, noise or the like can be applied by applying it at the time of recording. A recording signal having no image can be obtained, and in particular, when obtaining an image signal, the image quality can be improved.
[Brief description of the drawings]
FIG. 1 is a block diagram showing a schematic configuration when a signal processing apparatus according to the present invention is applied to a timing signal generating apparatus.
FIG. 2 is a block diagram showing a configuration when the timing signal generating device shown in FIG. 1 is applied to an electronic still camera.
FIG. 3 is a timing chart for explaining the operation of the electronic still camera shown in FIG. 2;
FIG. 4 is a schematic diagram of a screen for explaining a generation position of noise appearing on the screen by a conventional process.
[Explanation of symbols]
10 Timing signal generator
11 Timing signal generator
12 Sync signal generator
13 Control unit
14 Output selector

Claims (4)

A plurality of types indicating the relationship between the timing supplied as the drive signal specified by the device to which the image is supplied and the synchronization used for video display using the clock signal as the operation reference for signal processing to the image conforming to the image display standard In a signal generation device that generates a reference signal and generates a signal used for image display, the device includes:
Maintaining the relationship of the timing to generate a timing signal in the image input, a timing signal generating means you output to the image pickup device for reading a signal charge that forms an image using the timing signal,
Synchronization signal generating means for generating a synchronization signal used for displaying the read image while maintaining the synchronization relationship;
An output control means for generating a control signal for controlling a synchronization signal output outputted from the signal suspension means in response to the supply of the synchronization signal, and outputting the control signal to the signal suspension means;
Signal pause means for temporarily pausing the output of the synchronization signal in response to the control signal,
The signal generator is disposed at a position immediately before the buffer unit that consumes the largest amount of power.   2. The signal generation device according to claim 1, wherein the output control unit stops the output from the signal pause unit when reading a signal for recording from a supply destination device that supplies the output of the timing signal generation unit. And a signal generator for controlling the resumption of output supply from the signal suspension means in synchronization with the output of the synchronization signal generating means.   2. The signal generating apparatus according to claim 1, wherein the signal pause means is disposed at a position immediately before the clock signal is supplied to the synchronization signal generating means. 2. The apparatus according to claim 1, wherein said timing signal generating means and said synchronization signal generating means are provided in the same chip.

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