JP4416108B2 - 半導体ウェーハの製造方法 - Google Patents
半導体ウェーハの製造方法 Download PDFInfo
- Publication number
- JP4416108B2 JP4416108B2 JP2003386451A JP2003386451A JP4416108B2 JP 4416108 B2 JP4416108 B2 JP 4416108B2 JP 2003386451 A JP2003386451 A JP 2003386451A JP 2003386451 A JP2003386451 A JP 2003386451A JP 4416108 B2 JP4416108 B2 JP 4416108B2
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- semiconductor wafer
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- 239000004065 semiconductor Substances 0.000 title claims description 128
- 238000004519 manufacturing process Methods 0.000 title claims description 19
- 239000000758 substrate Substances 0.000 claims description 86
- 238000000034 method Methods 0.000 claims description 61
- 230000001681 protective effect Effects 0.000 claims description 35
- 238000004140 cleaning Methods 0.000 claims description 14
- 230000010354 integration Effects 0.000 claims description 14
- 239000000853 adhesive Substances 0.000 claims description 9
- 230000001070 adhesive effect Effects 0.000 claims description 9
- 239000000356 contaminant Substances 0.000 claims description 6
- 239000004697 Polyetherimide Substances 0.000 claims description 5
- 239000011521 glass Substances 0.000 claims description 5
- 229920001601 polyetherimide Polymers 0.000 claims description 5
- BZHJMEDXRYGGRV-UHFFFAOYSA-N Vinyl chloride Chemical compound ClC=C BZHJMEDXRYGGRV-UHFFFAOYSA-N 0.000 claims description 4
- 229920000098 polyolefin Polymers 0.000 claims description 4
- JOYRKODLDBILNP-UHFFFAOYSA-N Ethyl urethane Chemical compound CCOC(N)=O JOYRKODLDBILNP-UHFFFAOYSA-N 0.000 claims description 3
- 150000002148 esters Chemical class 0.000 claims description 3
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 3
- NIXOWILDQLNWCW-UHFFFAOYSA-N acrylic acid group Chemical group C(C=C)(=O)O NIXOWILDQLNWCW-UHFFFAOYSA-N 0.000 claims description 2
- 238000005507 spraying Methods 0.000 claims 1
- 235000012431 wafers Nutrition 0.000 description 104
- 239000010408 film Substances 0.000 description 86
- 238000011109 contamination Methods 0.000 description 21
- 230000015572 biosynthetic process Effects 0.000 description 8
- 238000004544 sputter deposition Methods 0.000 description 8
- 239000012535 impurity Substances 0.000 description 6
- 230000006837 decompression Effects 0.000 description 5
- 238000005498 polishing Methods 0.000 description 5
- 230000005284 excitation Effects 0.000 description 4
- 239000012528 membrane Substances 0.000 description 4
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 3
- 229910052751 metal Inorganic materials 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 229910052786 argon Inorganic materials 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 239000007789 gas Substances 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000005240 physical vapour deposition Methods 0.000 description 2
- 229920005989 resin Polymers 0.000 description 2
- 239000011347 resin Substances 0.000 description 2
- 239000010409 thin film Substances 0.000 description 2
- 239000004925 Acrylic resin Substances 0.000 description 1
- 229920000178 Acrylic resin Polymers 0.000 description 1
- 229920001342 Bakelite® Polymers 0.000 description 1
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- 229920004747 ULTEM® 1000 Polymers 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- -1 argon ions Chemical class 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 230000002542 deteriorative effect Effects 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000011261 inert gas Substances 0.000 description 1
- 239000002923 metal particle Substances 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 229920003023 plastic Polymers 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 238000001179 sorption measurement Methods 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
- 229920002803 thermoplastic polyurethane Polymers 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/6834—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used to protect an active side of a device or wafer
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
- Electrodes Of Semiconductors (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
Description
[先願発明]特願2002−240578号明細書
特に、研削加工工程において半導体ウェーハを支持している支持基板の裏面側に、研削によって生じたコンタミが付着するが、膜生成装置に搬入する前にその支持基板の裏面側に貼着してある保護テープを剥離除去することによって、支持基板の裏面側にはコンタミが全く存在しない状態になり、膜生成装置において減圧下の環境で膜形成工程が行われても、膜生成装置にコンタミが持ち込まれていないのであるから、一部といえども半導体ウェーハの裏面に生成される膜の品質を低下させることはなくなるのである。
10...支持基板、 11...保護テープ
20...研削装置、 21...基台、 22...壁部
23...レール、 24...支持板、 25...研削手段
26...ターンテーブル、 27...チャックテーブル
28...スピンドル、 29...マウンタ
30...研削ホイール、 31...研削砥石
40...減圧式成膜装置、 41...スパッタチャンバー
42...保持部、 43...励磁部材
44...スパッタ源、 45...導入口
46...減圧口、 47...高周波電源
48...膜形成手段
Claims (4)
- 表面に回路が形成された半導体ウェーハの裏面に膜を形成する半導体ウェーハの製造方法であって、
少なくとも、平坦な支持面を有する支持基板に半導体ウェーハの表面を支持させて該支持基板と該半導体ウェーハとを一体にする一体化工程と、
半導体ウェーハを保持するチャックテーブルと、該チャックテーブルに保持された半導体ウェーハの裏面を研削する研削手段とを有する研削装置を用い、一体になった支持基板側を該チャックテーブルに保持させ、該研削手段によって半導体ウェーハの裏面を研削して薄型化する研削加工工程と、
半導体ウェーハを保持するチャックテーブルと、該チャックテーブルに保持された半導体ウェーハの面に膜を生成させる膜生成手段とを有する膜生成装置を用い、一体になった支持基板側を該チャックテーブルに保持させ、該膜生成手段によって半導体ウェーハの裏面に膜を生成させる膜生成工程とから構成され、
前記一体化工程において、前記支持基板の裏面に、剥離可能な保護テープを貼着して前記研削加工工程を実施し、前記膜生成工程を実施する前に一体化した半導体ウェーハと支持基板の周囲に洗浄水を万遍なく吹き付けて、付着しているコンタミを洗い流す洗浄工程を行い、該洗浄工程後に該保護テープを剥離除去する保護テープ剥離除去工程が遂行されること
を特徴とする半導体ウェーハの製造方法。 - 前記支持基板は、ガラス基板またはポリエーテルイミド基板であり、前記保護テープは、塩化ビニールテープまたはポリオレフィンテープである
請求項1に記載の半導体ウェーハの製造方法。 - 前記支持基板の厚みは、1〜3mmの範囲である
請求項1または2に記載の半導体ウェーハの製造方法。 - 前記一体化工程において、半導体ウェーハは、アクリル系、エステル系、またはウレタン系の接着剤を介して支持基板に貼着される
請求項1乃至3のいずれかに記載の半導体ウェーハの製造方法。
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2003386451A JP4416108B2 (ja) | 2003-11-17 | 2003-11-17 | 半導体ウェーハの製造方法 |
CNB2004100901324A CN100385630C (zh) | 2003-11-17 | 2004-11-02 | 半导体晶片的制造方法 |
SG200406592A SG112046A1 (en) | 2003-11-17 | 2004-11-10 | Method of manufacturing semiconductor wafer |
US10/986,783 US7183178B2 (en) | 2003-11-17 | 2004-11-15 | Method of manufacturing semiconductor wafer |
DE102004055233.9A DE102004055233B4 (de) | 2003-11-17 | 2004-11-16 | Verfahren zur Herstellung eines Halbleiterwafers |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2003386451A JP4416108B2 (ja) | 2003-11-17 | 2003-11-17 | 半導体ウェーハの製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2005150434A JP2005150434A (ja) | 2005-06-09 |
JP4416108B2 true JP4416108B2 (ja) | 2010-02-17 |
Family
ID=34567411
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2003386451A Expired - Lifetime JP4416108B2 (ja) | 2003-11-17 | 2003-11-17 | 半導体ウェーハの製造方法 |
Country Status (5)
Country | Link |
---|---|
US (1) | US7183178B2 (ja) |
JP (1) | JP4416108B2 (ja) |
CN (1) | CN100385630C (ja) |
DE (1) | DE102004055233B4 (ja) |
SG (1) | SG112046A1 (ja) |
Families Citing this family (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3859682B1 (ja) | 2005-09-08 | 2006-12-20 | 東京応化工業株式会社 | 基板の薄板化方法及び回路素子の製造方法 |
JP5074719B2 (ja) | 2006-07-14 | 2012-11-14 | 東京応化工業株式会社 | ウエハを薄くする方法及びサポートプレート |
US8389099B1 (en) | 2007-06-01 | 2013-03-05 | Rubicon Technology, Inc. | Asymmetrical wafer configurations and method for creating the same |
US8348720B1 (en) | 2007-06-19 | 2013-01-08 | Rubicon Technology, Inc. | Ultra-flat, high throughput wafer lapping process |
JP2009224454A (ja) * | 2008-03-14 | 2009-10-01 | Disco Abrasive Syst Ltd | 光デバイスの製造方法 |
FR2944645B1 (fr) | 2009-04-21 | 2011-09-16 | Soitec Silicon On Insulator | Procede d'amincissement d'un substrat silicium sur isolant |
US9227295B2 (en) | 2011-05-27 | 2016-01-05 | Corning Incorporated | Non-polished glass wafer, thinning system and method for using the non-polished glass wafer to thin a semiconductor wafer |
JP5890977B2 (ja) * | 2011-07-20 | 2016-03-22 | 株式会社ディスコ | 加工方法 |
JP5846060B2 (ja) * | 2011-07-27 | 2016-01-20 | 信越化学工業株式会社 | ウエハ加工体、ウエハ加工用部材、ウエハ加工用仮接着材、及び薄型ウエハの製造方法 |
JP2013168430A (ja) * | 2012-02-14 | 2013-08-29 | Disco Abrasive Syst Ltd | ウエーハの加工方法 |
JP5687647B2 (ja) * | 2012-03-14 | 2015-03-18 | 株式会社東芝 | 半導体装置の製造方法、半導体製造装置 |
JP2013197511A (ja) * | 2012-03-22 | 2013-09-30 | Toshiba Corp | サポート基板、半導体装置の製造方法、半導体装置の検査方法 |
JP2013201240A (ja) | 2012-03-23 | 2013-10-03 | Toshiba Corp | 半導体装置の製造方法および半導体基板支持用ガラス基板 |
JP6093328B2 (ja) * | 2013-06-13 | 2017-03-08 | 東京エレクトロン株式会社 | 基板処理システム、基板処理方法、プログラム及びコンピュータ記憶媒体 |
CN103956337B (zh) * | 2014-05-23 | 2016-06-15 | 扬州杰利半导体有限公司 | 一种半导体晶片的切割方法 |
JP2016092065A (ja) * | 2014-10-30 | 2016-05-23 | 株式会社ディスコ | ウェーハの研削方法及び積層保護テープ |
KR102651767B1 (ko) * | 2015-05-28 | 2024-03-28 | 에이지씨 가부시키가이샤 | 유리 기판 및 적층 기판 |
US11133186B2 (en) * | 2018-09-14 | 2021-09-28 | Disco Corporation | Processing method of workpiece |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH10337823A (ja) * | 1997-04-11 | 1998-12-22 | Lintec Corp | 基材および該基材を用いた粘着テープ |
JP2000040677A (ja) * | 1998-07-23 | 2000-02-08 | Nippon Telegr & Teleph Corp <Ntt> | 半導体素子の製造方法 |
JP2001093863A (ja) * | 1999-09-24 | 2001-04-06 | Toshiba Corp | ウェーハ裏面スパッタリング方法及び半導体製造装置 |
JP2002075940A (ja) * | 2000-08-25 | 2002-03-15 | Hitachi Ltd | 半導体装置の製造方法 |
JP2003197581A (ja) * | 2001-10-18 | 2003-07-11 | Fujitsu Ltd | 板状物支持部材及びその使用方法 |
JP2003209082A (ja) * | 2002-01-15 | 2003-07-25 | Nitto Denko Corp | 保護テープの貼付方法およびその装置並びに保護テープの剥離方法 |
US7534498B2 (en) * | 2002-06-03 | 2009-05-19 | 3M Innovative Properties Company | Laminate body, method, and apparatus for manufacturing ultrathin substrate using the laminate body |
JP2004079889A (ja) | 2002-08-21 | 2004-03-11 | Disco Abrasive Syst Ltd | 半導体ウェーハの製造方法 |
-
2003
- 2003-11-17 JP JP2003386451A patent/JP4416108B2/ja not_active Expired - Lifetime
-
2004
- 2004-11-02 CN CNB2004100901324A patent/CN100385630C/zh not_active Expired - Lifetime
- 2004-11-10 SG SG200406592A patent/SG112046A1/en unknown
- 2004-11-15 US US10/986,783 patent/US7183178B2/en active Active
- 2004-11-16 DE DE102004055233.9A patent/DE102004055233B4/de not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
US20050106840A1 (en) | 2005-05-19 |
CN1619779A (zh) | 2005-05-25 |
JP2005150434A (ja) | 2005-06-09 |
SG112046A1 (en) | 2005-06-29 |
DE102004055233A1 (de) | 2005-06-30 |
US7183178B2 (en) | 2007-02-27 |
DE102004055233B4 (de) | 2016-07-21 |
CN100385630C (zh) | 2008-04-30 |
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