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JP4051326B2 - Manufacturing method of electronic device - Google Patents

Manufacturing method of electronic device Download PDF

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JP4051326B2
JP4051326B2 JP2003302190A JP2003302190A JP4051326B2 JP 4051326 B2 JP4051326 B2 JP 4051326B2 JP 2003302190 A JP2003302190 A JP 2003302190A JP 2003302190 A JP2003302190 A JP 2003302190A JP 4051326 B2 JP4051326 B2 JP 4051326B2
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resin
wiring board
electronic device
wiring
fine metal
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JP2005072392A (en
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ひろみ 野辺
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Kyocera Corp
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Kyocera Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93—Batch processes
    • H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3025—Electromagnetic shielding

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  • Power Engineering (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Health & Medical Sciences (AREA)
  • Electromagnetism (AREA)
  • Toxicology (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Description

本発明は、携帯電話機やパーソナルコンピュータ等の通信機器、電子機器等に組み込まれる電子装置の製造方法に関するものである。   The present invention relates to a method for manufacturing an electronic device incorporated in a communication device such as a mobile phone or a personal computer, an electronic device, or the like.

従来より、携帯電話機等の通信機器、電子機器等に高周波回路を備えた電子装置が用いられている。   2. Description of the Related Art Conventionally, an electronic device provided with a high-frequency circuit is used in communication devices such as mobile phones, electronic devices, and the like.

このような従来の電子装置としては、例えば図４に示す如くグランド配線パターンや信号配線パターン等の表面配線パターン５２を有する配線基板５１上面に、IC素子等の電子部品素子５３を載置させるとともに、電子部品素子５３上面に設けられている接続電極５４と前記表面配線パターン５２とを、金属細線５５を介して電気的に接続させ、更に電子部品素子５３を絶縁性を有する樹脂５６により被覆した構造のものが知られている（例えば、特許文献１参照。）。   As such a conventional electronic device, for example, an electronic component element 53 such as an IC element is placed on the upper surface of a wiring substrate 51 having a surface wiring pattern 52 such as a ground wiring pattern or a signal wiring pattern as shown in FIG. The connection electrode 54 provided on the upper surface of the electronic component element 53 and the surface wiring pattern 52 are electrically connected through a thin metal wire 55, and the electronic component element 53 is further covered with an insulating resin 56. The thing of a structure is known (for example, refer patent document 1).

ところで上述した従来の電子装置５０においては、携帯電話等の電子機器内に組み込んで使用した際、電子装置５０の周囲に配置される他の電子装置からの電磁的な影響によって、電子装置の電気的特性が劣化するといった不都合を有している。   By the way, in the above-described conventional electronic device 50, when the electronic device 50 is incorporated in an electronic device such as a mobile phone, the electric power of the electronic device is affected by electromagnetic influence from other electronic devices arranged around the electronic device 50. Inconveniences such as deterioration of target characteristics.

そこで、上記のような不都合を解消するために、図５に示す如く、電子部品素子５３をグランド電位に保持される金属製のシールドケース６０で覆っておくことが考えられる（例えば、特許文献２参照。）。   Therefore, in order to solve the above inconvenience, it is considered that the electronic component element 53 is covered with a metal shield case 60 held at the ground potential as shown in FIG. 5 (for example, Patent Document 2). reference.).

このようなシールドケース６０の配線基板５１への取り付けは、配線基板５１の側面に切り欠き部を形成しておき、シールドケース６０の外周部に設けられた接合脚部を前記切り欠き部に挿入し、該挿入部を切り欠き部に半田接合することにより行われる。   For attaching the shield case 60 to the wiring board 51, a notch is formed on the side surface of the wiring board 51, and a joining leg provided on the outer periphery of the shield case 60 is inserted into the notch. The insertion portion is then soldered to the cutout portion.

またこのような電子装置を多数個取りする場合は、前記配線基板５１ごとに表面配線パターン５２が形成された大型基板を用意し、該大型基板の各配線基板領域に接続電極５４を有する電子部品素子５３を載置させ、次に前記表面配線パターン５２と接続電極５４とを金属細線５５により接続し、しかる後、前記大型基板を配線基板領域ごとに分割し、最後に上述のようにしてシールドケース６０を個々の配線基板５１に取り付けることにより製品としての電子装置が完成する。
実用新案登録第２５８３２４２号公報 特開平８−１７９５５号公報（図４、図５） When a large number of such electronic devices are to be obtained, a large substrate having a surface wiring pattern 52 formed for each wiring substrate 51 is prepared, and an electronic component having a connection electrode 54 in each wiring substrate region of the large substrate. The element 53 is mounted, and then the surface wiring pattern 52 and the connection electrode 54 are connected by the fine metal wire 55, and then the large substrate is divided into wiring substrate regions, and finally shielded as described above. By attaching the case 60 to each wiring substrate 51, an electronic device as a product is completed.
Utility Model Registration No. 2583242 JP-A-8-17955 (FIGS. 4 and 5)

しかしながら上述したシールドケース６０を用いるタイプの電子装置の製造方法では、シールドケース６０の取り付けに際して、シールドケース６０の接合脚部を配線基板の切り欠き部に挿入する工程や挿入部を半田接合する工程などを要するため電子装置の組立作業が複雑になってしまう。また、電子装置を多数個取りする場合には、シールドケース６０の取り付け作業を各配線基板５１に対して個々に行わなければならない。その結果、シールドケース６０の取り付け工程に長時間を要してしまい、電子装置の生産性の向上に供することが不可となる不都合があった。   However, in the method of manufacturing an electronic device of the type using the shield case 60 described above, when the shield case 60 is attached, a step of inserting the joining leg portion of the shield case 60 into the notch portion of the wiring board or a step of soldering the insertion portion. As a result, the assembly work of the electronic apparatus becomes complicated. Further, when a large number of electronic devices are to be obtained, the attaching operation of the shield case 60 must be individually performed on each wiring board 51. As a result, the process of attaching the shield case 60 takes a long time, and there is a disadvantage that it is impossible to improve the productivity of the electronic device.

本発明は上記欠点に鑑み案出されたもので、その目的は、生産性が高く、且つ電磁波を良好に遮蔽することができる電子装置の製造方法を提供することにある。   The present invention has been devised in view of the above-described drawbacks, and an object of the present invention is to provide a method for manufacturing an electronic device that is highly productive and that can well shield electromagnetic waves.

本発明の電子装置の製造方法は、複数の配線基板領域を有する大型基板を形成し、該大型基板の各配線基板領域に、グランド配線パターンを形成するとともに上面に複数の接続電極を有する電子部品素子を載置する工程１と、前記グランド配線パターンと前記接続電極とを、ループ形状をなす金属細線を介して接続する工程２と、絶縁性を有する第１の液状樹脂を、前記電子部品素子全体を覆い、且つ前記金属細線の一部が露出するようにして、全ての配線基板領域にわたって塗布することにより絶縁性樹脂を形成する工程３と、導電性粒子を含有する第２の液状樹脂を、前記絶縁性樹脂の上面及び金属細線の露出部を覆うようにして全ての配線基板領域にわたって塗布することにより金属細線と電気的に接続させた導電性樹脂を形成する工程４と、前記大型基板を各配線基板領域の外周に沿って絶縁性樹脂及び導電性樹脂と共に切断することにより複数の電子装置を切り出す工程５と、を含むことを特徴とするものである。   An electronic device manufacturing method according to the present invention is a method of forming a large substrate having a plurality of wiring substrate regions, forming a ground wiring pattern in each wiring substrate region of the large substrate, and having a plurality of connection electrodes on the upper surface. A step 1 for placing an element, a step 2 for connecting the ground wiring pattern and the connection electrode through a thin metal wire having a loop shape, and a first liquid resin having an insulating property for the electronic component element A step 3 of forming an insulating resin by covering the entire wiring board region so as to cover the whole and exposing a part of the fine metal wires; and a second liquid resin containing conductive particles A process for forming a conductive resin electrically connected to the fine metal wires by coating over the entire area of the wiring board so as to cover the upper surface of the insulating resin and the exposed portions of the fine metal wires. 4, is characterized in that comprising a step 5 for cutting a plurality of electronic devices by cutting the large substrate with the wiring along the outer periphery of the substrate region insulating resin and conductive resin.

本発明によれば、導電性粒子を含有する第２の液状樹脂を、絶縁性樹脂の上面及び金属細線の露出部を覆うようにして配線基板領域にわたって塗布することにより電磁波遮蔽機能を有する導電性樹脂を形成するようにしている。これによって、シールドケースの取り付け作業のように煩雑な組立て作業を行うことなく、簡単に電子装置を電磁的にシールドできるようになるため電子装置の生産性を向上させることが可能となる。   According to the present invention, the second liquid resin containing the conductive particles is applied over the wiring substrate region so as to cover the upper surface of the insulating resin and the exposed portion of the thin metal wire, thereby having an electromagnetic wave shielding function. Resin is formed. As a result, the electronic device can be easily electromagnetically shielded without performing a complicated assembly operation such as the attaching operation of the shield case, so that the productivity of the electronic device can be improved.

また、電子装置を多数個取りする際には、導電性樹脂を全ての配線基板領域に対して一度に形成できるため電子装置の生産性を向上させることが可能となる。   In addition, when a large number of electronic devices are taken, it is possible to improve the productivity of the electronic device because the conductive resin can be formed on all the wiring board regions at once.

以下、本発明を添付図面に基づいて詳細に説明する。図１は本発明の製造方法によって製作された電子装置の外観斜視図、図２は図１の電子装置のＡ−Ａ線断面図である。   Hereinafter, the present invention will be described in detail with reference to the accompanying drawings. FIG. 1 is an external perspective view of an electronic device manufactured by the manufacturing method of the present invention, and FIG. 2 is a cross-sectional view of the electronic device of FIG.

同図に示す電子装置２０は、大略的に、配線基板１、電子部品素子２、絶縁性樹脂３、導電性樹脂４とで構成されている。   The electronic device 20 shown in the figure is generally composed of a wiring board 1, an electronic component element 2, an insulating resin 3, and a conductive resin 4.

前記配線基板１は、複数個の絶縁層を厚み方向に積層してなる略矩形状の積層体により構成されており、これら絶縁層間には多数の回路配線が介在され、これらの回路配線を絶縁層中に埋設されているビアホール導体等を介して相互に電気的に接続させている。   The wiring board 1 is constituted by a substantially rectangular laminate formed by laminating a plurality of insulating layers in the thickness direction, and a number of circuit wirings are interposed between the insulating layers to insulate these circuit wirings. They are electrically connected to each other via via hole conductors embedded in the layers.

このような配線基板１を構成する絶縁層の材質としては、例えばガラスセラミックス等のセラミック材料が用いられ、個々の絶縁層の厚みは例えば５０μm〜３００μmに設定される。   As a material of the insulating layer constituting such a wiring board 1, for example, a ceramic material such as glass ceramics is used, and the thickness of each insulating layer is set to 50 μm to 300 μm, for example.

一方、配線基板１の主面にはグランド配線パターン５や信号配線パターン（図示せず）が形成されている。   On the other hand, a ground wiring pattern 5 and a signal wiring pattern (not shown) are formed on the main surface of the wiring board 1.

前記グランド配線パターン５は、配線基板１内部のビアホール導体等を介して配線基板１の下面あるいは側面に形成される外部接続導体（図示せず）に接続される。前記外部接続導体は、電子装置２０が実装されるマザーボードに設けられたグランド配線に電気的に接続されており、これによりグランド配線パターン５は、電子装置２０の使用時、グランド電位に保持されるようになっている。   The ground wiring pattern 5 is connected to an external connection conductor (not shown) formed on the lower surface or side surface of the wiring board 1 via a via-hole conductor or the like inside the wiring board 1. The external connection conductor is electrically connected to a ground wiring provided on a mother board on which the electronic device 20 is mounted, whereby the ground wiring pattern 5 is held at the ground potential when the electronic device 20 is used. It is like that.

尚、グランド配線パターン５は、例えば、Ａｇ、Ａｇ−Ｐｄ、Ａｇ−Ｐｔ等のＡｇ系材料からなり、その厚みは５μｍ〜８０μmに設定される。   The ground wiring pattern 5 is made of, for example, an Ag-based material such as Ag, Ag—Pd, or Ag—Pt, and the thickness thereof is set to 5 μm to 80 μm.

このような配線基板１の上面には、ＩＣ素子や半導体素子等の電子部品素子２が載置され、例えばダイボンド材や導電性樹脂等を介して配線基板１に機械的に固定される。尚、本実施の形態においては、１つの配線基板に対して１個の電子部品素子が搭載されている。   An electronic component element 2 such as an IC element or a semiconductor element is placed on the upper surface of such a wiring board 1 and is mechanically fixed to the wiring board 1 via, for example, a die bond material or a conductive resin. In the present embodiment, one electronic component element is mounted on one wiring board.

この電子部品素子２の上面には、複数の接続電極６が形成されており、該接続電極６はグランド配線パターン５あるいは、信号配線パターンと金属細線７を介して電気的に接続され、信号配線パターンに接続している金属細線６の最上部の高さは、グランド配線パターン５に接続している金属細線６の最上部の高さよりも低く位置設定されている。   A plurality of connection electrodes 6 are formed on the upper surface of the electronic component element 2, and the connection electrodes 6 are electrically connected to the ground wiring pattern 5 or the signal wiring pattern via the metal thin wire 7, The height of the uppermost portion of the fine metal wire 6 connected to the pattern is set lower than the height of the uppermost portion of the fine metal wire 6 connected to the ground wiring pattern 5.

前記金属細線７は、従来周知のワイヤボンディングにより形成され、その形状は、例えば“山なり”をなすループ形状になっている。   The metal thin wire 7 is formed by a well-known wire bonding, and the shape thereof is, for example, a loop shape that forms a “mountain”.

尚、金属細線７は、例えばＡｕやＡｌ等の金属材料からなり、その直径は１８μｍ〜３５μｍである。   The fine metal wire 7 is made of a metal material such as Au or Al, and has a diameter of 18 μm to 35 μm.

そして電子部品素子２は、絶縁性樹脂３及び導電性樹脂４によって順次被覆されている。ただし、絶縁性樹脂２は前記金属細線７の最上部が露出するようにして、また導電性樹脂４は絶縁性樹脂３及び金属細線７の露出部を覆うようにして電子部品素子２を被覆している。   The electronic component element 2 is sequentially covered with an insulating resin 3 and a conductive resin 4. However, the insulating resin 2 covers the electronic component element 2 so that the uppermost portion of the fine metal wire 7 is exposed, and the conductive resin 4 covers the exposed portion of the insulating resin 3 and the fine metal wire 7. ing.

絶縁性樹脂３は、電子部品素子２を外部からの衝撃より保護する保護膜としての機能と、電子部品素子２を気密封止するための封止層としての機能とを有している。   The insulating resin 3 has a function as a protective film for protecting the electronic component element 2 from an external impact and a function as a sealing layer for hermetically sealing the electronic component element 2.

このような絶縁性樹脂３の材料としては、エポキシ樹脂等の熱硬化性樹脂に硬化剤、硬化促進剤、その他必要に応じて無機質充填剤等を添加・混合したものが使用される。   As a material for such an insulating resin 3, a material obtained by adding and mixing a curing agent, a curing accelerator, and other inorganic fillers as necessary to a thermosetting resin such as an epoxy resin is used.

一方、導電性樹脂材４は、金属細線７と電気的に接続されており、電子装置２０の使用時、導電性樹脂材４を前記金属細線７及びグランド配線パターン５を介してグランド電位に保持することにより、電磁波を導電性樹脂材４によって良好に遮蔽することができるようになる。   On the other hand, the conductive resin material 4 is electrically connected to the fine metal wire 7, and the conductive resin material 4 is held at the ground potential via the fine metal wire 7 and the ground wiring pattern 5 when the electronic device 20 is used. By doing so, the electromagnetic wave can be well shielded by the conductive resin material 4.

このような導電性樹脂材４は、例えば、先に述べた絶縁性樹脂材３と同様の樹脂材料、例えばエポキシ樹脂、シリコン樹脂、ポリイミド樹脂等の中にＡｕ、Ａｇ、Ｃｕ等の導電性粒子及び硬化剤、硬化促進剤、その他必要に応じて無機質充填剤を添加・混合したものが使用される。   Such a conductive resin material 4 is, for example, a conductive material such as Au, Ag, or Cu in a resin material similar to the insulating resin material 3 described above, such as an epoxy resin, a silicon resin, or a polyimide resin. And what added and mixed the hardening | curing agent, the hardening accelerator, and other inorganic fillers as needed is used.

尚、前記導電性粒子の含有量は、導電性樹脂材全体の重量に対して、例えば７５〜８８重量％の範囲に設定される。   In addition, content of the said electroconductive particle is set to the range of 75 to 88 weight% with respect to the weight of the whole conductive resin material, for example.

かくして上述した電子装置は、配線基板１に搭載されている電子部品素子２を絶縁性樹脂材３によって被覆し、該絶縁性樹脂材３を導電性樹脂材４によって被覆することにより、シールドケースを使用することなく電磁波を導電性樹脂材４によって良好に遮蔽することができるようになる。   Thus, the electronic device described above covers the electronic component element 2 mounted on the wiring board 1 with the insulating resin material 3, and the insulating resin material 3 is covered with the conductive resin material 4. The electromagnetic wave can be satisfactorily shielded by the conductive resin material 4 without being used.

次に、上述した電子装置の製造方法について図３を用いて説明する。   Next, a method for manufacturing the electronic device described above will be described with reference to FIG.

（工程１）まず、複数の配線基板領域を有する大型基板２０を形成し、該大型基板２０の各配線基板領域に、グランド配線パターン５を形成するとともに、上面に複数の接続電極６を有する電子部品素子２を載置する。   (Step 1) First, a large substrate 20 having a plurality of wiring substrate regions is formed, a ground wiring pattern 5 is formed in each wiring substrate region of the large substrate 20, and an electron having a plurality of connection electrodes 6 on the upper surface. The component element 2 is placed.

本実施の形態においては、図３（a）に示すように６つの配線基板領域が３×２のマトリクス状に配置されている。   In the present embodiment, as shown in FIG. 3A, six wiring board regions are arranged in a 3 × 2 matrix.

このような大型基板２０は、ガラスセラミックス等のセラミック材料の原料粉末に適当な有機溶剤、有機溶媒等を添加・混合して得たセラミックグリーンシートを複数枚積層した上、これをプレス成形し、しかる後、この積層体を高温で焼成し、外形加工することによって製作される。   Such a large substrate 20 is formed by laminating a plurality of ceramic green sheets obtained by adding and mixing a suitable organic solvent, organic solvent, etc. to a raw material powder of a ceramic material such as glass ceramics, and then press-molding it. Thereafter, this laminate is fired at a high temperature and is processed by external processing.

また、配線基板１の上面に設けられるグランド配線パターン５や配線基板１の内部に設けられる回路配線等は、各セラミックグリーンシートの表面に予めスクリーン印刷等によって導体ペーストを塗布しておき、焼成することにより形成される。   Further, the ground wiring pattern 5 provided on the upper surface of the wiring board 1 and the circuit wiring provided in the wiring board 1 are fired by applying a conductive paste to the surface of each ceramic green sheet in advance by screen printing or the like. Is formed.

尚、これらグランド配線パターン５や回路配線用の導体ペーストは、例えば、Ａｇ、Ａｇ−Ｐｄ、Ａｇ−Ｐｔ等のＡｇ系粉末、ホウ珪酸系低融点ガラスフリット、エチルセルロース等の有機バインダー、有機溶剤等を混合したものが使用される。   The conductive paste for the ground wiring pattern 5 and the circuit wiring includes, for example, Ag-based powder such as Ag, Ag-Pd, Ag-Pt, borosilicate low-melting glass frit, organic binder such as ethyl cellulose, organic solvent, etc. A mixture of these is used.

そして、大型基板２０の上面の各配線基板領域には、図３（ｂ）に示すように、ＩＣ素子等の電子部品素子２が載置され、ダイボンド材や導電性接着剤を介して大型基板２０に固定される。   And in each wiring board area | region of the upper surface of the large sized board | substrate 20, as shown in FIG.3 (b), electronic component elements 2, such as an IC element, are mounted, and a large sized board | substrate is passed through a die-bonding material or a conductive adhesive. 20 is fixed.

また、大型基板２０の下面には、所定位置にマーキングを施しておく。このマーキングは、後述する工程５における大型基板の切断に際して切断位置を認識するためのものである。   In addition, markings are made at predetermined positions on the lower surface of the large substrate 20. This marking is for recognizing the cutting position when the large substrate is cut in step 5 described later.

（工程２）次に、グランド配線パターン５と接続電極６とを、ループ形状をなす金属細線７を介して接続する。   (Step 2) Next, the ground wiring pattern 5 and the connection electrode 6 are connected through a thin metal wire 7 having a loop shape.

この金属細線７は、従来周知のワイヤボンディングにより形成され、その形状は、例えば“山なり”をなすループ形状になっている。また、信号配線パターンに接続される金属細線７は、その最上部の高さがグランド配線パターン５に接続される金属細線７の最上部の高さよりも低く位置設定してボンディングされる。   The fine metal wires 7 are formed by conventionally well-known wire bonding, and the shape thereof is, for example, a loop shape forming a “mountain”. Further, the fine metal wires 7 connected to the signal wiring pattern are bonded with the height of the uppermost portion set lower than the height of the uppermost portion of the fine metal wires 7 connected to the ground wiring pattern 5.

尚、グランド用金属細線９及び信号用金属細線１０は、例えばＡｕやＡｌ等の金属材料からなり、その直径は１８μｍ〜３５μｍである。   The fine metal wire 9 for ground and the fine metal wire 10 for signal are made of a metal material such as Au or Al, and have a diameter of 18 μm to 35 μm.

（工程３）次に、絶縁性を有する第１の液状樹脂を、全ての電子部品素子２を覆い、且つグランド配線パターン５と接続している金属細線７の一部が露出するようにして、全ての配線基板領域にわたって塗布することにより絶縁性樹脂３を形成する。   (Step 3) Next, the first liquid resin having insulating properties covers all the electronic component elements 2 and a part of the fine metal wires 7 connected to the ground wiring pattern 5 is exposed. The insulating resin 3 is formed by coating over the entire wiring board region.

前記第１の液状樹脂としては、エポキシ樹脂等の熱硬化性樹脂に硬化剤、硬化促進剤、その他必要に応じて無機質充填剤等を添加・混合したものが用いられ、図３（ｃ）に示す如く金属細線７の最上部が露出するようにして全ての配線基板領域にわたり塗布し、硬化させることにより絶縁性樹脂３が形成される。   As said 1st liquid resin, what added and mixed the hardening | curing agent, the hardening accelerator, other inorganic fillers as needed, etc. to thermosetting resins, such as an epoxy resin, is used, and it is in FIG.3 (c). As shown in the drawing, the insulating resin 3 is formed by applying and curing all the wiring board regions so that the uppermost portion of the fine metal wires 7 is exposed.

第１の液状樹脂の塗布方法としては、スクリーン印刷法を採用することが好ましい。これによって電子部品素子２の周囲に良好に液状樹脂が充填されるようになり、電子装置の気密性や耐久性を高めることができる。   As a method for applying the first liquid resin, it is preferable to employ a screen printing method. As a result, the liquid resin is satisfactorily filled around the electronic component element 2, and the airtightness and durability of the electronic device can be improved.

（工程４）次に、導電性粒子を含有する第２の液状樹脂を、前記絶縁性樹脂３の上面及び金属細線７の露出部を覆うようにして全ての配線基板領域にわたって塗布することにより金属細線７と電気的に接続させた導電性樹脂４を形成する。   (Step 4) Next, a second liquid resin containing conductive particles is applied over the entire wiring board region so as to cover the upper surface of the insulating resin 3 and the exposed portion of the fine metal wires 7. A conductive resin 4 electrically connected to the thin wire 7 is formed.

前記第２の液状樹脂としては、例えば、エポキシ樹脂、シリコン樹脂、ポリイミド樹脂等の中にＡｕ、Ａｇ、Ｃｕ等の導電性粒子及び硬化剤、硬化促進剤、その他必要に応じて無機質充填剤を添加・混合したものが用いられる。そして第２の液状樹脂を、図３（ｄ）に示す如く絶縁性樹脂３の上面及び金属細線７の露出部を覆うようにして従来周知のスクリーン印刷法等により全ての配線基板領域にわたって塗布し、硬化させることにより導電性樹脂４が形成される。   Examples of the second liquid resin include conductive particles such as Au, Ag, and Cu, a curing agent, a curing accelerator, and other inorganic fillers as necessary in an epoxy resin, a silicon resin, a polyimide resin, and the like. Addition and mixture are used. Then, as shown in FIG. 3D, the second liquid resin is applied over the entire area of the wiring substrate by a conventionally known screen printing method or the like so as to cover the upper surface of the insulating resin 3 and the exposed portions of the fine metal wires 7. The conductive resin 4 is formed by curing.

尚、前記導電性粒子の含有量は、導電性樹脂材全体の重量に対して、例えば７５〜８８重量％の範囲に設定される。   In addition, content of the said electroconductive particle is set to the range of 75 to 88 weight% with respect to the weight of the whole conductive resin material, for example.

これによって、電磁遮蔽機能を有する導電性樹脂を全ての配線基板領域に対して簡単な作業で一度に形成できるため、電子装置の生産性を向上させることが可能となる。 As a result, the conductive resin having an electromagnetic shielding function can be formed on all the wiring board regions at once by a simple operation, so that the productivity of the electronic device can be improved.

（工程５）最後に、大型基板２０を各配線基板領域の外周に沿って切断することにより複数の電子装置を切り出す。   (Step 5) Finally, a plurality of electronic devices are cut out by cutting the large substrate 20 along the outer periphery of each wiring substrate region.

かかる大型基板２０の切断は、まず大型基板２０を反転させて大型基板２０の下面を上側に向け、下面に付けられたマーキングに基づいて画像認識装置により配線基板領域間の境界を認識しながらダイシング装置を用いて配線基板領域の境界に沿ってマトリクス状に切断することにより行われる。このようにして略矩形状の複数の電子装置が同時に製作される。   The large substrate 20 is cut by first inverting the large substrate 20 so that the lower surface of the large substrate 20 faces upward, and dicing while recognizing the boundary between the wiring substrate regions by the image recognition device based on the markings attached to the lower surface. This is done by cutting in a matrix along the boundary of the wiring board region using the apparatus. In this way, a plurality of substantially rectangular electronic devices are manufactured simultaneously.

尚、本発明は上述の実施形態に限定されるものではなく、本発明の要旨を逸脱しない範囲において種々の変更、改良が可能である。   In addition, this invention is not limited to the above-mentioned embodiment, A various change and improvement are possible in the range which does not deviate from the summary of this invention.

上述の実施形態においては、絶縁性樹脂３の材料として熱硬化性樹脂を用いたがこれに代えて紫外線硬化性樹脂を用いてもかまわない。   In the above-described embodiment, the thermosetting resin is used as the material of the insulating resin 3, but an ultraviolet curable resin may be used instead.

また上述の実施形態においては、液状樹脂の塗布方法としてスクリーン印刷法を採用したが、これに代えてトランスファーモールド法により液状樹脂の塗布を行うようにしてもかまわない。この場合、絶縁性樹脂３及び導電性樹脂４の平坦性を良好になすことができる。   In the above-described embodiment, the screen printing method is adopted as the liquid resin application method. However, the liquid resin may be applied by a transfer molding method instead. In this case, the flatness of the insulating resin 3 and the conductive resin 4 can be improved.

更に上述の実施形態においては、大型基板２０をダイシングにより切断したが、これに代えてレーザーを用いて切断するようにしてもかまわない。レーザーを用いた場合は、電子装置を種々の形状に切り出すことが可能である。   Furthermore, in the above-described embodiment, the large substrate 20 is cut by dicing, but it may be cut using a laser instead. When a laser is used, the electronic device can be cut into various shapes.

また更に上述の実施形態においては、１個の電子部品素子４を配線基板１に搭載させたが、複数個の電子部品素子４を搭載するようにしてもよい。   Furthermore, in the above-described embodiment, one electronic component element 4 is mounted on the wiring board 1, but a plurality of electronic component elements 4 may be mounted.

更にまた上述の実施形態においては、配線基板１をガラスセラミックスにより形成するようにしたが、これに代えて、アルミナセラミックス等の他のセラミック材料やガラス布基材エポキシ樹脂等の有機材料を用いて配線基板１を形成するようにしても構わない。   Furthermore, in the above-described embodiment, the wiring substrate 1 is formed of glass ceramics. Instead, other ceramic materials such as alumina ceramics or organic materials such as glass cloth base epoxy resin are used. The wiring board 1 may be formed.

本発明の一実施形態に係る電子装置の外観斜視図である。1 is an external perspective view of an electronic device according to an embodiment of the present invention. 図１の電子装置のＡ−Ａ線断面図である。FIG. 2 is a cross-sectional view of the electronic device of FIG. 1 taken along line AA. （a）〜（ｄ）は本発明の一実施形態に係る製造方法を説明するための工程ごとの外観斜視図である。(A)-(d) is an external appearance perspective view for every process for demonstrating the manufacturing method which concerns on one Embodiment of this invention. 従来の電子装置の断面図である。It is sectional drawing of the conventional electronic device. 従来の電子装置の断面図である。It is sectional drawing of the conventional electronic device.

符号の説明Explanation of symbols

１・・・・配線基板
２・・・・電子部品素子
３・・・・絶縁性樹脂材
４・・・・導電性樹脂材
５・・・・グランド配線パターン
６・・・・信号配線パターン
７・・・・グランド電極端子
８・・・・信号電極端子
９・・・・グランド用金属細線
１０・・・信号用金属細線
２０・・・大型基板 DESCRIPTION OF SYMBOLS 1 ... Wiring board 2 ... Electronic component element 3 ... Insulating resin material 4 ... Conductive resin material 5 ... Ground wiring pattern 6 ... Signal wiring pattern 7 ··· Ground electrode terminal 8 ··· Signal electrode terminal 9 ··· Ground metal thin wire 10 · · · Signal thin metal wire 20 · · · Large substrate

Claims (1)

複数の配線基板領域を有する大型基板を形成し、該大型基板の各配線基板領域に、グランド配線パターンを形成するとともに、上面に複数の接続電極を有する電子部品素子を載置する工程１と、
前記グランド配線パターンと前記接続電極とを、ループ形状をなす金属細線を介して接続する工程２と、
絶縁性を有する第１の液状樹脂を、前記電子部品素子全体を覆い、且つ前記金属細線の一部が露出するようにして、全ての配線基板領域にわたって塗布することにより絶縁性樹脂を形成する工程３と、
導電性粒子を含有する第２の液状樹脂を、前記絶縁性樹脂の上面及び金属細線の露出部を覆うようにして全ての配線基板領域にわたって塗布することにより金属細線と電気的に接続させた導電性樹脂を形成する工程４と、
前記大型基板を各配線基板領域の外周に沿って絶縁性樹脂及び導電性樹脂と共に切断することにより複数の電子装置を切り出す工程５と、を含む電子装置の製造方法。 Forming a large substrate having a plurality of wiring substrate regions, forming a ground wiring pattern in each wiring substrate region of the large substrate, and placing an electronic component element having a plurality of connection electrodes on the upper surface; and
Connecting the ground wiring pattern and the connection electrode via a thin metal wire having a loop shape;
A step of forming an insulating resin by applying an insulating first liquid resin over the entire wiring board region so as to cover the entire electronic component element and to expose a part of the fine metal wires. 3 and
Conductivity electrically connected to the fine metal wires by applying the second liquid resin containing conductive particles over the entire wiring board region so as to cover the upper surface of the insulating resin and the exposed portions of the fine metal wires. Forming a functional resin,
And a step 5 of cutting a plurality of electronic devices by cutting the large substrate together with an insulating resin and a conductive resin along an outer periphery of each wiring board region.
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