JP3583790B2 - Electronic delay electric detonator - Google Patents

Description

[0001]
[Industrial applications]
In this invention, when blast power is supplied, the operation starts, an oscillation circuit based on a crystal or ceramic oscillator oscillates, the oscillation output is counted by a counter, and when the count reaches a set value, the primer is ignited. Electronic delay electric detonator.
[0002]
[Prior art]
An electronic delay electric detonator of this type has been proposed in Japanese Patent Publication No. 63-53478. This digital delay method can provide highly accurate delay.
[0003]
[Problems to be solved by the invention]
However, in this digital delay method, when a crystal or ceramic vibrator is used to increase the accuracy of the oscillating frequency of the oscillation circuit and the oscillating operation is performed based on this, the time until the oscillation frequency rises to a certain value is short. Generally, it takes an unexpectedly long time, for example, several hundred ms for a frequency oscillator and several tens of ms for a high frequency oscillator. Therefore, counting the oscillation output during this rise time reduces the accuracy of the delay time. For this reason, it is not preferable to apply the invention to an electronic delay electric detonator, especially when a large number of fires occur in series connection.
An object of the present invention is to solve the problem that counting the oscillation output during the rise time of such an oscillation circuit reduces the accuracy of the delay time.
[0004]
[Means for Solving the Problems]
In the present invention, when the blast power is input, the vibrator is strongly excited for a predetermined time by the quick start means, and thereafter, is returned to the normal excitation. The counter is reset by the reset holding circuit for approximately the predetermined time after the blast power is input.
[0005]
In this way, the rising period of the oscillation circuit is shortened, and the counting of the counter is stopped while the oscillation frequency during the rising period does not reach the predetermined value. After the normal oscillation frequency is reached, counting by the counter is started. Moreover, since the rising period is short, even if the reset holding circuit is simply and inexpensively constructed, the period during which the reset state is held in the reset state due to the fluctuation of the ambient temperature can be made small.
[0006]
【Example】
FIG. 1 shows an electronic delay electric detonator according to the present invention, in which the operation is started by blast power supplied from the outside through the input terminals 11 and 12, and the terminal (3)-(4) inside the digital timer 19 is started. The driving current from the inverter 28 (FIG. 2) and the auxiliary inverter 29 (FIG. 2) is connected to the oscillation circuit 27 (the crystal oscillator 21, the feedback resistor 22, the capacitors 24 and 25, as shown in FIG. 2). An electronic delay electric detonator that ignites the detonator 16 when the oscillation output is counted by a counter 33 (FIG. 2) built in the digital timer 19 and the count reaches a set value. 1 is a drawing showing an example of the overall circuit configuration of FIG.
The bypass resistor 13 is connected between the input terminals 11 and 12, and the input side of the rectifier 14 is connected. A capacitor 15 is connected between both ends on the output side of the rectifier 14. The shunt resistor 13 prevents the capacitor 15 from being charged by the stray current generated at the blast site until the voltage reaches the ignition, and is used when a plurality of electronic delay electric detonators are connected in series and blasted simultaneously. This is to divide the blast voltage to some extent and apply it to the rectifier 14. The rectifier 14 is for charging the blast power to the capacitor 15 with a predetermined polarity regardless of the polarity of the blast power applied between the input terminals 11 and 12.
[0007]
A series circuit of an ignition wire (not shown) in the electric detonator 16 and a switching element having a control electrode, for example, a thyristor 17 is connected between both ends of the capacitor 15. The input side of the constant voltage circuit 18 is connected to both ends of the capacitor 15, and the digital timer 19 is connected to the output side of the constant voltage circuit 18.
FIG. 2 is a block diagram showing a basic configuration of the digital timer 19 shown in FIG. Inverter 28 provided inside through terminals {circle around (3)} and {circle over (4)}, quick start means including auxiliary inverter 29 and quick start control circuit 31, and oscillation pulses of crystal oscillator 21 are counted. Becomes a set value, a counter 33 for outputting an explosion signal to the gate terminal of the thyristor 17 via the terminal (6), an output of the reset holding circuit 32 input via the terminal (7), and an input from the terminal (1). And a comparator 37 for generating a reset signal for releasing the reset state of the counter 33 by comparing the power supply voltage with the voltage divided by the voltage dividing resistors 51 and 52, and setting a set value to the counter 33. And a preset circuit 55 for performing the operation. FIG. 1 shows a case where the digital timer 19 is configured as an integrated circuit. Terminals (1) and (2) of the digital timer 19 are connected to a pair of output terminals of the constant voltage circuit 18, and a crystal or ceramic vibrator 21 is connected between the terminals (3) and (4). A feedback resistor 22 is connected in parallel with the first and second terminals, and terminals (3) and (4) are connected to a ground terminal (2) through capacitors (24) and (25), and 13 setting terminals (5) are connected to a ground terminal (2). The terminal (6) is connected to the gate of the thyristor 17. Various numerical values can be set by selectively separating the 13 setting terminals (5) from the ground terminal (2).
[0008]
The oscillator 21 , the feedback resistor 22, the capacitors 24 and 25, and the inverter 28 constitute an oscillation circuit 27. The oscillation output of the oscillation circuit 27 is counted by an internal counter 33 , and the count value of the counter is set to a set value. When a match is found, a match detection output is output from the match detection circuit in the counter 33 to the terminal (6), and the thyristor 17 is turned on. Therefore, the blast power stored in the capacitor 15 is supplied to the ignition wire, and the primer 16 explodes.
[0009]
In the present invention, the vibrator 21 connected to the digital timer 19 is strongly excited for a predetermined time from the input of the blast power by the quick start means, and then returned to the normal excitation. Therefore, for example, the oscillation circuit 27 is configured by connecting the inverter 28 in parallel with the feedback resistor 22 as shown in FIG. 2, and further, the auxiliary inverter 29 is connected in parallel with the inverter 28. A quick start control circuit 31 for operating the auxiliary inverter 29 for a predetermined period from the start of oscillation is provided. The quick start control circuit 31 includes, for example, a counter, counts the oscillation output of the oscillation circuit 27, and stops the operation of the auxiliary inverter 29 when the oscillation output reaches a predetermined value. That is, the quick start control circuit 31 includes a circuit for resetting the internal counter when the power supply voltage is applied. In this state, a pair of outputs are given to the auxiliary inverter 29 as a bias for operating the auxiliary inverter 29, and the internal counter of the internal inverter is reset. When the count reaches a predetermined value, the polarities of the pair of outputs are inverted and the operation of the auxiliary inverter 29 is stopped.
[0010]
Therefore, in FIG. 1, the blasting power is input, the constant voltage is output from the constant voltage circuit 18, and when the oscillation circuit 27 starts to oscillate, both currents of the inverter 28 and the auxiliary inverter 29 are added, and 21 is strongly excited, and the oscillation circuit 27 rises rapidly. Around the time when the oscillation frequency of the oscillation circuit 27 becomes steady, the operation of the auxiliary inverter 29 is stopped, and the excitation current for the vibrator 21 is returned to the normal excitation with only the output of the inverter 28.
[0011]
Further, as shown in FIG. 1, a reset holding circuit 32 is connected to the output side of the constant voltage circuit 18, and from the input of the blast power, while the auxiliary inverter 29 is operating, that is, the oscillation circuit 27 is brought into a steady oscillation state. The counter 33 in the digital timer 19 is reset during the rising period until the start time. In the reset holding circuit 32, for example, a capacitor 34 is connected between a pair of output terminals of the constant voltage circuit 18, and a series circuit of a resistor 35 and a capacitor 36 is connected in parallel with the capacitor 34.
[0012]
The connection point between the resistor 35 and the capacitor 36 is connected to the terminal {circle around (7)} of the digital timer 19 and is compared with a predetermined voltage by an internal comparator 37. The comparator 37 is connected until the voltage at the terminal {circle around (7)} reaches a predetermined value. Is at a high level, and the counter 33 is reset by the high level. When the voltage at the terminal (7) reaches a predetermined value, the output of the comparator 37 goes low, and the counter 33 starts counting the oscillation output of the oscillation circuit 27. As described above, the period during which the counter 33 is kept reset is substantially equal to the period from the start of oscillation of the oscillation circuit 27 to the steady oscillation frequency, which is determined by the time constant of the resistor 35 and the capacitor 36.
[0013]
As described above, when the blasting power is applied between the input terminals 11 and 12, the vibrator 21 is strongly excited, so that the oscillation frequency of the oscillation circuit 27 becomes a steady value in a short time. Since the counter 33 starts counting, a highly accurate delay can be obtained. In addition, when the oscillation circuit 27 enters the steady oscillation state, the vibrator 21 is returned to the normal excitation, so that the power consumption can be reduced.
[0014]
By the strong excitation, the oscillation circuit 27 can be brought into a steady oscillation state, for example, in 5 ms from the start of oscillation. Therefore, assuming that the time for holding the counter 33 in the reset state by the reset holding circuit 32 is 5 ms, that is, the time constant of the resistor 35 and the capacitor 36 is 5 ms, each constant of the resistor 35 and the capacitor 36 and the operating voltage of the comparator 37 It is relatively easy to keep the variation of the reset holding time within about 0.37 ms, and it is also easy to keep the temperature fluctuation of the reset holding time within about 0.11 ms, that is, the variation. Within 0.48 ms can be easily and inexpensively performed. Therefore, a highly accurate delay can be performed. The counter 33 is held in a reset state by the output of the quick start control circuit 31, the reset holding circuit 32 and the comparator 37 are omitted, or the auxiliary inverter 29 is controlled by the output of the comparator 37 to control the quick start control circuit 31. May be omitted.
[0015]
Was fed directly to the counter 33 the output pulses of FIG. 2 in the oscillator circuit 27, typically using those 4.096MHz for example as a crystal oscillator 21, divided by two ^12-minute output pulse of the oscillation circuit 27 in the frequency dividing circuit The output pulse period is set to 1 ms, and the delay amount up to 8,191 ms can be set at 1 ms intervals by 13 terminals (5). As the crystal oscillator 21, the oscillation frequency is preferably about 1 MHz to 16 MHz. If this frequency is too low, the rise time of the oscillation becomes long, and it is necessary to lengthen the reset holding time by the reset holding circuit 32, and it is difficult to obtain a stable reset holding time by the simple and inexpensive reset holding circuit 32. It becomes. On the other hand, if the vibration frequency is too high, the power consumption becomes large, making it impractical as a primer.
[0016]
After the preset for the counter 33, the preset circuit 55 can be separated from the counter 33 to reduce the power consumption. FIG. 3 is a diagram showing a preset circuit 55 provided inside the digital timer 19 for each of the plurality of terminals (5) of the digital timer 19. A power supply terminal 38 is connected to one terminal (5) through an n-channel FET 39 and further through a resistance element 40, and the terminal (5) is connected to a reset terminal of a corresponding one counting stage of the counter 33 (not shown). Connected. The connection point is grounded through a P-channel FET 41, and the gates of the FETs 39 and 41 are connected to the output terminal of the preset control circuit 42 . The output of the comparator 37 is supplied to the preset control circuit 42, and when the output of the comparator 37 changes from the high level to the low level and the reset of the counter 33 is released, a positive pulse is output from the preset control circuit 42, During the pulse, the FET 39 is turned on, the FET 41 is turned off, and the connection point between the resistance element 40 and the terminal (5) is at a low level depending on whether the terminal (5) is kept grounded or disconnected from the ground. Alternatively, the low level or the high level is preset in the counting stage connected to this connection point of the counter 33 by the load command generated during the pulse. When the positive pulse from the preset control circuit 42 falls and the output goes low, the FET 39 is turned off, the FET 41 is turned on, and the current from the power supply terminal 38 to the terminal (5) which is grounded is cut off. Power consumption is reduced. The other counting stages of the counter 33 are similarly configured.
[0017]
As shown in FIG. 1, a resistor 43 is connected in parallel with the capacitor 15, and when misfire occurs for some reason, the energy stored in the energy storage capacitor 15 is discharged by the resistor 43 within a predetermined time, It is prevented from reignition.
This electronic delay electric detonator can be made into an LSI and made small. For example, as shown in FIG. 4, an explosive 45 is filled in a cylindrical plastic case 44, an igniting explosive 46 is stored next, and a substrate 47 is inserted, and an LSI is formed on one half of the substrate 47. A digital timer 19 is mounted, a capacitor 34 and a resistor 35 are further mounted, two parallel resistors 13a and 13b constituting the resistor 13 are mounted, and a resistor 43 is mounted between the resistors 13a and 13b. Can be The crystal oscillator 21 is adhered to the resistors 13 b and 43 via a double-sided adhesive tape 48. On the other surface of the substrate 47, a cutoff portion 49 for connection between each terminal (5) and the ground is formed at a portion corresponding to the digital timer 19, and the SCR 17 is attached at one end, and the capacitors 24, 25, 36, the constant voltage circuit 18 is mounted, and the rectifier 14 is mounted on the other end. The energy storage capacitor 15 composed of an electrolytic capacitor is accommodated on the opposite side of the explosive 46 of the substrate 47, and the outside thereof is covered with a cap 51, and the legs 52, 53 connected to the terminals 11, 12 through the cap 51 are externally provided. Derived. In this way, the overall configuration can be significantly smaller.
[0018]
【The invention's effect】
As described above, according to the present invention, the vibrator is strongly excited at the start of oscillation, and the counting of the oscillation output is started after the oscillation frequency reaches a steady state, so that a highly accurate delay time can be obtained. In addition, since the rise time of the oscillation circuit is short, even if the reset holding circuit is configured simply and inexpensively, it is possible to hardly affect the delay accuracy. Further, when the oscillation frequency is in a steady state, the oscillation is returned to the normal excitation, so that the power consumption can be reduced.
[Brief description of the drawings]
FIG. 1 is a block diagram showing an embodiment of the present invention.
FIG. 2 is a block diagram showing a basic configuration of a digital timer 19 according to the present invention.
FIG. 3 is a diagram showing an example of a preset input circuit connected to each of the terminals (5 ) of the digital timer 19 .
FIG. 4 is a sectional view showing an example of the structure of the primer of the present invention.
5A is a front view of a substrate portion of FIG. 4, and FIG. 5B is a plan view thereof.

Claims (1)

An operation is started by the supplied blasting power, and an oscillation circuit (27) including an excitation inverter (28) based on a crystal or ceramic vibrator (21) oscillates, and its oscillation output is counted by a counter (33). Counting, when the count value reaches a set value, ignites the primer (16), and in an electronic delay electric detonator used by connecting a large number of them in series,
A rectifier (14) connected between the input terminals;
A capacitor (15) connected across the output side of the rectifier (14);
A constant voltage circuit (18) connected between both ends of the capacitor (15);
A digital timer (19) connected to the output side of the constant voltage circuit (18) ;
A reset holding means (32) comprising a series circuit of a capacitor (36) and a resistor (35) connected to a pair of output terminals of the constant voltage circuit (18);
The digital timer (19) is
An auxiliary excitation inverter (29) connected in parallel with the excitation inverter (28) ;
Counts the oscillation output of the upper Symbol oscillation circuit (27), becomes from the the rapid starting control circuit for stopping the operation of the count value reaches the set value the auxiliary excitation inverter (29) (31), the oscillation circuit ( 27) a quick start means for exciting only the output of the excitation inverter (28) to the oscillation circuit (27) when the oscillation frequency of the oscillation circuit becomes steady state;
Includes a comparator and (37) for comparing the voltage with a predetermined voltage of the reset holding means (32),
The counter (33) is reset during the operation of the auxiliary excitation inverter (29) from the input of the blast power, and the reset holding is performed when the oscillation frequency of the oscillation circuit (27) becomes steady. The capacitor (34) and the resistor of the reset holding means (32) so that the voltage of the means (32) reaches the predetermined voltage and causes the counter (33) to start counting the oscillation output of the oscillation circuit (27) . An electronic delay electric detonator characterized in that the time constant of (35) is determined .

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