JP3509642B2 - Semiconductor device mounting method and mounting structure - Google Patents
Semiconductor device mounting method and mounting structureInfo
- Publication number
- JP3509642B2 JP3509642B2 JP17792899A JP17792899A JP3509642B2 JP 3509642 B2 JP3509642 B2 JP 3509642B2 JP 17792899 A JP17792899 A JP 17792899A JP 17792899 A JP17792899 A JP 17792899A JP 3509642 B2 JP3509642 B2 JP 3509642B2
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- input
- circuit board
- output electrode
- electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H10W90/724—
Landscapes
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Wire Bonding (AREA)
Description
【0001】[0001]
【発明の属する技術分野】本発明は、半導体装置と回路
回版とを電気的機械的に接続する半導体装置の実装方法
および実装構造に関するものであり、特に半導体装置と
回路基板とをフェースダウンで接続する半導体装置の実
装方法および実装構造に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device mounting method for electrically and mechanically connecting a semiconductor device and a circuit plate.
And it relates to mounting structures, semi-conductor arrangement fruit especially to connect the semiconductor device and the circuit board in a face-down
The present invention relates to a mounting method and a mounting structure.
【0002】[0002]
【従来の技術】近年、半導体装置と回路基板とを直接フ
ェースダウンで接続するフリップチップ実装は、樹脂等
で保護成形した従来のパッケージに比較して、大幅に小
型化・薄型化できるという利点を持ち、また高速化・高
機能化・高周波化を図るために必要不可欠な技術であ
り、注目を集めている技術である。2. Description of the Related Art In recent years, flip chip mounting, in which a semiconductor device and a circuit board are directly connected face down, has an advantage that it can be made much smaller and thinner than a conventional package formed by protection molding with resin or the like. It is a technology that is indispensable for achieving high speed, high functionality, and high frequency, and is attracting attention.
【0003】以下に、従来の半導体装置の実装方法につ
いて説明する。図17は従来の方法における異方導電性
フィルムを基板に貼った状態の断面図、図18は従来の
方法における半導体装置と回路基板の異方導電性フィル
ムを使用した場合の接合状態の要部断面図、図19は従
来の方法における半導体装置を除去した後の要部断面
図、図20は従来の方法における再度半導体装置を回路
基板に異方導電性フィルムを使用して実装した場合の接
合状態の要部断面図を示すものである。A conventional method of mounting a semiconductor device will be described below. FIG. 17 is a sectional view showing a state in which an anisotropic conductive film is attached to a substrate by a conventional method, and FIG. 18 is a main part of a joined state when an anisotropic conductive film of a semiconductor device and a circuit board is used by the conventional method. FIG. 19 is a cross-sectional view of a main part after the semiconductor device is removed by the conventional method, and FIG. 20 is a junction when the semiconductor device is mounted again on the circuit board by using the anisotropic conductive film in the conventional method. It is a fragmentary sectional view of the state.
【0004】図17において、1は回路基板、2は入出
力電極、3は半導体装置、4は突起電極、5は絶縁性接
着剤、6は導電性粒子である。図19において、Fは半
導体装置を除去する際に半導体装置に加える力、Xは入
出力電極先端の剥離、Yは突起電極搭載下部の入出力電
極の割れであり、図20において、Zは入出力電極の半
導体装置への接触、Wは入出力電極の断線である。In FIG. 17, 1 is a circuit board, 2 is an input / output electrode, 3 is a semiconductor device, 4 is a protruding electrode, 5 is an insulating adhesive, and 6 is a conductive particle. In FIG. 19, F is the force applied to the semiconductor device when removing the semiconductor device, X is the peeling of the tip of the input / output electrode, Y is the crack of the input / output electrode under the protruding electrode, and in FIG. The contact between the output electrode and the semiconductor device, W is the disconnection of the input / output electrode.
【0005】従来から、電極上に突起電極を形成した半
導体装置を回路基板に電気的機械的に接続する方法とし
て、異方導電性フィルムを使用する方法が知られてい
る。この方法は図17に示すように、まず絶縁性接着剤
5に導電性粒子6が絶縁性を損なわない程度に分散され
たものからなる異方導電性フィルム7を入出力電極2を
有する回路基板1の上に貼り付ける。ここで、導電性粒
子6はNi粒子やAg粒子、或いは樹脂ボールに金属薄
膜と絶縁膜をコートした粒子等が用いられ、その直径は
数μm程度であり、数万個/mm2程度が混入されてい
る。Conventionally, a method of using an anisotropic conductive film is known as a method of electrically and mechanically connecting a semiconductor device having a protruding electrode formed on an electrode to a circuit board. In this method, as shown in FIG. 17, a circuit board having an input / output electrode 2 is an anisotropic conductive film 7 made of conductive particles 6 dispersed in an insulating adhesive 5 to such an extent that the insulating property is not impaired. Paste on top of 1. Here, as the conductive particles 6, Ni particles, Ag particles, particles obtained by coating a resin thin film with a metal thin film and an insulating film are used, and the diameter thereof is about several μm, and about tens of thousands / mm 2 are mixed. Has been done.
【0006】次いで、ボンディング装置(図示せず)あ
るいはめっき装置(図示せず)によって、半導体装置3
のアルミ電極上に突起電極4を形成し、図18のように
突起電極4を形成した半導体装置3を回路基板1上に位
置決めして重ね合わせ、最後に加熱と加圧とを同時に行
うことで、突起電極4と入出力電極2との間の距離を導
電性粒子6の直径以下に維持した状態で絶縁性接着剤5
を硬化する。このようにすると、突起電極4と入出力電
極2との間は、突起電極4と入出力電極2との間の直接
接触かあるいは、両者間で押し潰された導電性粒子6を
介しての接触とによって電気的に接続されることにな
る。Then, the semiconductor device 3 is bonded by a bonding device (not shown) or a plating device (not shown).
By forming the protruding electrode 4 on the aluminum electrode, the semiconductor device 3 having the protruding electrode 4 formed thereon as shown in FIG. 18 is positioned and superposed on the circuit board 1, and finally, heating and pressing are simultaneously performed. , The insulating adhesive 5 with the distance between the protruding electrode 4 and the input / output electrode 2 being kept below the diameter of the conductive particles 6.
To cure. By doing so, the protrusion electrode 4 and the input / output electrode 2 are directly contacted with each other by the direct contact between the protrusion electrode 4 and the input / output electrode 2, or by the conductive particles 6 crushed between the two. It will be electrically connected by contact.
【0007】以上のような方法により半導体装置と回路
基板が電気的機械的に接続されることになる。しかしな
がら半導体装置自体或いは突起電極と入出力電極間の電
気的接続に不具合が発生した場合、他の部品まで実装さ
れた再生可能でな何の問題もない基板まで破棄すると大
きな無駄となる。したがって、無駄をなくすためには、
不具合が発生した半導体装置のみを除去し、新たに別の
半導体装置を実装する(以下、リペアと称する。)必要
性がある。The semiconductor device and the circuit board are electrically and mechanically connected by the above method. However, if a problem occurs in the electrical connection between the semiconductor device itself or the projecting electrodes and the input / output electrodes, it is a great waste to discard the reproducible and non-reproducible substrate on which other components are mounted. Therefore, in order to eliminate waste,
There is a need to remove only the defective semiconductor device and newly mount another semiconductor device (hereinafter referred to as repair).
【0008】以下に従来のリペアについて説明する。異
方導電性フィルムを回路基板の上に貼り付け、突起電極
を形成した半導体装置を回路基板上に位置決めして重ね
合わせる。この後加熱と加圧を同時に行い絶縁性接着剤
を硬化させる。ここで絶縁性接着剤は完全に硬化させ
ず、電気的接続は得られるが絶縁性接着剤をある温度に
し、半導体装置にある力を加えれば回路基板から半導体
装置が除去できる程度に硬化させる。その後半導体装置
自体及び突起電極と入出力電極間の電気的接続に不具合
がないかどうか検査を行う。ここで不具合が発生してい
ない場合は、さらに加熱・加圧を行い絶縁性接着剤を完
全に硬化させる。The conventional repair will be described below. The anisotropic conductive film is attached on the circuit board, and the semiconductor device having the protruding electrodes is positioned and superposed on the circuit board. After that, heating and pressurization are simultaneously performed to cure the insulating adhesive. Here, the insulating adhesive is not completely cured, but the electrical connection is obtained, but the insulating adhesive is cured to a certain temperature so that the semiconductor device can be removed from the circuit board by applying a certain force to the semiconductor device. After that, the semiconductor device itself and the electrical connection between the protruding electrode and the input / output electrode are inspected for any defects. If no problem occurs here, heating and pressurization are further performed to completely cure the insulating adhesive.
【0009】一方、不具合が発生した場合には、異方導
電性フィルムを絶縁性接着剤が軟化する温度にし、図1
9に示すように半導体装置に力Fを加え半導体装置を回
路基板から除去する。その後もう一度異方導電性フィル
ムを回路基板の上に貼り付け、突起電極を形成した半導
体装置を回路基板上に位置決めして重ね合わせる。この
後加熱と加圧を同時に行い絶縁性接着剤を硬化させる。On the other hand, when a defect occurs, the anisotropic conductive film is heated to a temperature at which the insulating adhesive is softened,
As shown in FIG. 9, a force F is applied to the semiconductor device to remove the semiconductor device from the circuit board. After that, the anisotropic conductive film is attached again on the circuit board, and the semiconductor device on which the protruding electrodes are formed is positioned and superposed on the circuit board. After that, heating and pressurization are simultaneously performed to cure the insulating adhesive.
【0010】[0010]
【発明が解決しようとする課題】しかしながら、上記従
来方法においては、半導体装置自体或いは突起電極と入
出力電極間の電気的接続に不具合があり、半導体装置3
を除去しなければならない場合、入出力電極2の周りは
絶縁性接着剤5で覆われているため、半導体装置除去時
に加える力により絶縁性接着剤5から入出力電極2に入
出力電極を剥がそうとする大きな力が生じる。その力に
よって図19のように最も剥がれやすい入出力電極の先
端部分が回路基板1から剥がれたり(X部)、更には入
出力電極の先端部分の剥離が原因となり突起電極が搭載
されていた付近では入出力電極自体の割れ(Y部)が生
じたりする。特に、これらのことは半導体装置の電極間
ピッチが小さくなり、電極幅も小さくなると、それに伴
って回路基板の入出力電極のピール強度が弱くなってく
るため、狭ピッチになる程顕著に現れてくる。However, in the above-mentioned conventional method, there is a problem in the semiconductor device itself or the electrical connection between the protruding electrode and the input / output electrode, and the semiconductor device 3
When the semiconductor device must be removed, the input / output electrode 2 is covered with the insulating adhesive 5 so that the input / output electrode 2 is removed from the insulating adhesive 5 by the force applied when the semiconductor device is removed. A great force to do so arises. Due to the force, the tip portion of the input / output electrode, which is most likely to be peeled off, is peeled off from the circuit board 1 (X portion) as shown in FIG. 19, and the tip portion of the input / output electrode is peeled off. Then, the input / output electrode itself may be cracked (Y portion). In particular, these things become more prominent as the pitch becomes narrower because the pitch between the electrodes of the semiconductor device becomes smaller and the electrode width becomes smaller, the peel strength of the input / output electrodes of the circuit board becomes weaker accordingly. come.
【0011】このように半導体装置除去後、入出力電極
の先端が剥離していたり、それに伴う入出力電極の割れ
が存在する状態で、再度半導体装置を回路基板に実装す
るために半導体装置に加熱・加圧を行うと、図20のよ
うに入出力電極の先端部分の剥離が加速され跳ね上がり
半導体装置に接触したり(Z部)、或いは入出力電極の
断線(W部)にも至る可能性がある。更には半導体装置
を再実装した直後には電気的接続に問題がなくとも、ヒ
ートサイクルを加えた場合の電気的接続の信頼性が低く
なったりする。After the semiconductor device is thus removed, the semiconductor device is heated again to be mounted on the circuit board in a state where the tip of the input / output electrode is peeled off or the input / output electrode is cracked accordingly. When pressure is applied, the exfoliation of the tip portion of the input / output electrode is accelerated and jumps to contact the semiconductor device (Z portion) or the input / output electrode may be disconnected (W portion) as shown in FIG. There is. Further, immediately after remounting the semiconductor device, even if there is no problem in the electrical connection, the reliability of the electrical connection may be lowered when a heat cycle is applied.
【0012】本発明は上記した問題点を解決し、何らか
の不具合が発生し半導体装置の除去及び再実装を行って
も電気的接続不良の発生を抑える事が可能で、信頼性の
高い半導体装置の実装方法および実装構造を提供するこ
と目的としている。The present invention solves the above-mentioned problems, and it is possible to suppress the occurrence of electrical connection failure even if some trouble occurs and the semiconductor device is removed and re-mounted, and a highly reliable semiconductor device is provided. It is intended to provide an implementation method and an implementation structure.
【0013】[0013]
【課題を解決するための手段】本発明は、突起電極を有
する半導体装置を、絶縁性接着剤を介して、柔軟性を有
する回路基板に実装する実装方法であって、半導体装置
を回路基板上に位置決めして重ね合わせ、加熱と加圧を
同時に行って入出力電極の先端部分が突起電極から押さ
れて回路基板の基材に陥没した状態で、絶縁性接着剤を
完全に硬化させずに回路基板から半導体装置を除去でき
る程度に硬化させる工程と、突起電極と入出力電極間の
電気的接続に不具合がないかどうか検査を行う工程とを
含み、不具合が発生していない場合は、さらに加熱を行
って絶縁性接着剤を完全に硬化させ、一方、不具合が発
生した場合は、半導体装置を回路基板から剥がして除去
するようにした。SUMMARY OF THE INVENTION The present invention is a mounting method for mounting a semiconductor device having protruding electrodes on a flexible circuit board via an insulative adhesive. Positioning and overlapping, heating and pressing are performed simultaneously, and the tip of the input / output electrode is pushed by the protruding electrode and depressed into the base material of the circuit board, without completely curing the insulating adhesive. If the semiconductor device is hardened to the extent that it can be removed from the circuit board and the electrical connection between the projecting electrodes and the input / output electrodes is inspected for any defects, if no defects have occurred, then Heating was performed to completely cure the insulating adhesive, and when a defect occurred, the semiconductor device was peeled off from the circuit board and removed.
【0014】上記構成によれば、何らかの不具合が発生
し半導体装置の除去及び再実装を行っても電気的接続不
良の発生を抑える事が可能で、信頼性の高い半導体装置
の実装構造を提供することができる。According to the above structure, it is possible to suppress the occurrence of electrical connection failure even if some trouble occurs and the semiconductor device is removed and re-mounted, and a highly reliable semiconductor device mounting structure is provided. be able to.
【0015】[0015]
【発明の実施の形態】請求項1記載の発明は、突起電極
を有する半導体装置を、絶縁性接着剤を介して、柔軟性
を有する回路基板に実装する実装方法であって、半導体
装置を回路基板上に位置決めして重ね合わせ、加熱と加
圧を同時に行って入出力電極の先端部分が突起電極から
押されて回路基板の基材に陥没した状態で、絶縁性接着
剤を完全に硬化させずに回路基板から半導体装置を除去
できる程度に硬化させる工程と、突起電極と入出力電極
間の電気的接続に不具合がないかどうか検査を行う工程
とを含み、不具合が発生していない場合は、さらに加熱
を行って絶縁性接着剤を完全に硬化させ、一方、不具合
が発生した場合は、半導体装置を回路基板から剥がして
除去するようにした。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The invention according to claim 1 is a mounting method for mounting a semiconductor device having a protruding electrode on a flexible circuit board via an insulating adhesive, and the semiconductor device is a circuit. After positioning and stacking on the board, heating and pressing are performed simultaneously, and the tip of the input / output electrode is pushed by the protruding electrode and depressed into the substrate of the circuit board, the insulating adhesive is completely cured. If there is no defect, the process includes the steps of curing the semiconductor device to the extent that the semiconductor device can be removed from the circuit board, and the step of inspecting the electrical connection between the protruding electrodes and the input / output electrodes for defects. Further, the insulating adhesive was completely cured by further heating, and when a defect occurred, the semiconductor device was peeled off from the circuit board and removed.
【0016】この構成により、半導体装置を実装した場
合、入出力電極の先端部分は回路基板の基材の中に陥没
した状態となる。このような状態で、半導体装置自体ま
たは突起電極と入出力電極間の電気的接続に不具合が有
り、半導体装置を除去しなければならない場合、入出力
電極の先端部分は回路基板の基材の中に陥没しているた
め、入出力電極先端部分に生じる入出力電極を剥がそう
とする力を大幅に低減でき、入出力電極先端部の基材か
らの剥離及び突起電極が搭載されていた付近の入出力電
極の割れが防止できる。従って、再度半導体装置を実装
した場合でも、入出力電極先端部分の跳ね上がりによる
半導体装置への接触及び入出力電極自体の断線もなく信
頼性の高い安定した電気的接続を得ることが出来る。With this structure, when the semiconductor device is mounted, the tip portions of the input / output electrodes are depressed in the base material of the circuit board. In this state, if the semiconductor device itself or the electrical connection between the protruding electrode and the input / output electrode is defective and the semiconductor device has to be removed, the tip of the input / output electrode is located inside the substrate of the circuit board. Since it is depressed, the force to peel off the input / output electrode generated at the tip of the input / output electrode can be greatly reduced, and the peeling from the base material of the tip of the input / output electrode and the vicinity of where the protruding electrode was mounted It is possible to prevent cracks in the input / output electrodes. Therefore, even when the semiconductor device is mounted again, reliable and stable electrical connection can be obtained without contacting the semiconductor device due to the jumping up of the tip of the input / output electrode and disconnection of the input / output electrode itself.
【0017】請求項2記載の発明は、突起電極を有する
半導体装置を、絶縁性接着剤を介して、入出力電極の先
端をこの入出力電極の厚さよりも深い凹部に位置させた
回路基板に実装する実装方法であって、半導体装置を回
路基板上に位置決めして重ね合わせ、加熱と加圧を同時
に行って絶縁性接着剤を完全に硬化させずに回路基板か
ら半導体装置を除去できる程度に硬化させる工程と、突
起電極と入出力電極間の電気的接続に不具合がないかど
うか検査を行う工程とを含み、不具合が発生していない
場合は、さらに加熱を行って絶縁性接着剤を完全に硬化
させ、一方、不具合が発生した場合は、半導体装置を回
路基板から剥がして除去するようにした。According to a second aspect of the present invention, a semiconductor device having a protruding electrode is provided on a circuit board in which the tip of the input / output electrode is located in a recess deeper than the thickness of the input / output electrode via an insulating adhesive. A mounting method for mounting, in which the semiconductor device is positioned and superposed on the circuit board, and the semiconductor device can be removed from the circuit board by heating and pressing at the same time without completely curing the insulating adhesive. Including the step of curing and the step of inspecting the electrical connection between the protruding electrodes and the input / output electrodes for defects.If no defects occur, further heat to complete the insulating adhesive. On the other hand, when a defect occurs, the semiconductor device is peeled off from the circuit board and removed.
【0018】[0018]
【0019】請求項3記載の発明は、半導体装置の突起
電極を入出力電極の先端部分の厚さよりも深い凹部が設
けられた回路基板に対峙させ、絶縁性接着剤を介して前
記回路基板に実装する半導体装置の実装構造であって、
前記入出力電極の先端部分を、前記突起電極の搭載され
る位置より低い凹部に位置させるようにした。According to a third aspect of the present invention, the protruding electrode of the semiconductor device is faced to a circuit board having a recess deeper than the thickness of the tip portion of the input / output electrode, and the protruding electrode is provided via an insulating adhesive. > The semiconductor device mounting structure to be mounted on a circuit board,
The tip portion of the input / output electrode is located in a recess lower than the position where the protruding electrode is mounted.
【0020】[0020]
【0021】(実施の形態1)図1は本発明の実施の形
態1における入出力電極形状の一例を示す断面図、図2
は本発明の実施の形態1における異方導電性フィルムを
基板に貼った状態の断面図、図3は本発明の実施の形態
1におけるスタッドバンプの形成工程図、図4は本発明
の実施の形態1における半導体装置と回路基板の異方導
電性フィルムを使用した場合の接合状態の要部断面図、
図5は本発明の実施の形態1における半導体装置を除去
した後の要部断面図、図6は本発明の実施の形態1にお
ける再度異方導電性フィルムを基板に貼った状態の断面
図、図7は本発明の実施の形態1における再度半導体装
置を回路基板に異方導電性フィルムを使用して実装した
場合の接合状態の要部断面図を示す。実施の形態1は、
請求項1記載の発明に係るものである。(Embodiment 1) FIG. 1 is a sectional view showing an example of an input / output electrode shape in Embodiment 1 of the present invention, FIG.
3 is a cross-sectional view of the anisotropic conductive film according to Embodiment 1 of the present invention attached to a substrate, FIG. 3 is a process diagram of forming a stud bump according to Embodiment 1 of the present invention, and FIG. 4 is an embodiment of the present invention. Sectional view of essential parts in a joined state when an anisotropic conductive film for a semiconductor device and a circuit board in form 1 is used,
5 is a cross-sectional view of an essential part after removing the semiconductor device according to the first embodiment of the present invention, and FIG. 6 is a cross-sectional view of a state where the anisotropic conductive film according to the first embodiment of the present invention is again attached to a substrate, FIG. 7 is a cross-sectional view of essential parts in a joined state when the semiconductor device according to the first embodiment of the present invention is mounted again on the circuit board using the anisotropic conductive film. Embodiment 1 is
The present invention relates to the invention according to claim 1.
【0022】図1において、1は回路基板、2は入出力
電極、3は半導体装置、4は突起電極であり、Dは突起
電極先端径、dは入出力電極先端長、tは入出力電極厚
さ、Aは突起電極4の中心が搭載される位置である。図
2において、5は絶縁性接着剤、6は導電性粒子、7は
異方導電性フィルムである。図3において8はステー
ジ、9はアルミ電極、10はレベリングステージであ
り、図5において、Fは半導体装置除去時に半導体装置
に加える力である。In FIG. 1, 1 is a circuit board, 2 is an input / output electrode, 3 is a semiconductor device, 4 is a protruding electrode, D is the diameter of the protruding electrode tip, d is the input / output electrode tip length, and t is the input / output electrode. The thickness, A, is the position where the center of the bump electrode 4 is mounted. In FIG. 2, 5 is an insulating adhesive, 6 is a conductive particle, and 7 is an anisotropic conductive film. In FIG. 3, 8 is a stage, 9 is an aluminum electrode, 10 is a leveling stage, and in FIG. 5, F is a force applied to the semiconductor device when the semiconductor device is removed.
【0023】本実施の形態1はまず、回路基板形成時
に、入出力電極2を形成する下層の回路基板1の基材に
は半導体装置3を実装する際に印加する荷重により陥没
可能な柔軟な材料を使用し、また入出力電極2には半導
体装置3を実装する際に印加する荷重により割れの発生
がなく変形可能な材料を使用する。In the first embodiment, first, when the circuit board is formed, the base material of the lower-layer circuit board 1 for forming the input / output electrodes 2 is flexible and can be depressed by the load applied when the semiconductor device 3 is mounted. The material is used, and the input / output electrode 2 is made of a material that does not crack and is deformable by the load applied when the semiconductor device 3 is mounted.
【0024】更に図1のように入出力電極2の長さは半
導体装置3を実装する際に印加する荷重によりその先端
部分が入出力電極下の基材に入出力電極2の厚さt以上
陥没する程度の長さとする。具体的には突起電極4の先
端径Dに対して、入出力電極先端長さdはd=D/2で
あることが望ましい。Further, as shown in FIG. 1, the length of the input / output electrode 2 is not less than the thickness t of the input / output electrode 2 on the base material under the input / output electrode due to the load applied when the semiconductor device 3 is mounted. It should be long enough to collapse. Specifically, it is desirable that the input / output electrode tip length d be d = D / 2 with respect to the tip diameter D of the protruding electrode 4.
【0025】次に図2のように絶縁性接着剤5に導電性
粒子6が絶縁性を損なわない程度に分散されたものから
なる異方導電性フィルム7を入出力電極2を有する回路
基板1の上に貼り付ける。ここで、導電性粒子6はNi
粒子やAg粒子、或いは樹脂ボールに金属薄膜と絶縁膜
をコートした粒子等が用いられ、その直径は数μm程度
であり、数万個/mm2程度が混入されている。Next, as shown in FIG. 2, a circuit board 1 having an input / output electrode 2 is provided with an anisotropic conductive film 7 made of conductive particles 6 dispersed in an insulating adhesive 5 to such an extent that the insulating property is not impaired. Paste on top. Here, the conductive particles 6 are Ni
Particles or Ag particles, or particles obtained by coating a resin thin film with a metal thin film and an insulating film are used, and the diameter thereof is about several μm, and about tens of thousands / mm 2 are mixed.
【0026】一方、図3において150℃〜300℃に
加熱したステージ8上に真空吸着により半導体装置3を
固定し、公知のワイヤボンディング方式の1st工程と
同様の方法で突起電極4(以下、スタッドバンプとも称
する。)を半導体装置3上のアルミ電極9上に形成す
る。On the other hand, in FIG. 3, the semiconductor device 3 is fixed on the stage 8 heated to 150 ° C. to 300 ° C. by vacuum suction, and the protruding electrode 4 (hereinafter referred to as stud) is formed by the same method as the first step of the known wire bonding method. Bumps) are formed on the aluminum electrodes 9 on the semiconductor device 3.
【0027】ここで、半導体装置3のアルミ電極9上に
形成された数多くのスタッドバンプ4はこのままではそ
の高さがそれぞれ微妙に異なる。この状態では回路基板
1に機械的に接続した際に、回路基板1上の入出力電極
2に接触するスタッドバンプ4と回路基板1上の入出力
電極2に届かないスタッドバンプ4が存在してしまい、
電気的な接続が信頼性良く行うことができない。そこ
で、これらの高さの異なるスタッドバンプ4の高さを一
定の許容範囲内に揃えるために図3に示すようにレベリ
ングステージ10を使用して、1つの半導体装置3内全
てのスタッドバンプ4を同時に押さえ付け、全てのスタ
ッドバンプ4の高さをレベリングして揃える。Here, the many stud bumps 4 formed on the aluminum electrodes 9 of the semiconductor device 3 have slightly different heights as they are. In this state, when mechanically connected to the circuit board 1, there are stud bumps 4 that come into contact with the input / output electrodes 2 on the circuit board 1 and stud bumps 4 that do not reach the input / output electrodes 2 on the circuit board 1. Sisters,
The electrical connection cannot be made reliably. Therefore, in order to align the heights of the stud bumps 4 having different heights within a certain allowable range, a leveling stage 10 is used as shown in FIG. 3 to remove all the stud bumps 4 in one semiconductor device 3. Press down at the same time and level all stud bumps 4 in height.
【0028】次に、図4に示すように、レベリングを行
った半導体装置3を、先に処理済みの前記異方導電性フ
ィルム7を貼り付けた回路基板1上に位置決めして重ね
合わせる。最後に、加熱と加圧を同時に行って、スタッ
ドバンプ4の先端部と回路基板1上の入出力電極2との
間の距離を導電性粒子6の直径以下に維持した状態で絶
縁性接着剤5を硬化する。Next, as shown in FIG. 4, the leveled semiconductor device 3 is positioned and superposed on the circuit board 1 to which the previously processed anisotropic conductive film 7 is attached. Finally, heating and pressurizing are performed simultaneously to maintain the distance between the tip of the stud bump 4 and the input / output electrode 2 on the circuit board 1 to be equal to or less than the diameter of the conductive particle 6, and the insulating adhesive. Cure 5.
【0029】ここで絶縁性接着剤5は完全に硬化させ
ず、電気的接続は得られるが絶縁性接着剤5をある温度
にし、半導体装置3にある力を加えれば回路基板1から
半導体装置3が除去できる程度に硬化させる。このよう
にすることで、入出力電極2の先端部分は半導体装置3
を実装する際に印加される荷重により、突起電極4から
基材の方に押され、入出力電極2の高さ分だけ基材の中
に陥没した状態となっている。その後、半導体装置3自
体及び突起電極4と入出力電極2間の電気的接続に不具
合がないかどうか検査を行う。ここで不具合が発生して
いない場合は、さらに加熱・加圧を行い絶縁性接着剤5
を完全に硬化させる。Here, the insulating adhesive 5 is not completely cured and electrical connection is obtained, but if the insulating adhesive 5 is brought to a certain temperature and a certain force is applied to the semiconductor device 3, the circuit board 1 to the semiconductor device 3 are applied. To the extent that it can be removed. By doing so, the tip portion of the input / output electrode 2 is located at the semiconductor device 3
Due to the load applied when mounting, the bump electrode 4 is pushed toward the base material, and is depressed into the base material by the height of the input / output electrode 2. After that, the semiconductor device 3 itself and the electrical connection between the protruding electrode 4 and the input / output electrode 2 are inspected for defects. If no problem occurs here, the insulating adhesive 5 is further heated and pressed.
Completely cure.
【0030】一方、不具合が発生した場合には、図5の
ように、異方導電性フィルム7を絶縁性接着剤5が軟化
する温度にし、力Fを半導体装置3に加え、半導体装置
3を除去する。この時、絶縁性接着剤5により入出力電
極2を基材から剥がそうとする力が働くが、入出力電極
2の先端部分が基材の中に陥没しているため入出力電極
先端部分に働く力を低減でき、ピール強度が弱くても入
出力電極2の剥離は生じず、また入出力電極2自体の割
れも発生しない。On the other hand, when a failure occurs, as shown in FIG. 5, the anisotropic conductive film 7 is heated to a temperature at which the insulating adhesive 5 is softened, and a force F is applied to the semiconductor device 3 to turn the semiconductor device 3 on. Remove. At this time, a force acts to peel the input / output electrode 2 from the base material by the insulating adhesive 5. However, since the tip end portion of the input / output electrode 2 is depressed in the base material, The working force can be reduced, and the peeling of the input / output electrode 2 does not occur even if the peel strength is weak, and the input / output electrode 2 itself does not crack.
【0031】その後図6のようにもう一度異方導電性フ
ィルム7を回路基板1の上に貼り付け、突起電極4を形
成した半導体装置3を回路基板1上に位置決めして重ね
合わせる。この後加熱と加圧を同時に行い絶縁性接着剤
5を硬化させる。従って、再度半導体装置3を実装した
場合でも、図7のように入出力電極先端部分の跳ね上が
りによる半導体装置3への接触もなく、更に入出力電極
自体の断線の発生を抑えることができ、信頼性の高い安
定した電気的接続を得ることが出来る。Thereafter, as shown in FIG. 6, the anisotropic conductive film 7 is attached again on the circuit board 1, and the semiconductor device 3 having the protruding electrodes 4 formed thereon is positioned and superposed on the circuit board 1. After that, heating and pressurization are simultaneously performed to cure the insulating adhesive 5. Therefore, even when the semiconductor device 3 is mounted again, there is no contact with the semiconductor device 3 due to the jumping up of the tip of the input / output electrode as shown in FIG. 7, and it is possible to further suppress the occurrence of disconnection of the input / output electrode itself. It is possible to obtain stable and stable electrical connection.
【0032】尚、半導体装置3を実装する際に印加する
荷重により、入出力電極先端部分がその厚さ以上に回路
基板基材に陥没すれば、回路基板基材の柔軟さと入出力
電極2の長さは如何なるものであっても良い。また半導
体装置に形成する突起電極は、ワイヤボンディング方式
でなく公知のめっき装置(図示せず)にて形成した突起
電極(めっきバンプ)でも同様である。更に、異方導電
性フィルムによる電気的機械的接続のみならず、半導体
装置と回路基板との間に絶縁性接着剤を用いて半導体装
置を実装するフリップチップ実装においては、半導体装
置を回路基板に実装する際に加熱・加圧を行うすべての
実装方法においても同様である。If the tip portion of the input / output electrode is recessed in the circuit board base material by more than the thickness due to the load applied when mounting the semiconductor device 3, the flexibility of the circuit board base material and the input / output electrode 2 Any length can be used. The protruding electrodes formed on the semiconductor device may be the same as the protruding electrodes (plating bumps) formed by a known plating apparatus (not shown) instead of the wire bonding method. Furthermore, in the flip-chip mounting in which the semiconductor device is mounted by using an insulating adhesive between the semiconductor device and the circuit board, not only the electromechanical connection by the anisotropic conductive film, but the semiconductor device is mounted on the circuit board. The same applies to all mounting methods in which heating and pressing are performed when mounting.
【0033】(実施の形態2)図8は本発明の実施の形
態2における入出力電極の先端形状作成工程1図であ
り、図9は本発明の実施の形態2における入出力電極の
先端形状作成工程2図、図10は本発明の実施の形態2
における入出力電極の先端形状作成工程3図、図11は
本発明の実施の形態2における半導体装置と回路基板の
異方導電性フィルムを使用した場合の接合状態の要部断
面図、図12は本発明の実施の形態2における半導体装
置を除去した後の要部断面図である。実施の形態2は、
請求項2記載の発明に係るものである。(Embodiment 2) FIG. 8 is a drawing 1 of the tip shape forming process of the input / output electrode in the embodiment 2 of the present invention, and FIG. 9 is a tip shape of the input / output electrode in the embodiment 2 of the present invention. Creation Process 2 FIG. 10 and FIG. 10 show the second embodiment of the present invention.
11 is a sectional view of a main part of a joined state when an anisotropic conductive film of a semiconductor device and a circuit board according to the second embodiment of the present invention is used. FIG. FIG. 7 is a main-portion cross-sectional view after the semiconductor device is removed in the second embodiment of the present invention. Embodiment 2 is
The present invention relates to the invention described in claim 2.
【0034】図8において、1は回路基板、11は入出
力電極の厚さよりも深い凹部であり、図9において、1
2は回路基板1上に形成されためっきである。図10に
おいて、2は入出力電極、図11において、3は半導体
装置、4は突起電極、5は絶縁性接着剤、6は導電性粒
子、図12において、Fは半導体装置3を除去する際に
半導体装置3に加える力である。In FIG. 8, 1 is a circuit board, and 11 is a recess deeper than the thickness of the input / output electrodes.
Reference numeral 2 denotes a plating formed on the circuit board 1. 10, 2 is an input / output electrode, 3 is a semiconductor device, 4 is a protruding electrode, 5 is an insulating adhesive, 6 is a conductive particle, and F is a semiconductor device 3 in FIG. Force applied to the semiconductor device 3.
【0035】本実施の形態2はまず、図8のように内層
と表層とをつなぐビアを形成する際に入出力電極の先端
となる位置にも入出力電極2の厚さよりも深い凹部11
を設ける。次に、図9にように表層の入出力電極2およ
びその他の回路部用のめっき12を行い、エッチングす
ることにより入出力電極2及び表層の回路部(図示せ
ず)が形成される。このときの要部断面を図10に示
す。その後、絶縁性接着剤5に導電性粒子6が絶縁性を
損なわない程度に分散されたものからなる異方導電性フ
ィルム7を入出力電極2を有する回路基板1の上に貼り
付ける。これ以後の工程は実施の形態1に記載の通りで
ある。In the second embodiment, first, as shown in FIG. 8, a recess 11 which is deeper than the thickness of the input / output electrode 2 is formed at the tip of the input / output electrode when a via connecting the inner layer and the surface layer is formed.
To provide. Next, as shown in FIG. 9, plating 12 for the input / output electrodes 2 on the surface layer and other circuit parts is performed, and etching is performed to form the input / output electrodes 2 and the circuit part (not shown) on the surface layer. A cross section of the main part at this time is shown in FIG. After that, the anisotropic conductive film 7 made of the conductive adhesive 6 dispersed in the insulating adhesive 5 to the extent that the insulating property is not impaired is attached onto the circuit board 1 having the input / output electrodes 2. Subsequent steps are as described in the first embodiment.
【0036】半導体装置3を実装した状態を図11に示
す。半導体装置3を除去する場合には、絶縁性接着剤5
により入出力電極2を基材から剥がそうとする力が働く
が、入出力電極2の先端部分が基材に囲まれてくさびと
なるため、この剥がそうとする力に耐えうる。従って、
図12のように入出力電極2の剥離は生じず、また入出
力電極自体の割れも発生しない。FIG. 11 shows a state in which the semiconductor device 3 is mounted. When removing the semiconductor device 3, the insulating adhesive 5
Thus, a force acts to peel the input / output electrode 2 from the base material, but since the tip portion of the input / output electrode 2 is surrounded by the base material and becomes a wedge, it is possible to withstand the peeling force. Therefore,
As shown in FIG. 12, the input / output electrode 2 is not peeled off, and the input / output electrode itself is not cracked.
【0037】その後もう一度異方導電性フィルム7を回
路基板1の上に貼り付け、突起電極4を形成した半導体
装置3を回路基板1上に位置決めして重ね合わせる。こ
の後加熱と加圧を同時に行い絶縁性接着剤5を硬化させ
る。従って、再度半導体装置3を実装した場合でも、入
出力電極先端部分の跳ね上がりによる半導体装置3への
接触もなく、及び入出力電極2自体の断線の発生を抑え
ることができ、信頼性の高い安定した電気的接続を得る
ことが出来る。After that, the anisotropic conductive film 7 is attached again on the circuit board 1, and the semiconductor device 3 having the protruding electrodes 4 formed thereon is positioned and superposed on the circuit board 1. After that, heating and pressurization are simultaneously performed to cure the insulating adhesive 5. Therefore, even when the semiconductor device 3 is mounted again, there is no contact with the semiconductor device 3 due to the jump of the tip of the input / output electrode, and the occurrence of disconnection of the input / output electrode 2 itself can be suppressed, and the reliability is high and stable. The electrical connection can be obtained.
【0038】尚、半導体装置に形成する突起電極は、ワ
イヤボンディング方式でなく公知のめっき装置(図示せ
ず)にて形成した突起電極(めっきバンプ)でも同様で
ある。また、異方導電性フィルムによる電気的機械的接
続のみならず、半導体装置と回路基板との間に絶縁性接
着剤を用いて半導体装置を実装するフリップチップ実装
においては、すべての実装方法において同様である。The projection electrodes formed on the semiconductor device are not limited to the wire bonding method, and the projection electrodes (plating bumps) formed by a known plating apparatus (not shown) are the same. In addition, not only the electromechanical connection by the anisotropic conductive film but also the flip chip mounting in which the semiconductor device is mounted using the insulating adhesive between the semiconductor device and the circuit board is the same in all mounting methods. Is.
【0039】(実施の形態3)図13は本発明の実施の
形態3における入出力電極の先端形状作成工程1図であ
り、図14は本発明の実施の形態3における入出力電極
の先端形状作成工程2図、図15は本発明の実施の形態
3における半導体装置と回路基板の異方導電性フィルム
を使用した場合の接合状態の要部断面図、図16は本発
明の実施の形態3における半導体装置を除去した後の要
部断面図である。実施の形態3は、請求項3記載の発明
に係るものである。(Embodiment 3) FIG. 13 is a diagram showing a step 1 of forming a tip shape of an input / output electrode in a third embodiment of the present invention, and FIG. 14 is a tip shape of an input / output electrode in a third embodiment of the present invention. Manufacturing Step 2 FIGS. 15A and 15B are cross-sectional views of essential parts in a joined state when the anisotropic conductive film of the semiconductor device and the circuit board according to the third embodiment of the present invention are used, and FIG. 16 is the third embodiment of the present invention. FIG. 6 is a cross-sectional view of a main part after the semiconductor device in is removed. The third embodiment relates to the invention described in claim 3.
【0040】図13において、1は回路基板、2は入出
力電極であり、図14において、13は回路基材と同様
の材料である。図15において、3は半導体装置、4は
突起電極、5は絶縁性接着剤、6は導電性粒子、図16
において、Fは半導体装置を除去する際に半導体装置に
加える力である。In FIG. 13, 1 is a circuit board, 2 is an input / output electrode, and in FIG. 14, 13 is the same material as the circuit substrate. 15, 3 is a semiconductor device, 4 is a protruding electrode, 5 is an insulating adhesive, 6 is a conductive particle, and FIG.
In, F is a force applied to the semiconductor device when the semiconductor device is removed.
【0041】本実施の形態3はまず、図13のように、
回路形成部分にエッチングレジストを設けエッチングに
より回路部を形成するサブトラクティブ法にて回路基板
1を形成する工程において、回路部を形成した後、回路
部下の基材と同等の材料を回路基板全体に塗布する。そ
の後、入出力電極2の上部に塗布した基材のみを除去す
ることにより、図14のように入出力電極2の側面は基
材と同様の材料13に覆われ、表面のみがむき出しにな
ったアディティブ法にて作成したのと同様な形状の回路
基板が形成される。In the third embodiment, first, as shown in FIG.
In the step of forming the circuit board 1 by a subtractive method in which an etching resist is provided on the circuit forming portion to form the circuit portion by etching, after forming the circuit portion, a material equivalent to the base material under the circuit portion is formed on the entire circuit board. Apply. Then, by removing only the base material applied to the upper part of the input / output electrode 2, the side surface of the input / output electrode 2 was covered with the same material 13 as the base material as shown in FIG. 14, and only the surface was exposed. A circuit board having the same shape as that formed by the additive method is formed.
【0042】その後、絶縁性接着剤5に導電性粒子6が
絶縁性を損なわない程度に分散されたものからなる異方
導電性フィルム7を入出力電極2を有する回路基板1の
上に貼り付ける。これ以後の工程は実施の形態1に記載
の通りである。Thereafter, an anisotropic conductive film 7 made of conductive particles 6 dispersed in an insulating adhesive 5 to such an extent that the insulating property is not impaired is attached onto the circuit board 1 having the input / output electrodes 2. . Subsequent steps are as described in the first embodiment.
【0043】このようにすることで、図15のように半
導体装置3を実装した後でも入出力電極2の周辺は基材
に囲まれているため、絶縁性接着剤5と密着している部
分は入出力電極2の上面だけである。したがって、半導
体装置3を除去する場合でも、入出力電極2を基材から
剥がそうとする力は入出力電極2の上面にのみにしか働
かず周辺を基材で囲まれているため、図16のように入
出力電極2を引き剥がすには至らない。よって入出力電
極2の剥離は生じず、また入出力電極2自体の割れも発
生しない。By doing so, the periphery of the input / output electrode 2 is surrounded by the base material even after the semiconductor device 3 is mounted as shown in FIG. Is only the upper surface of the input / output electrode 2. Therefore, even when the semiconductor device 3 is removed, the force for peeling the input / output electrode 2 from the base material acts only on the upper surface of the input / output electrode 2, and the periphery is surrounded by the base material. As in the above, the input / output electrode 2 cannot be peeled off. Therefore, the input / output electrode 2 is not peeled off, and the input / output electrode 2 itself is not cracked.
【0044】その後もう一度異方導電性フィルム7を回
路基板1の上に貼り付け、突起電極4を形成した半導体
装置3を回路基板1上に位置決めして重ね合わせる。こ
の後加熱と加圧を同時に行い絶縁性接着剤5を硬化させ
る。従って、再度半導体装置3を実装した場合でも、入
出力電極先端部分の跳ね上がりによる半導体装置3への
接触もなく、及び入出力電極2自体の断線の発生を抑え
ることができ、信頼性の高い安定した電気的接続を得る
ことが出来る。After that, the anisotropic conductive film 7 is attached again on the circuit board 1, and the semiconductor device 3 having the protruding electrodes 4 formed thereon is positioned and superposed on the circuit board 1. After that, heating and pressurization are simultaneously performed to cure the insulating adhesive 5. Therefore, even when the semiconductor device 3 is mounted again, there is no contact with the semiconductor device 3 due to the jump of the tip of the input / output electrode, and the occurrence of disconnection of the input / output electrode 2 itself can be suppressed, and the reliability is high and stable. The electrical connection can be obtained.
【0045】尚、半導体装置に形成する突起電極は、ワ
イヤボンディング方式でなく公知のめっき装置(図示せ
ず)にて形成した突起電極(めっきバンプ)でも同様で
ある。また、異方導電性フィルムによる電気的機械的接
続のみならず、半導体装置と回路基板との間に絶縁性接
着剤を用いて半導体装置を実装するフリップチップ実装
においては、すべての実装方法において同様である。The projection electrodes formed on the semiconductor device are not limited to the wire bonding method, and the projection electrodes (plating bumps) formed by a known plating apparatus (not shown) are the same. In addition, not only the electromechanical connection by the anisotropic conductive film but also the flip chip mounting in which the semiconductor device is mounted using the insulating adhesive between the semiconductor device and the circuit board is the same in all mounting methods. Is.
【0046】[0046]
【発明の効果】以上のように請求項1記載の発明によれ
ば、半導体装置自体及び突起電極と入出力電極間の電気
的接続に不具合発生し、半導体装置を除去しても入出力
電極の剥離は生じず、また入出力電極自体の割れも発生
しない。従って、再度半導体装置を実装した場合でも、
入出力電極先端部分の跳ね上がりによる半導体装置への
接触もなく、及び入出力電極自体の断線の発生を抑える
ことができ、信頼性の高い安定した電気的接続を得るこ
とが出来る。As described above, according to the first aspect of the invention, a problem occurs in the electrical connection between the semiconductor device itself and the protruding electrode and the input / output electrode. Peeling does not occur, and the input / output electrodes themselves do not crack. Therefore, even when the semiconductor device is mounted again,
There is no contact with the semiconductor device due to the jumping up of the tip of the input / output electrode, and the occurrence of disconnection of the input / output electrode itself can be suppressed, and reliable and stable electrical connection can be obtained.
【0047】また、請求項2〜4記載の発明によれば、
入出力電極先端部分の跳ね上がりによる半導体装置への
接触もなく、及び入出力電極自体の断線の発生を抑える
ことができ、信頼性の高い安定した電気的接続を得るこ
とが出来る。According to the invention described in claims 2 to 4 ,
Without contact to the semiconductor device according to bounce input and output electrode tip portion, and input and output the occurrence of disconnection of the electrode itself can be suppressed, it is possible to obtain electrical connection reliable and stable.
【図1】本発明の実施の形態1における入出力電極形状
の一例を示す断面図FIG. 1 is a sectional view showing an example of an input / output electrode shape according to a first embodiment of the present invention.
【図2】本発明の実施の形態1における異方導電性フィ
ルムを基板に貼った状態の断面図FIG. 2 is a sectional view showing a state in which the anisotropic conductive film according to Embodiment 1 of the present invention is attached to a substrate.
【図3】本発明の実施の形態1におけるスタッドバンプ
の形成工程図FIG. 3 is a process diagram of forming a stud bump according to the first embodiment of the present invention.
【図4】本発明の実施の形態1における半導体装置と回
路基板の異方導電性フィルムを使用した場合の接合状態
の要部断面図FIG. 4 is a cross-sectional view of essential parts in a joined state when using an anisotropic conductive film for a semiconductor device and a circuit board according to the first embodiment of the present invention.
【図5】本発明の実施の形態1における半導体装置を除
去した後の要部断面図FIG. 5 is a cross-sectional view of essential parts after the semiconductor device according to the first embodiment of the present invention is removed.
【図6】本発明の実施の形態1における再度異方導電性
フィルムを基板に貼った状態の断面図FIG. 6 is a cross-sectional view showing a state in which the anisotropic conductive film is again attached to the substrate according to the first embodiment of the present invention.
【図7】本発明の実施の形態1における再度半導体装置
を回路基板に異方導電性フィルムを使用して実装した場
合の接合状態の要部断面図FIG. 7 is a cross-sectional view of essential parts in a joined state when the semiconductor device according to the first embodiment of the present invention is mounted again on the circuit board using the anisotropic conductive film.
【図8】本発明の実施の形態2における入出力電極の先
端形状作成工程1図FIG. 8 is a diagram illustrating a step 1 of forming a tip shape of an input / output electrode according to the second embodiment of the present invention.
【図9】本発明の実施の形態2における入出力電極の先
端形状作成工程2図FIG. 9 is a diagram showing a step 2 of forming tip shapes of input / output electrodes according to the second embodiment of the present invention.
【図10】本発明の実施の形態2における入出力電極の
先端形状作成工程3図FIG. 10 is a diagram 3 of a step of forming the tip shape of the input / output electrode according to the second embodiment of the present invention.
【図11】本発明の実施の形態2における半導体装置と
回路基板の異方導電性フィルムを使用した場合の接合状
態の要部断面図FIG. 11 is a cross-sectional view of essential parts in a joined state when using an anisotropic conductive film for a semiconductor device and a circuit board according to a second embodiment of the present invention.
【図12】本発明の実施の形態2における半導体装置を
除去した後の要部断面図FIG. 12 is a cross-sectional view of essential parts after the semiconductor device according to the second embodiment of the present invention is removed.
【図13】本発明の実施の形態3における入出力電極の
先端形状作成工程1図FIG. 13 is a diagram showing a step 1 of forming tip shapes of input / output electrodes according to the third embodiment of the present invention.
【図14】本発明の実施の形態3における入出力電極の
先端形状作成工程2図FIG. 14 is a diagram illustrating a step 2 of forming tip shapes of input / output electrodes according to the third embodiment of the present invention.
【図15】本発明の実施の形態3における半導体装置と
回路基板の異方導電性フィルムを使用した場合の接合状
態の要部断面図FIG. 15 is a cross-sectional view of essential parts in a joined state when using an anisotropic conductive film for a semiconductor device and a circuit board according to a third embodiment of the present invention.
【図16】本発明の実施の形態3における半導体装置を
除去した後の要部断面図FIG. 16 is a cross-sectional view of essential parts after the semiconductor device according to the third embodiment of the present invention is removed.
【図17】従来の方法における異方導電性フィルムを基
板に貼った状態の断面図FIG. 17 is a sectional view showing a state in which an anisotropic conductive film is pasted on a substrate by a conventional method.
【図18】従来の方法における半導体装置と回路基板の
異方導電性フィルムを使用した場合の接合状態の要部断
面図FIG. 18 is a cross-sectional view of essential parts in a joined state when an anisotropic conductive film for a semiconductor device and a circuit board is used in a conventional method.
【図19】従来の方法における半導体装置を除去した後
の要部断面図FIG. 19 is a cross-sectional view of essential parts after the semiconductor device is removed by a conventional method.
【図20】従来の方法における再度半導体装置を回路基
板に異方導電性フィルムを使用して実装した場合の接合
状態の要部断面図FIG. 20 is a cross-sectional view of essential parts in a joined state when the semiconductor device is mounted again on the circuit board using the anisotropic conductive film in the conventional method.
1 回路基板 2 入出力電極 3 半導体装置 4 突起電極(スタッドバンプ) 5 絶縁性接着剤 6 導電性粒子 7 異方導電性フィルム 1 circuit board 2 input / output electrodes 3 Semiconductor device 4 Projection electrode (stud bump) 5 Insulating adhesive 6 Conductive particles 7 Anisotropic conductive film
Claims (3)
着剤を介して、柔軟性を有する回路基板に実装する実装
方法であって、 半導体装置を回路基板上に位置決めして重ね合わせ、加
熱と加圧を同時に行って入出力電極の先端部分が突起電
極から押されて回路基板の基材に陥没した状態で、絶縁
性接着剤を完全に硬化させずに回路基板から半導体装置
を除去できる程度に硬化させる工程と、突起電極と入出
力電極間の電気的接続に不具合がないかどうか検査を行
う工程とを含み、 不具合が発生していない場合は、さらに加熱を行って絶
縁性接着剤を完全に硬化させ、一方、不具合が発生した
場合は、半導体装置を回路基板から剥がして除去するこ
とを特徴とする半導体装置の実装方法。1. A mounting method for mounting a semiconductor device having a protruding electrode on a flexible circuit board via an insulating adhesive, wherein the semiconductor device is positioned and superposed on the circuit board and heated. The semiconductor device can be removed from the circuit board without completely curing the insulating adhesive when the tip of the input / output electrode is pressed by the protruding electrode and depressed into the base material of the circuit board by simultaneously applying pressure and Including the step of curing to a certain degree and the step of inspecting whether there is a defect in the electrical connection between the protruding electrode and the input / output electrode. If no defect occurs, further heating is performed to insulate the insulating adhesive. A method for mounting a semiconductor device, characterized in that the semiconductor device is completely cured, and on the other hand, when a defect occurs, the semiconductor device is peeled off from the circuit board and removed.
着剤を介して、入出力電極の先端をこの入出力電極の厚
さよりも深い凹部に位置させた回路基板に実装する実装
方法であって、 半導体装置を回路基板上に位置決めして重ね合わせ、加
熱と加圧を同時に行って絶縁性接着剤を完全に硬化させ
ずに回路基板から半導体装置を除去できる程度に硬化さ
せる工程と、突起電極と入出力電極間の電気的接続に不
具合がないかどうか検査を行う工程とを含み、 不具合が発生していない場合は、さらに加熱を行って絶
縁性接着剤を完全に硬化させ、一方、不具合が発生した
場合は、半導体装置を回路基板から剥がして除去するこ
とを特徴とする半導体装置の実装方法。2. A semiconductor device having a protruding electrode, wherein the tip of the input / output electrode is provided with a thickness of the input / output electrode via an insulating adhesive.
This is a mounting method for mounting on a circuit board located in a deeper recess than the above. The semiconductor device is positioned and superposed on the circuit board, and heating and pressing are performed at the same time without completely curing the insulating adhesive. Including the step of curing the semiconductor device to the extent that the semiconductor device can be removed from the circuit board, and the step of inspecting the electrical connection between the protruding electrodes and the input / output electrodes for defects. A method of mounting a semiconductor device, further comprising heating to completely cure the insulating adhesive, and when a defect occurs, the semiconductor device is peeled off from the circuit board and removed.
部分の厚さよりも深い凹部が設けられた回路基板に対峙
させ、絶縁性接着剤を介して前記回路基板に実装する半
導体装置の実装構造であって、 前記入出力電極の先端部分を、前記突起電極の搭載され
る位置より低い凹部に位置させたことを特徴とする半導
体装置の実装構造。3. The protruding electrode of the semiconductor device is connected to the tip of the input / output electrode.
A mounting structure of a semiconductor device, which is mounted on the circuit board via an insulating adhesive, facing a circuit board having a recess deeper than the thickness of the portion, wherein the tip portion of the input / output electrode is provided with the protrusion. A mounting structure for a semiconductor device, wherein the mounting structure is located in a recess lower than a position where an electrode is mounted.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17792899A JP3509642B2 (en) | 1999-06-24 | 1999-06-24 | Semiconductor device mounting method and mounting structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17792899A JP3509642B2 (en) | 1999-06-24 | 1999-06-24 | Semiconductor device mounting method and mounting structure |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2001007157A JP2001007157A (en) | 2001-01-12 |
| JP3509642B2 true JP3509642B2 (en) | 2004-03-22 |
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ID=16039529
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|---|---|---|---|
| JP17792899A Expired - Fee Related JP3509642B2 (en) | 1999-06-24 | 1999-06-24 | Semiconductor device mounting method and mounting structure |
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| Country | Link |
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| WO2004107432A1 (en) | 2003-05-29 | 2004-12-09 | Fujitsu Limited | Packaging method of electronic component, removing method and devices therefor |
| JP2010027717A (en) * | 2008-07-16 | 2010-02-04 | Sharp Corp | Production process of semiconductor device and semiconductor device |
| WO2010151600A1 (en) | 2009-06-27 | 2010-12-29 | Michael Tischler | High efficiency leds and led lamps |
| US8653539B2 (en) | 2010-01-04 | 2014-02-18 | Cooledge Lighting, Inc. | Failure mitigation in arrays of light-emitting devices |
| JP5512888B2 (en) | 2010-06-29 | 2014-06-04 | クーレッジ ライティング インコーポレイテッド | Electronic device with flexible substrate |
| CN105870312B (en) * | 2010-06-29 | 2020-01-31 | 柯立芝照明有限公司 | Electronic device with flexible substrate |
| US9231178B2 (en) | 2012-06-07 | 2016-01-05 | Cooledge Lighting, Inc. | Wafer-level flip chip device packages and related methods |
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