JP3187086B2 - Semiconductor device and method for manufacturing semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin film semiconductor device such as a thin film transistor which is excellent in reliability and mass productivity and has a high yield, and a method of manufacturing the same. The present invention is applied to a driving circuit such as a liquid crystal display or a thin film image sensor, a three-dimensional integrated circuit, or the like as an application field thereof.

[0002]

2. Description of the Related Art Conventionally, a semiconductor integrated circuit has mainly been a monolithic type formed on a semiconductor substrate such as silicon. However, in recent years, an attempt has been made to form a semiconductor integrated circuit on an insulating substrate such as glass or sapphire. . The reason is that the operating speed is improved by reducing the parasitic capacitance between the substrate and the wiring, and that the glass material such as quartz is inexpensive because there is no size limitation like a silicon wafer, This is because the separation between elements is easy, and a latch-up phenomenon which is a problem particularly in a CMOS monolithic integrated circuit does not occur. In addition, apart from the above reasons, in liquid crystal displays and contact image sensors,
Since a semiconductor element and a liquid crystal element or a photodetection element need to be integrally formed, it is necessary to form a thin film transistor (TFT) on a transparent substrate.

For these reasons, thin-film semiconductor elements have been formed on insulating substrates. FIG. 5 shows a TFT as an example of a conventional thin film semiconductor device. As shown in the figure, a film 503 such as silicon oxide is formed as a passivation film on an insulating substrate 501, and a TFT is formed thereon independently of other TFTs. TFT
Are a source (drain) region 507 and a drain (source) region 509, a channel formation region (also simply referred to as a channel region) 508 sandwiched therebetween, a gate insulating film 504, and a gate electrode 510, similarly to the MOSFET of the monolithic integrated circuit. And a source (drain) electrode 511
And a drain (source) electrode 512. Also,
An interlayer insulator 506 such as PSG is provided to enable multilayer wiring.

The example shown in FIG. 5 is called a forward coplanar type, but the TFT is also called an inverse coplanar type, a forward stagger type, or an inverse stagger type depending on the arrangement of the gate electrode and the channel region. Although there is a form, the details will be left to other documents and will not be described further here.

[0005]

In a monolithic integrated circuit, contamination by alkali ions such as sodium and potassium or transition metal ions such as iron, copper and nickel is a serious problem. Great care has been taken to stop it. TFT
But the problem of these ions is equally serious, and attention is paid to cleaning the production process to minimize contamination. In addition, measures are taken to prevent these contaminations from reaching the element.

The difference between a thin film semiconductor device and a monolithic integrated circuit is that the concentration of contaminant ions in the substrate is relatively high. In other words, single-crystal silicon used for monolithic integrated circuits has been produced to eliminate these harmful contaminants with the accumulation of technology for many years. Is 10 ¹⁰ cm ⁻³ or less.

However, in general, the concentration of contaminant elements in an insulating substrate for a thin film semiconductor element is not low. Of course, for single-crystal substrates such as spinel substrates and sapphire substrates,
Although it is theoretically possible to reduce the concentration of the foreign element which is the above-mentioned pollution source, it is not practical from a profit viewpoint. Also,
Quartz substrates can be ideally prevented from invading foreign elements if they are manufactured by a gas phase reaction using high-purity silane gas and oxygen as raw materials.However, since the structure is amorphous, the foreign elements are once incorporated. It is difficult to discharge this to the outside when it is spilled. In addition, it is necessary to use a low-price substrate for the substrate used for the liquid crystal display, particularly because the cost problem is prioritized. In such a case, in order to facilitate manufacture and processing, various kinds of foreign elements are used from the beginning. It contains. Some of these foreign elements themselves are not preferable for the semiconductor element, and in the process of adding these foreign elements, they may be mixed in from the outside or may be contained as impurities in the added material.

For example, TN glass is an inexpensive glass substrate having good heat resistance and a coefficient of thermal expansion close to that of silicon. Therefore, TN glass is preferable as a substrate for a liquid crystal display, but contains about 5% of lithium. Part of this lithium is ionized and enters the semiconductor element as mobile ions, resulting in deterioration of the element. In addition, it is difficult to produce lithium having a high purity of 99% or more.
% Of sodium. The ionization rate of sodium is as large as about 10%, and this sodium ion has a very serious effect on the characteristics of the device.

In a conventional thin-film semiconductor device, as shown in FIG. 5, silicon oxide or the like is used as a passivation film, and PSG or BPSG is used as an interlayer insulator for the penetration of mobile ions. Have been addressed by gettering these mobile ions.
However, it has been difficult to sufficiently prevent contamination by these methods. An object of the present invention is to prevent the element from deteriorating due to penetration of these contaminant elements and ions.

[0010]

According to the present invention, in order to suppress the above-mentioned contamination, a film having a blocking effect on mobile ions such as silicon nitride, aluminum oxide and tantalum oxide (blocking film) is formed on the lower and upper portions of the thin film semiconductor device, respectively. forming a film), and further, a semiconductor film (channel region constituting the TFT) or either one of the gate insulating film, or both, chlorine, 10 ²⁰ 1 × 10 ¹⁸ to 5 × a halogen element such as fluorine / cm ^-3 , preferably 1 × 1
0 ¹⁹ to 1 × 10 ²⁰ particles / cm ³ . The halogen element strongly binds to mobile ions such as sodium in the semiconductor film or the insulating film, and has an effect of significantly reducing the effect.

A typical example of the present invention is shown in FIG. FIG. 1 shows a TFT using the present invention. That is, the first silicon nitride film 102 is formed on the insulating substrate 101 as a first blocking film. The first silicon nitride film has an effect of preventing contamination from the substrate. Then, a film 103 having good adhesion to a silicon material such as silicon oxide is formed over the first silicon nitride film. If a semiconductor film is formed directly on the first silicon nitride without forming the film 103 and a TFT is manufactured, the channel region becomes conductive due to trap levels generated at the interface between the silicon nitride and the semiconductor material. Will not work. Therefore, it is important to provide such a buffer.

On the film 103, a TFT is formed. T
FT includes a source (drain) region 107 and a drain (source) region 109, and a channel region 10 interposed therebetween.
8, a gate insulating film 104 and a gate electrode 110.
The source, drain, and channel regions of the TFT are formed of a single crystal, polycrystal, or amorphous semiconductor material. As the semiconductor material, for example, silicon, germanium, silicon carbide, and alloys thereof can be used.

Then, a second silicon nitride film 105 is formed as a second blocking film covering the TFT. Here, it is a feature of the present invention that the second silicon nitride film is formed after the fabrication of the TFT and before the electrode is formed on the source and / or the drain. In the related art, a silicon nitride film as a final passivation film is formed after the formation of an electrode, but the present invention has a different purpose from a silicon nitride film formed in such a meaning. That is, the second silicon nitride film in the present invention is formed to enclose the TFT together with the first silicon nitride film, and is intended to prevent contamination in the electrode forming step after the TFT is formed. Is what you do. Therefore, after a TFT and its associated electrodes and wirings are formed according to the present invention, a silicon nitride film may be formed as a final passivation film as in the related art.

After the formation of the second silicon nitride film, an interlayer insulating film 106 is formed using an interlayer insulating material, for example, PSG, and a source (drain) electrode 111 and a drain (source) electrode 112 are formed. As described above, aluminum oxide or tantalum oxide may be used as the blocking film in addition to silicon nitride.

In the example of FIG. 1, however, the gate insulating film extends far away, and mobile ions and the like extend from the end of the gate insulating film.
There is a possibility of entering the inside of the FT. An improvement of this is the example shown in FIG. 2, in which the gate insulating film is only on the TFT, so that there is no problem as in FIG. However,
In this case, since the source region and the drain region in the portion adjacent to the channel region are in contact with the silicon nitride film, the silicon nitride in this portion is polarized by the gate voltage or traps electrons to hinder the operation of the TFT. Sometimes.

FIG. 3 shows an example which overcomes the above problem.
Here, the source region and the drain region adjacent to the channel region are not adjacent to the silicon nitride film. Therefore, the difficulties of polarization of silicon nitride and electron trap are solved. However, when a self-alignment process using a gate electrode as a mask is employed in forming the source and drain regions, an acceptor or a donor element must be implanted through a gate insulating film in this example, as in the example of FIG. Therefore, if the ion implantation method is adopted, it is necessary to increase the acceleration energy of the ions. At this time, as a result of implanting high-speed ions, the source and drain regions may be expanded due to the secondary scattering.

In FIG. 2, reference numeral 201 denotes an insulating substrate;
2 is a first silicon nitride film, 203 is a buffer insulating film such as silicon oxide, 204 is a gate insulating film, 205 is a second silicon nitride film, 206 is an interlayer insulating film, and 207 is a source (drain).
Region, 208 is a channel region, 209 is a drain (source) region, 210 is a gate electrode, 211 is a source (drain) electrode, and 212 is a drain (source) electrode.
In FIG. 3, reference numeral 301 denotes an insulating substrate; 302, a first silicon nitride film; 303, a buffer insulating film such as silicon oxide;
304, a gate insulating film; 305, a second silicon nitride film;
06 is an interlayer insulating film, 307 is a source (drain) region,
308 is a channel region, 309 is a drain (source) region, 310 is a gate electrode, 311 is a source (drain)
The electrode 312 is a drain (source) electrode.

In the present invention, when a silicon nitride film is used as a blocking film, x = 1.0 to x = 1.7 is suitable when represented by a chemical formula of SiN _x , and in particular, x = 1.
Stoichiometric composition from 3 to x = 1.35 (x = 1.33)
Good results were obtained with or near. Therefore, in the present invention, it was better to form silicon nitride by a low pressure CVD method. However, it goes without saying that even with a silicon nitride film formed by a plasma CVD method or a photo CVD method, the reliability of the element is improved as compared with the case where the present invention is not used.

If a silicon nitride film is to be formed by a low pressure CVD method, dichlorosilane (S
iCl ₂ H ₂ ) and ammonia (NH ₃ ) at a pressure of 1
500 to 800 ° C at 0 to 1000 Pa, preferably 55
The reaction may be performed at 0 to 750 ° C. Of course, silane (SiH ₄ ) or tetrachlorosilane (SiCl ₄ ) may be used.

In the present invention, even when an aluminum oxide film or a tantalum oxide film is used, a stoichiometric composition having a composition closer to Al ₂ O ₃ or Ta ₂ O ₅ yielded better results. These films are formed by a CVD method or a sputtering method. For example, the aluminum oxide film may be formed by oxidizing trimethylaluminum Al (CH ₃ ) ₃ with nitrogen oxide (N ₂ O, NO, NO ₂ ).

If the present invention is to be implemented more effectively,
The concentration of hydrogen atoms in the semiconductor film of a thin film semiconductor device such as a TFT is four times or less than the concentration of added halogen atoms.
Preferably, it is desired to be 1 or less, and carbon,
It is desired that the concentration of harmful elements such as nitrogen and oxygen is 7 × 10 ¹⁹ cm ⁻³ or less, preferably 1 × 10 ¹⁹ cm ⁻³ or less. Further, the concentration of mobile ions such as sodium, lithium and potassium contained in the semiconductor film is desired to be 5 × 10 ¹⁸ cm ⁻³ or less. In order to achieve the above object, it is desired to pay sufficient attention to the raw material gas and use a high-purity gas of 5N or more. Furthermore, although the present invention is based on the use of an insulating substrate containing a large amount of a mobile ion source, if the present invention is to be implemented more effectively, the first silicon nitride may be used in such a substrate. When forming the film, it is preferable that the periphery of the substrate be covered with the silicon nitride film without leakage. In such a state, in the subsequent handling, the probability that mobile ions originating from the substrate will be mixed into the element region can be significantly reduced.

FIG. 4 shows an example of forming a low impurity concentration drain (LDD), which is a known technique, using the present invention. First, a silicon nitride film 402 having a thickness of 50 to 1000 nm is formed on an insulating substrate 401 such as quartz or AN glass by a low pressure CVD method. At this time, as described above, if the back surface of the substrate is also covered with the silicon nitride film, the probability that mobile ions generated from the back surface reach the front surface in a later step is significantly reduced, It is also preferable to maintain cleanliness. A silicon oxide film 403 for buffering is formed on the silicon nitride film by the same low pressure CVD method to a thickness of 50 to 1000 nm. At this time, hydrogen chloride (HCl), nitrogen fluoride (NF ₃ or N ₂ F ₄ ) having a volume ratio of 3% to 6%, for example, about 5% in the raw material gas,
If a gas containing halogen such as chlorine (Cl ₂ ), fluorine (F ₂ ), various types of chlorofluorocarbon, or carbon tetrachloride (CCl ₄ ) is mixed in, a halogen element such as chlorine or fluorine is contained in the obtained silicon oxide film. It is captured.

Since this halogen binds to an alkali ion such as sodium and fixes sodium, a greater effect can be obtained in preventing sodium contamination. However, excessive addition of halogen is not preferable because it makes the film rough and deteriorates adhesion and surface flatness. Also, low pressure CVD
Also in the case where the film is formed by a photo CVD method or a plasma CVD method instead of the method, the gas containing the above-mentioned halogen element may be mixed in the raw material gas at 2 to 5% by volume. Further, when the coating is formed by a sputtering method,
The halogen gas may be mixed in the sputtering atmosphere at 2 to 20% by volume. In the case of the sputtering method, the gas composition in the atmosphere is hardly reflected on the composition of the coating film.
It is necessary to make the concentration slightly higher than in the case of the method D.

Next, an amorphous silicon film or a microcrystalline or polycrystalline silicon film is formed to a thickness of 20 to 50 by a low pressure CVD method, a plasma CVD method, or a sputtering method.
Only 0 nm is formed. Then, this is etched on the island. When forming this silicon film, the coating 40
As in the case of forming No. 3, a halogen element is preferably introduced into the film. The method of introducing the halogen element is described in
As in the case of 3, a gas containing halogen may be mixed in the atmosphere at the time of forming the film, or after forming the film,
It may be introduced by an ion implantation method. At this time, the concentration of the halogen element in the coating is 1 × 10 ^{18 to} 5 × 10 ^20.
Pieces / cm ³ , preferably 1 × 10 ¹⁹ to 1 × 10 ²⁰ pieces / c
The concentration of the source gas must be controlled so as to be m ³ .

Furthermore, when the concentration of hydrogen atoms in the coating is at most 4 times, preferably at most 1 time, the concentration of halogen, the effect of halogen addition is further improved. This effect is explained as follows. Hydrogen atoms are necessary for terminating dangling bonds in silicon, but the bonds are weak and easily broken.
On the other hand, a halogen element is strongly bonded to silicon. if,
If there is an excess of hydrogen in the silicon (which also means that there are many dangling bonds in the coating), most of the halogens will bind to the silicon, resulting in gettering of mobile ions moving through the coating. I can't ring. Therefore, it is presumed that the effect of adding halogen is small in silicon having a high hydrogen concentration, and the effect of adding halogen is large in silicon having a low hydrogen concentration.

In a semiconductor film such as silicon, the concentration of carbon, nitrogen and oxygen as harmful elements other than mobile ions is 7 × 10 ¹⁹ / cm ³ or less, preferably 1 × 10 ¹⁹ / cm ³ or less.
It is desired that the number be 10 ¹⁹ / cm ³ or less. This is because these elements are not removed even by adding halogen.

Furthermore, although mobile ions such as sodium, lithium and potassium can be gettered by the addition of halogen, their effects are negated if they are present in excess, so that the concentration of these mobile ions is It is desired that the number be 5 × 10 ¹⁸ / cm ³ or less.

On the thus formed silicon film, a gate insulating film having a thickness of 10 to 200 nm is formed.
Is formed by a low pressure CVD method or a sputtering method. At this time, as described above, it is preferable to mix a halogen material gas in the source gas or the sputtering gas.

Then, a polycrystalline or microcrystalline silicon film doped with phosphorus to about 10 ²¹ cm ^-3 is formed thereon by low pressure CVD or plasma CVD. Then, the silicon film and a gate insulating film (silicon oxide) thereunder are patterned to form a gate electrode 410 and a gate insulating film 404.

Further, ion implantation is performed in a self-aligned manner using the gate electrode as a mask to form a source (drain) region 407 and a drain (source) region 408 having a relatively low impurity concentration (about 10 ¹⁷ to 10 ¹⁹ cm ⁻³ ). To form A portion where the impurity has not been implanted remains as a channel region 408. Thus, FIG. 4A is obtained.

Next, as shown in FIG.
The PSG film 413 is formed entirely by the method. Then, this is etched by a known directional etching to form a side wall 414 beside the gate electrode. afterwards,
The ion implantation is performed again, and the source (drain) region 407a and the drain (source) region 4
09a is formed. A region with a low impurity concentration includes a source (drain) region 407b and a drain (source) region 409.
As b, LDD is formed. Thus, FIG.
Get.

Thereafter, as shown in FIG.
The silicon nitride film 405 is entirely formed to a thickness of 50 by the VD method.
To 1000 nm. Thereafter, the silicon film is crystallized by low-temperature annealing at, for example, about 600 ° C., and the source and drain regions are activated. This step may be performed by laser annealing. In this way, a TFT intermediate is obtained.

The example of FIG. 4 is merely an example of the present invention, and it will be apparent that the present invention is not limited to the steps described above. In the example of FIG. 4, as in the example of FIG. 3, there is no portion where the silicon nitride film, the gate electrode, and the source or drain region are adjacent to each other. That is, unlike the case of FIG. 2, since the side wall 414 exists, there is no problem as shown in FIG. Further, unlike FIG. 3, there is a feature that the addition of the donor or the acceptor can be easily performed without passing through the insulating film.

[0034]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The characteristics of a TFT using the present invention will be described. The TFT used in this embodiment is an LDD type TFT manufactured on a quartz glass substrate according to the process shown in FIG.
First, a silicon nitride film 402 having a thickness of 100 was formed on a quartz glass substrate 401 and on the back surface of the substrate by a low pressure CVD method.
In addition, a silicon oxide film (also referred to as a low-temperature oxide film (LTO film)) 403 is continuously formed with a thickness of 200 nm by a low-pressure CVD method, and finally, an amorphous silicon film is also formed by a low-pressure CVD method. A thickness of 30 nm was formed. At this time, the maximum process temperature was 600 ° C. And
In the above steps, the film was formed in a CVD apparatus including three reaction chambers arranged continuously. However, when forming the silicon oxide film and the amorphous silicon film, a halogen-added gas was used in addition to the material gas. The reaction was performed by adding 5% by volume of hydrogen chloride gas (HCl). As a result, chlorine could be added to the silicon oxide film and the amorphous silicon film. In the analysis by secondary ion mass spectrometry, the concentration of chlorine in the silicon oxide film and the concentration of chlorine in the amorphous silicon film was 2.3 × 10
^{It was 19} pieces / cm ³ and 3.1 × 10 ¹⁹ pieces / cm ^-3 . Dichlorosilane (SiCl ₂ H ₂ ) and ammonia (NH ₃ ) are used as source gases for the silicon nitride film, and disilane (Si ₂ H ₆ ) and oxygen (O ₂ ) are used as the source gases for the silicon oxide film. Disilane and hydrogen chloride were used as source gases of hydrogen chloride and the amorphous silicon film, respectively. The purity was 6N. It was confirmed that the amount of hydrogen atoms in the silicon oxide film and the amorphous silicon film thus obtained was 1 × 10 ¹⁹ atoms / cm ³ or less. In addition, since film formation was performed continuously without exposure to the air, it was confirmed that the concentration of carbon, nitrogen, and oxygen was 1 × 10 ¹⁸ / cm ³ or less in the silicon film.

Next, the amorphous silicon film was patterned into an island shape. Then, a very thin portion of the surface of the amorphous silicon film, a thickness of 2 to 10 nm, was oxidized by an anodic oxidation method. The anodization was performed by a constant voltage method at 10 to 50 ° C. using N-methylacetamide (NMA) or tetrahydrofurfuryl alcohol (THF) to which KNO ₂ was added as an electrolyte and a platinum electrode as a cathode. After the anodization was completed, annealing was performed at 600 ° C. for 12 hours in an argon atmosphere. After that, a 100-nm-thick silicon oxide film was formed by a sputtering method. Here, the sputtering atmosphere was a mixed gas of oxygen and argon or another rare gas and hydrogen chloride, and the partial pressure of oxygen was 80% or more. The concentration of hydrogen chloride gas was 10%. In sputter deposition, defects occur in the underlying film due to the impact of sputtering. For example, when the underlying layer is a silicon film, oxygen atoms are implanted in silicon, and the concentration of oxygen increases. In such a state, silicon has many polar levels. That is, the boundary between silicon and silicon oxide is not clear. However, if a thin anodic oxide film is formed in advance as in this embodiment, since the silicon oxide already exists at the time of sputtering, the above-described mixing of atoms is avoided, and the silicon film and the oxidized The boundary of the silicon film is kept.

After the formation of the silicon oxide film, a 300 nm-thick n ⁺ -type microcrystalline silicon film containing about 10 ²¹ cm ^{-3 of} phosphorus was formed by a low pressure CVD method. The maximum process temperature of the above film formation was 650 ° C. After that, the gate electrode was patterned to form a gate electrode 410 and a gate insulating film 404. Further, arsenic ions were implanted by 2 × 10 ¹⁸ cm ⁻³ by ion implantation to form source and drain regions 407 and 409. Thus, FIG. 4A was obtained.

Next, as shown in FIG. 4B, a PSG film 413 was formed by a low pressure CVD method, and a side wall 414 shown in FIG. 4C was formed by directional etching.
Further, arsenic ions are added to region 4 by ion implantation.
5 × 10 ²⁰ cm ^{−3 was} implanted into 07a and 409a.

After that, the silicon nitride film 405 is entirely depressurized C
It was formed by the VD method. Thus, FIG. 4D was obtained. Then, it is annealed at 620 ° C. for 48 hours in a vacuum,
Regions 407a, 407b, 408, 409a, 409b
Was activated. Then, a PSG film was entirely formed as an interlayer insulator by a low pressure CVD method, holes for electrodes were formed, and aluminum electrodes were formed in the source region and the drain region. Then, finally, a silicon nitride film was formed again by the low pressure CVD method for the purpose of passivation.

The TFT thus formed was extremely reliable. It was shown that the so-called bias-temperature processing (BT processing) did not change the operation characteristics of the device. The BT process is a process of applying a voltage between the source and drain and the gate electrode in a heated state, and causes no problem if it is a normal device. , And changes in characteristics are observed. FIG. 6 shows this state.

FIG. 6A shows a TFT in which movable ions are present in the gate insulating film and in the channel region.
Alkali mobile ions (denoted by A ^{+ in the} figure) are present in the channel region, and the alkali ions serve as donors, so that the channel region becomes weak N-type (N ⁻ type). This state is referred to as state 1. The gate electrode and source of this TFT,
When a positive bias voltage is applied between the drains as shown in FIG. 6B, first, mobile ions (positive ions) in the channel region move away from the gate electrode, and the channel region becomes intrinsic (I-type). This state is referred to as state 2. As a result, I _D (drain current) -V _G (gate voltage) characteristics of the TFT, as shown in FIG. 6 (D), largely moved to the right.

However, when mobile ions are also present in the gate insulating film, the mobile ions gather below the gate electrode (on the channel region side) due to the bias voltage applied to the gate electrode. You will feel a positive electric field. Therefore, electrons are present in the channel region, that is, the channel region again becomes weakly N-type. When this state as 3, as shown in FIG. _{6 (E), I D -V} G characteristics curve from state 2 to state 3 is moved to the left. As a result, the characteristics of the TFT are shifted to the right as compared with the first TFT due to the bias voltage.

Conversely, when a negative bias is applied, mobile ions gather in the channel region, and as a result, the channel region becomes N-type, and the drain current cannot be controlled by the gate voltage.

In this embodiment, specifically, the gate voltage-drain current characteristics of the TFT are measured at room temperature immediately after fabrication (V _B = 0), and thereafter, a voltage of +20 V is applied to the gate electrode at 150 ° C. for 1 hour. And the gate voltage of the TFT at room temperature-
The drain current characteristics were measured (V _B = + 20 V), and then
Again, for one hour at 150 ° C., the gate electrode is now -20V
Then, the gate voltage-drain current characteristics of the TFT were measured at room temperature (V _B = −20 V), and the variation of the threshold voltage of the TFT was examined.

FIG. 7B shows the characteristics of the TFT manufactured by the method described above. As described above, the characteristics were not affected at all by the bias voltage V _B, and as a result of precise measurement, the fluctuation of the threshold voltage was 0.2 V or less.

On the other hand, the one shown in FIG. 7A does not have the silicon nitride films 402 and 405, and the concentration of halogen in any of the TFT films is 1 × 10 ¹⁴ cm ⁻³ or less. in, but other than these points are those prepared in exactly the same process as the method shown in this embodiment, characteristics as is clear from FIG have gone largely dependent on V _B. From the fluctuation width of the threshold voltage shown in FIG. 7B, the amount of mobile ions in the gate electrode of the TFT manufactured in this embodiment is 8 × 10 ¹⁰
It is estimated to be of the order of cm ^-3 . After the above measurement, when the concentrations of sodium, potassium and lithium in the silicon film (channel region) and the gate insulating film of the TFT manufactured in this example were examined, they were 3 × 10 ¹⁷ cm ⁻³ and 7 × 1 respectively.
It was 0 ¹⁵ cm ^-3 and 5 × 10 ¹⁵ cm ^-3 . Despite such a large amount of alkaline elements,
It is presumed that the amount of mobile ions was small because it was immobilized by halogen (in this case, chlorine). In the TFTs manufactured for comparison, the concentrations of sodium, potassium, and lithium were examined. As a result, they were 7 × 10 ¹⁸ cm ⁻³ , 2 × 10 ¹⁶ cm ⁻³ , and 4 × 10 ¹⁹ cm ⁻³ , respectively.
cm- ³ . From this, the effect of blocking by the silicon nitride film of the present invention is also presumed. That is, by providing a silicon nitride film and adding a halogen element to a TFT (in this case, a silicon film including a channel region and a gate insulating film) as in the present invention, the characteristics of the TFT are remarkably improved and reliability is improved. It has been shown that it is possible to improve the performance.

[0046]

According to the present invention, a thin film semiconductor device such as a TFT which is less affected by mobile ions such as sodium can be manufactured. Conventionally, it has become possible to form a TFT even on a substrate on which elements cannot be formed due to the presence of mobile ions. In order to carry out the present invention, a coplanar type TFT as shown in FIGS. 1 to 4 or an inverse coplanar type, a staggered type, or an inverted staggered type TFT may be used. Further, the present invention does not impose any restrictions on the operation of the thin film semiconductor element, so that the silicon of the transistor may be amorphous, polycrystalline, microcrystalline, or in the intermediate state. It will be clear that they may be single crystals or even single crystals.

[Brief description of the drawings]

FIG. 1 shows an example of a TFT according to the present invention.

FIG. 2 shows an example of a TFT according to the present invention.

FIG. 3 shows an example of a TFT according to the present invention.

FIG. 4 shows an example of manufacturing a TFT according to the present invention.

FIG. 5 shows an example of a conventional TFT.

FIG. 6 shows the effect of mobile ions on TFT characteristics.

FIG. 7 shows characteristics of a TFT using the present invention and a TFT not using the TFT.

[Explanation of symbols]

 Reference Signs List 101 insulating substrate 102 first blocking film 103 buffer insulating film 104 gate insulating film 105 second blocking film 106 interlayer insulating film 107 source (drain) region 108 channel region 109 drain (source) region 110 gate electrode 111 source (drain) ) Electrode 112 Drain (source) electrode

──────────────────────────────────────────────────続 き Continued on the front page (58) Fields surveyed (Int.Cl. ⁷ , DB name) H01L 29/786 H01L 21/336 H01L 21/322

Claims (28)

(57) [Claims] A first blocking film for preventing contamination from the substrate formed on the insulating substrate; and a halogen element formed on the first blocking film.
An insulating film containing, formed on said insulating film and the thin film transistor, the channel region of the thin film transistor is provided semiconductive
The semiconductor covering the body film, the gate insulating film, and the gate electrode;
Possess a second blocking film for preventing contamination of the body layer, a second blocking layer above the thin film transistor
A source electrode and a drain electrode,
Through the contact holes provided in the blocking film
The source electrode is in a source region, and the drain electrode is
Is electrically connected to the drain region.
Semiconductor device. 2. A first blocking film for preventing contamination from the substrate formed on an insulating substrate, and a halogen element formed on the first blocking film.
An insulating film containing: a thin film transistor formed on the insulating film; and a semiconductor provided with a channel region of the thin film transistor.
The semiconductor covering the body film, the gate insulating film, and the gate electrode;
Possess a second blocking film for preventing contamination of the body layer, a second blocking layer above the thin film transistor
A source electrode and a drain electrode,
Through the contact holes provided in the blocking film
The source electrode is in a source region, and the drain electrode is
Are electrically connected to a drain region, and the channel region contains halogen.
Conductor device. 3. The channel region according to claim 2, wherein
1 × 10 ¹⁸ / cm ³ or more 5 × 10 ²⁰ / cm ³
It is characterized by containing halogen elements in the following concentrations
Semiconductor device. 4. A first blocking film for preventing contamination from the substrate formed on an insulating substrate, and a halogen element formed on the first blocking film.
An insulating film containing: a thin film transistor formed on the insulating film; a semiconductor film provided with a channel region of the thin film transistor, a gate insulating film, and a second film for preventing contamination of the semiconductor film covering the gate electrode. And the thin film transistor above the second blocking film.
A source electrode and a drain electrode,
Through the contact holes provided in the blocking film
The source electrode is in a source region, and the drain electrode is
Are electrically connected to a drain region, and the gate insulating film contains halogen.
Conductor device. 5. The gate insulating film according to claim 4, wherein
1 × 10 ¹⁸ / cm ³ or more 5 × 10 ²⁰ / cm ³
It is characterized by containing halogen elements in the following concentrations
Semiconductor device. 6. The method according to claim 1, wherein
Further, an interlayer insulating film is provided on the second blocking layer.
And a source electrode and a drain electrode of the thin film transistor
Is provided on the second interlayer insulating film, and the second block
Contact film provided on the insulating film and the interlayer insulating film.
The source electrode is connected to the source region through the
The rain electrode must be electrically connected to the drain region.
A semiconductor device characterized by the following. 7. The method according to claim 1, wherein
Wherein the insulating film is made of silicon oxide.
Body device. 8. The method according to claim 1, wherein
The first blocking film is made of silicon nitride.
Semiconductor device. 9. The method according to claim 8, wherein said silicon nitride is
In particular, it is represented by the formula SiN _x (1.0 ≦ x ≦ 1.7).
Semiconductor device. 10. The method according to claim 8, wherein
The thickness of the blocking film ranges from 50 to 1000 nm
A semiconductor device, comprising: 11. Any one smell of claims 1 to 10
The first blocking film is made of aluminum oxide or
A semiconductor device comprising tantalum oxide. 12. Any one smell of claims 1 to 11
And wherein the second blocking film is made of silicon nitride.
Characteristic semiconductor device. 13. The silicon nitride according to claim 12, wherein
Be represented _{by the} chemical formula SiN _x (1.0 ≦ x ≦ 1.7)
A semiconductor device characterized by the above-mentioned. 14. The method according to claim 12, wherein
2, the thickness of the blocking film is in the range of 50 to 1000 nm.
A semiconductor device characterized by being enclosed. 15. Any one smell of claims 1 to 11
The second blocking film is made of aluminum oxide or
A semiconductor device comprising tantalum oxide. 16. Any one smell of claims 1 to 15
The thin film transistor is a coplanar thin film transistor . 17. Any one smell of claims 1 to 15
The thin film transistor is an inverted staggered thin film transistor . 18. Any one smell of claims 1 to 17
Te, the channel formation region of the semiconductor film, especially to have an amorphous, polycrystalline, or a silicon microcrystal
Semiconductor device. 19. Any one smell of claims 1 to 18
Te, be characterized in that the insulating substrate is a glass substrate
Semiconductor device. 20. A channel forming region, a source region, and a drain
Region, gate insulating film, gate electrode, source electrode,
Thin film transistor having a drain electrode
A method for manufacturing a semiconductor device provided above a plate.
Te, wherein forming a first blocking layer to prevent contamination from the substrate on the substrate, the insulating film is formed including the Ha androgenic atom on the first blocking layer, on the insulating film, wherein Semiconductor including channel forming region
Forming a body film, a gate insulating film, and a gate electrode , and covering the semiconductor film, the gate insulating film, and the gate electrode;
Forming a second blocking film for preventing contamination of the semiconductor; and forming a contact hole in the second blocking film.
And, connecting of the source region via the contact hole
Semiconductors, characterized in that to form the source electrode, and the drain electrode connected to the drain regions
Method of manufacturing body device . 21. A channel forming region, a source region, and a drain
Region, gate insulating film, gate electrode, source electrode,
Thin film transistor having a drain electrode
A method for manufacturing a semiconductor device provided above a plate.
Te, wherein forming a first blocking layer to prevent contamination from the substrate on the substrate, an insulating film is formed containing a halogen atom on the first blocking layer, the channel formed on the insulating film Forming a semiconductor film having a region, a gate insulating film, and a gate electrode, and covering the semiconductor film, the gate insulating film, and the gate electrode;
Te, wherein forming the second blocking film for preventing the semiconductor contamination, the forming an interlayer insulating film on the second blocking film, co down <br/> in the interlayer insulating film and the second blocking film the contact hole is formed, connecting of the source region via the contact hole
Semiconductors and forming the drain electrode connected to said source electrode and said drain regions
Method for manufacturing the device. 22. The method for manufacturing a semiconductor device according to claim 20, wherein the thin film transistor is a coplanar thin film transistor. 23. The method for manufacturing a semiconductor device according to claim 20, wherein the thin film transistor is an inverted staggered thin film transistor. 24. A method for manufacturing a semiconductor device in which a thin film transistor having a channel formation region, a source region, a drain region, a gate insulating film, a gate electrode, a source electrode, and a drain electrode is provided above an insulating substrate, Forming a first blocking film in contact with the substrate to prevent contamination from the substrate, exposing the substrate to the atmosphere, contacting the first blocking film with an insulating coating containing halogen, further comprising: Forming a semiconductor film in which the channel formation region is provided in contact with an insulating film; forming a gate insulating film on the semiconductor film; forming the gate electrode on the gate insulating film; film, and covering the gate electrode, wherein forming the second blocking film to prevent contamination of the semiconductor film, contactor to the second blocking film Forming a hole
And forming the source electrode connected to the source region and the drain electrode connected to the drain region through the contact hole. 25. The method according to claim 20, wherein
There, the method for manufacturing a semiconductor device characterized by annealing the semi <br/> conductors film after formation of the second blocking film. 26. The method for manufacturing a semiconductor device according to claim 20, wherein the insulating film is made of silicon oxide. 27. The method for manufacturing a semiconductor device according to claim 20, wherein the first blocking film is made of any one of silicon nitride, aluminum oxide, and tantalum oxide. 28. A method for manufacturing a semiconductor device according to claim 20, wherein said second blocking film is made of one of silicon nitride, aluminum oxide and tantalum oxide.