JP2735008B2 - Symbol period detection circuit for orthogonal frequency division multiplexed signal receiver - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to OFDM (Orthogonal Frequency Division Multiplexing).
The present invention relates to a symbol period detection circuit of a division multiplexing signal receiving apparatus, and more particularly to a symbol period detection circuit using a guard interval signal.

[0002]

2. Description of the Related Art Orthogonal frequency division multiplex modulation is a modulation method that is resistant to interference such as fading and ghosts, and has been studied as a modulation method suitable for broadcasting to mobiles. In DFT (Discrete Fourier Transform) of an OFDM signal receiving apparatus, it is necessary to set a time window for DFT in accordance with the reception data timing.

[0003] The setting of the time window is performed by adding a special synchronization signal for setting to the transmission signal and transmitting the transmission signal, and based on the synchronization signal reproduced by the receiving device. However, the use of such a special reproduction synchronization signal lowers the transmission efficiency of the transmission signal.

[0004] At the start of reception and at the time of reception channel switching (channel hopping), the decoding circuit does not operate unless a synchronization signal has been received, and the start of OFDM signal decoding is delayed. Further, when the synchronization signal cannot be obtained for some reason or the like, the decoding operation cannot be performed until the synchronization signal arrives, and a large amount of data signals and the like are lost. Was.

[0005]

SUMMARY OF THE INVENTION The present invention has been made in view of the above points, and makes it possible to detect a symbol synchronization signal without transmitting a special synchronization signal. It is an object of the present invention to provide a symbol period detection circuit of an OFDM receiver that does not reduce the transmission efficiency of a transmission signal.

[0006]

The multipath distortion removing circuit of the OFDM signal transmitting and receiving apparatus according to the present invention is configured such that a signal transmitted as a guard interval and an identical signal in an effective symbol period are identical if there is no multipath distortion. Received. Although the multipath distortion caused by adjacent symbols is different from the multipath distortion given by the signal in the same symbol, in general, the level of the long-time component is low, so that in the latter half of the guard interval, the two signals match. The degree increases.

The waveform similarity between the guard interval signal and the replaced guard interval signal transmitted with a delay of the effective symbol period from the guard interval is examined, and the period in which a signal having a high similarity periodically appears is examined. Thus, information of the symbol period is obtained based on the information.
In particular, since a signal having a relatively high degree of coincidence is obtained in the last part of the guard interval, information on the end point of the guard interval can be obtained with high accuracy.

Therefore, the multipath distortion removing circuit of the OFDM signal transmitting and receiving apparatus according to the present invention comprises: an effective symbol period delay circuit to which an orthogonal frequency division multiplexed signal is supplied as an input signal to delay an effective symbol period; When an input / output signal of a circuit is supplied and the degree of coincidence of the input / output signal is high, a comparison circuit that outputs a signal corresponding to the degree of coincidence and a symbol period delay circuit that delays a symbol period are serially connected by N (N is a natural number). A delay circuit having one end to which the output signal of the comparison circuit is supplied, and an addition circuit to which input / output signals of the N delay circuits are respectively supplied and output a symbol period start position signal. Thus, the above object is achieved.

[0009]

First, an input signal supplied to a symbol period detecting circuit of an OFDM signal receiving apparatus according to the present invention is shown in FIG.
It is explained together with. FIG. 3 is a diagram showing a schematic configuration of an input OFDM signal supplied to a symbol period detection circuit of the OFDM signal receiving device. The symbol period ta includes a guard interval gi and an effective symbol period ts.

Now, let us consider a state in which multipath distortion for half the guard interval gi is added to this signal. At that time, the first half of the guard interval gi (the F1 part shown in FIG. 3) is added with multipath distortion from the previous symbol, and the second half of the guard interval gi (the B1 part shown in FIG. 3) is added to the own gi. Of the first half is added.

In the guard interval gi replaced signal portion, multipath distortion from its own effective symbol period signal is applied to both the first half (the F2 portion shown in FIG. 3) and the second half (the B2 portion shown in FIG. 3). Is done. Therefore,
When the guard interval gi is compared with the signal of the guard interval gi to be replaced, the first half is affected by multipath distortion from different signals.
1 and F2 have different signal waveforms.

On the other hand, since B1 and B2 in the latter half are affected by multipath distortion from the same signal, the waveforms of the distortion components are the same and the waveforms of the received signals are the same. Becomes The input signal supplied to the symbol period detection circuit of the OFDM signal receiving apparatus according to the present invention has the above features.

Therefore, the present invention realizes a symbol period detection circuit by skillfully utilizing the above-mentioned guard interval gi and a comparison signal of the guard interval gi to be replaced as a detection signal.

Next, a block diagram of an embodiment of the symbol period detection circuit will be described below with reference to FIGS. FIG. 1 shows an embodiment of a symbol period detecting circuit of an OFDM signal receiving apparatus according to the present invention.

The input OFDM signal is supplied via an input terminal IN to an input circuit 1 for performing pre-processing such as level adjustment and removal of unnecessary signals, and the output signal thereof is output for an effective symbol period, that is, for 256 sample clocks. Is supplied to an effective symbol period (ts) delay circuit 2 for delaying the data.

The output signal of the input circuit 1 and the signal delayed by the effective symbol period (ts) by the delay circuit 2 are supplied to the next comparison circuit 3, respectively. This comparison circuit 3
The similarity of the waveform between the output signal supplied to the input and the signal delayed by the effective symbol period (ts) by the effective symbol period (ts) delay circuit 2 is checked for each sample clock period.

When the signals supplied to the comparison circuit 3 are the guard interval gi signal and the gi permuted signal as shown in FIG. 3, these signals have a greater similarity, and The circuit 3 outputs a coincidence signal indicating that the degree of coincidence is high each time.

That is, when the guard interval gi and the signal of the guard interval gi replaced part are compared, as shown in FIG. 3, the first half is affected by multipath distortion from different signals. Thus, the signal waveform of F1 of the guard interval gi and the signal waveform of F2 of the guard interval gi replaced part are different.

On the other hand, since the latter part B1 and B2 are influenced by the multipath distortion from the same signal, the waveforms of the distortion components are the same and the waveforms of the received signals are the same. Becomes Therefore, although the coincidence signal is output from both of the overlapping portions, it is assumed that the coincidence is higher in the portion where the phases of B1 and B2 overlap than in the portion where the phases of F1 and F2 overlap. A signal will be output.

N connected in series (here, N = 3)
The delay circuits 41, 42, and 43 (these constitute a delay circuit stage 4 for N = 3 symbol periods (ta))
A symbol period (ta) delay circuit for delaying the OFDM signal supplied to each input by a symbol period (ta), that is, 262 clock periods, and an output signal of the comparison circuit 3 is a first delay circuit connected in series. 41.

The OFDM signal supplied to the circuit of the present invention is
Guard interval gi signal and gi every 262 clocks
Since the signal to be replaced appears, each of the delay circuits 41, 42, and 43 set to the delay time of 262 clocks outputs any of the delay circuits at the moment when the output of the comparison circuit 3 outputs a signal with a high degree of coincidence. A high output signal is also generated from the circuit.

Comparison circuit 3 and delay circuits 41, 42, 43
The adder circuit 5 to which each of the output signals is supplied generates an output signal having a higher degree of coincidence as the number of simultaneously input signals is larger.

When the number of stages is N, the addition circuit 5
A total of (N + 1) signals are provided. The output signal of the adder circuit 5 outputs a symbol synchronization signal and a symbol period start position signal from an output terminal OUT via an output circuit 6 which performs processing such as removal of unnecessary signals and impedance conversion.

Therefore, if the guard intervals gi and g
i Even if a signal with a high degree of coincidence exists at a location other than the signal to be replaced, the probability of occurrence of the signal every 262 clocks is very small. By passing through the circuits 41, 42, 43 and the addition circuit 5, the false symbol synchronization signal is weakened, and only the stronger true symbol synchronization signal and the symbol period start position signal are output from the output terminal OUT via the output circuit 6. can get.

FIG. 2 shows another embodiment of the symbol period detecting circuit of the OFDM signal receiving apparatus according to the present invention. In the embodiment shown in FIG. 2, the symbol period signal detection circuit of FIG.
It is configured by connecting the LL circuit 14.

FIG. 2 shows the output signal of the adder circuit 5 of FIG.
The phase comparison circuit 11, which oscillates at a cycle of 62 clocks, V
This is supplied to the phase comparison circuit 11 of the PLL circuit 14 having the CO 12 and the LPF 13, and further to the output signal of the VCO 12 to the output circuit 16. The output of the symbol synchronization signal can be obtained more accurately from the output terminal OUT of the output circuit 16.

It should be noted that the symbol periods (t
a) The number N of stages of the delay circuit (N is a natural number) is shown in FIGS.
The case where N = 3 has been described using the symbol period signal circuit shown in FIG. 1, but the effect is more remarkable as the number N increases, and the false symbol synchronization signal is weakened, and only the true symbol synchronization signal which is strengthened is increased. , The appropriate number of N stages is determined from transmission conditions, economy, and other factors.

[0028]

The symbol period detecting circuit of the OFDM signal receiving apparatus according to the present invention has the following effects. By comparing the guard interval signal with the guarded interval replacement signal, the symbol position of the supplied signal can be known, thereby facilitating the management of the FFT window time for decoding and the accurate OFDM signal conversion. Can be decrypted. The symbol synchronization signal and the symbol period start position signal can be detected without transmitting a special synchronization signal, and the DFT window can be set by the symbol period start position signal, so that the transmission efficiency of the transmission signal does not decrease. OFD
A symbol period detection circuit of the receiving device for M can be provided. The conventional disadvantages such as the inability to perform the decoding operation until the synchronization signal arrives, such as when the synchronization signal cannot be obtained for some reason, and the loss of a large amount of data signals, etc., are improved. .

[Brief description of the drawings]

FIG. 1 is a block diagram of an embodiment of a symbol period detection circuit of an OFDM signal receiving apparatus according to the present invention.

FIG. 2 is a block diagram of another embodiment of the symbol period detection circuit of the OFDM signal receiving apparatus according to the present invention.

FIG. 3 is a diagram illustrating a schematic configuration of an input OFDM signal supplied to a symbol period detection circuit of the OFDM signal receiving device.

[Explanation of symbols]

Reference Signs List 1 input circuit 2 effective symbol period (ts) delay circuit 3 comparison circuit 4 symbol period (ta) delay circuit stage 5 addition circuit 6, 16 output circuit 11 phase comparison circuit 12 VCO 13 LPF 14 PLL circuit 41, 42,. 4N Symbol period (ta) delay circuit B1, B2 Guard interval second half F1, F2 Guard interval first half IN Input terminal N Symbol period (ta) delay circuit 4 connected in series
Number of stages OUT output terminal gi guard interval ta symbol period ts effective symbol period

Continuation of the front page (56) References JP-A-5-91071 (JP, A) JP-A-5-504037 (JP, A) IEEE TRANSACTIONS ON CONSUMER ELECTRONIC RONICS, VOL. 35, NO. 3, AUGUST 1989, PP. 493-503, "DIGITAL SOUND BROADCASTING TO MOBILE RECEIVERS" BY B. L. FLOCH ET AL.

Claims (3)

(57) [Claims] 1. An effective symbol period delay circuit to which an orthogonal frequency division multiplexed signal is supplied as an input signal and delays an effective symbol period, and an input / output signal of the effective symbol period delay circuit is supplied to match the input / output signal. N (where N is a natural number) are connected in series with a comparison circuit that outputs a signal corresponding to the degree of coincidence when the degree is high, and a symbol period delay circuit that delays the symbol period, and the output signal of the comparison circuit is supplied to one end. Frequency division multiplexed signal reception, comprising: a delay circuit, and an adder circuit to which input / output signals of the N delay circuits are respectively supplied and output a symbol period start position signal. The symbol period detection circuit of the device. 2. An orthogonal frequency division multiplex signal receiving apparatus according to claim 1, wherein said orthogonal frequency division multiplex signal as said input signal comprises a guard interval signal and a guard interval signal to be replaced. Symbol period detection circuit. 3. An orthogonal frequency division multiplexed signal as an input signal according to claim 1, wherein said orthogonal frequency division multiplexed signal comprises a guard interval signal and a guard interval signal to be replaced, and said comparison circuit matches in a latter half of the guard interval period. A symbol period detection circuit for an orthogonal frequency division multiplexed signal receiving device, wherein a larger detection signal is output when the degree is high.