JP3041171B2 - OFDM reception synchronization circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a receiving apparatus of a digital transmission system for transmitting digitized television data by modulating OFDM (Orthogonal Frequency Division Multiplexing), and more particularly to a receiving apparatus for transmitting data based on received data. The present invention relates to an OFDM reception synchronization circuit capable of achieving accurate clock synchronization.

[0002]

2. Description of the Related Art As is well known, the OFDM modulation method is particularly problematic in a digital transmission system as described in a literature (1st to 6th pages of NHK VIEW Magazine, May 1993, May 1993). However, digital modulation systems that are less susceptible to multipath distortion in the transmission path are receiving attention.

In OFDM modulation, the phases of a plurality of carriers in a frequency multiplexing system are made orthogonal to each other, and the spectra of modulated waves corresponding to each carrier overlap with each other.
Since they are overlapped so that the orthogonality condition is satisfied, it is possible to completely separate them on the receiving side.

[0004] This orthogonal state is exactly the same as the Nyquist condition with no intersymbol interference in the time domain. Intersymbol interference, if the Nyquist condition is satisfied, although the response waveforms of each pulse overlap each other, it is possible to receive signals completely without interference by extracting signals at appropriate sampling timing. .

[0005] The OFDM modulation system realizes this in the frequency domain. For this reason, unlike the conventional frequency division multiplexing, a guard band for preventing spectrum overlap between the modulated waves is not required, and high frequency use efficiency is achieved.

[0006] Also, OFDM modulation utilizes a plurality of carriers, which must be orthogonal. To realize this, a Fourier transform circuit is used for the OFDM modulation / demodulation circuit. This Fourier transform circuit can be generally realized by an FFT (high-speed discrete Fourier transform) circuit based on digital signal processing, and the number of carriers can be set almost arbitrarily. That is, several hundred to several thousand
Can be used.

For this reason, the rate of digital data allocated to each carrier is several hundredths to several thousandths.
Each carrier is modulated at a very slow rate. Thus, for each carrier, the modulation symbol rate is very low and the symbol period is long. For this reason, a normal multipath can be regarded as an almost adjacent multipath, and the influence of the multipath can be greatly reduced.

Further, in OFDM modulation, there is known a method of preparing a guard period as a part of a symbol period in order to completely remove the influence of multipath. The guard period is obtained by directly copying a part of the signal waveform in the effective symbol.

Even if a multi-path occurs and a previous symbol interferes with the next symbol due to the guard period, when the multi-path delay time is within the guard period, that is, only a signal copied by itself is used. When no leakage occurs, intersymbol interference does not occur in principle.

However, since the received signal is a combination of the direct wave and the multipath wave, the phase and amplitude of the modulation symbol of each carrier are shifted depending on the magnitude of the multipath interference (generally called D / U). . For this reason, it is necessary to transmit a reference signal having a known phase and amplitude every predetermined period in advance.

On the other hand, an FFT circuit is used in OFDM demodulation, but the FFT defines only one symbol period of the effective symbol period excluding the guard period (if there is no guard period, the entire symbol period is an effective symbol period). It is necessary to obtain the phase and amplitude information of each carrier by accurately taking in the clock and performing a Fourier transform operation. That is, this is a demodulation operation.

If the correct validity period cannot be detected, the orthogonality of each carrier will not be satisfied, and interference will occur between the carriers so that normal demodulation of digital information becomes impossible. . The conventional OFDM demodulation circuit is
The effective symbol period is detected on the receiving side by transmitting a special reference symbol.

That is, FIG. 9 shows an example in which an unmodulated symbol, that is, a symbol in which no signal exists, is transmitted as the reference symbol. When such an unmodulated symbol is transmitted periodically, the receiving side uses the envelope detection circuit 12 of the modulated wave from the detection output supplied to the input terminal 11 as shown in FIG. Detect the component. And the envelope detection circuit 1
The output of No. 2 is compared with the reference level by the determination circuit 13 to detect a no signal, that is, a zero carrier, and the detection period becomes one symbol period.

The detection timing of the unmodulated symbol is as follows:
The timing circuit 14 that operates with a stable clock is reset. Until the next reference symbol is transmitted, the signal output from the timing circuit 14 is used as a gate signal for removing the guard period from the detection output and extracting only the data in the effective symbol period. 15 to be taken out.

By the way, although the method of periodically transmitting the reference symbol and obtaining the timing for extracting the effective symbol to be supplied to the FFT on the receiving side as described above is effective in a poor reception state, In addition, since the information cannot be transmitted by the amount corresponding to the transmission of the reference symbol, if the reference symbol is transmitted in a short period, the transmission efficiency of the information is reduced.

On the other hand, if the reference symbol is transmitted in a long cycle, if the envelope detection malfunctions due to noise, there is a problem that normal FFT demodulation cannot be performed for a long period of time. Originally, during one symbol period of OFDM, input digital data is serially / parallel expanded from several hundreds to several thousands and each carrier is modulated by each parallel output. Therefore, one symbol period is several hundreds of symbols compared to single carrier modulation. It is several thousand times longer.

Therefore, even if the above-mentioned periodically transmitted reference symbol is transmitted relatively frequently, the time interval at which this reference symbol is transmitted becomes very long, and one envelope is transmitted. The effect of the detection malfunction will continue for a long time.

Further, when the frequency accuracy of the clock used on the receiving side is low, there is also a problem that the effective symbol period timing is gradually shifted between the periodically transmitted reference symbols because they are set by the timing circuit 14. Occur. A high-precision clock oscillation source is not only expensive, but also in consideration of reception at a mobile unit, a clock frequency shift due to the Doppler effect causes a similar problem. As a result, accurate FFT demodulation cannot be performed immediately before the reference symbol, and there is a problem that the transmission error rate of digital data deteriorates.

[0019]

As described above, in the conventional means for obtaining the effective symbol period timing on the receiving side by periodically transmitting the reference symbols, the information is transmitted by the amount corresponding to the transmission of the reference symbols. However, there is a problem that the transmission efficiency is lowered due to the above-mentioned problem, and that it is difficult to achieve accurate clock synchronization with the transmitting side.

Therefore, the present invention has been made in view of the above circumstances, and it is possible to improve information transmission efficiency without transmitting a special reference symbol, and to easily and accurately synchronize clocks with a transmitting side. It is an object to provide a very good OFDM reception synchronization circuit which is possible.

[0021]

SUMMARY OF THE INVENTION OFDM according to the present invention
The reception synchronization circuit generates a synchronization signal for capturing a signal in an effective symbol period from an OFDM modulated signal having a guard period in which a part of the signal in the effective symbol period is copied in a part of the effective symbol period. It is targeted.
A delay means for delaying the OFDM modulated signal to a timing coincident with the original waveform of the guard period signal is copied, and a correlation between the OFDM modulated signal output from the delay means and the OFDM modulated signal not delayed by the delay means is calculated. It is provided with a correlation calculation means to be obtained and a synchronization generation means for generating a timing signal corresponding to an effective symbol period based on an output of the correlation calculation means.

Further, the OFDM reception synchronizing circuit according to the present invention has a guard period in which a part of the signal of the effective symbol period is copied in a part of the effective symbol period, and the guard period for detecting the effective symbol period is provided at a predetermined position. It is intended to generate a synchronization signal for capturing a signal in an effective symbol period from an OFDM modulated signal into which reference symbols are periodically inserted. Delay means for delaying the OFDM modulated signal until the timing coincides with the original waveform of the guard period signal; and OFDM output from the delay means.
Correlation calculating means for obtaining a correlation between the modulated signal and an OFDM modulated signal which is not delayed by the delay means; detecting means for detecting a reference symbol from the OFDM modulated signal; and an effective symbol based on an output of the detecting means and an output of the correlation calculating means. And a synchronization generation means for generating a timing signal corresponding to the period.

[0023]

According to the above construction, the effective symbol period is determined based on the correlation between the OFDM modulation signal delayed until the timing at which the signal of the guard period matches the original waveform copied and the OFDM modulation signal not delayed. Since the corresponding timing signal is generated, it is not necessary to transmit a special reference symbol as in the related art, and the information transmission efficiency can be improved. Further, when a reference symbol is transmitted, a timing signal corresponding to an effective symbol period is generated based on an output of detecting the reference symbol from the OFDM modulated signal and the correlation,
The performance of timing detection by correlation can be enhanced.

[0024]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below in detail with reference to the drawings. FIG. 1 shows the overall configuration of the OFDM demodulation system. That is, the input terminal 16
The modulation signal in the IF (intermediate frequency) band supplied to
After the out-of-band noise is removed by an F (band-pass filter) 17, the local oscillation signal output from the local oscillation circuit 20 and the local oscillation signal are shifted by 90 ° by a quadrature detection circuit including mixing circuits 18 and 19. The signals are converted into a baseband band by being mixed with the signals shifted by 90 ° in the circuit 21.

The outputs of the mixing circuits 18 and 19 are driven based on a clock output from a clock oscillation circuit 24 after harmonic components are removed by LPFs (low-pass filters) 22 and 23, respectively. The data is converted into digital data by the / D (analog / digital) conversion circuits 25 and 26. The output data of the A / D conversion circuits 25 and 26 is complex digital data, the output data of the A / D conversion circuit 26 is an in-phase axis detection component (real part) I, and the output data of the A / D conversion circuit 25 is Quadrature axis detection component (imaginary part) Q
It is.

The output data I and Q of the A / D conversion circuits 26 and 25 are supplied to a guard period elimination circuit 27, where only the data of the effective symbol period is taken out.
The signal is supplied to a (serial / parallel) conversion circuit 28. The S / P conversion circuit 28 parallelizes all data sampled during the effective symbol period. In this case, A / D conversion is performed so that the number of data in the effective symbol period generally matches the number of carriers in OFDM modulation.

The data parallelized by the S / P conversion circuit 28 is supplied to an FTT circuit 29, where it is subjected to high-speed discrete Fourier transform based on a clock output from a clock oscillation circuit 24, and the phase and amplitude of each carrier are changed. Is output.
After the output of the FTT circuit 29 is converted into a serial data series by a P / S (parallel / serial) conversion circuit 30, the phase and amplitude are identified by a symbol identification circuit 31, and the transmitted information is demodulated here. Is done.

On the other hand, the complex digital data output from the A / D conversion circuits 26 and 25 has one or both of the real part I and the imaginary part Q (the real part I in the case shown).
Is supplied to the symbol synchronization circuit 32 for synchronization detection. That is, the real part I of the complex digital data output from the A / D conversion circuit 26 is delayed by a delay circuit 33 composed of a shift register or the like for a specified time described later, and then delayed by a correlation circuit 34. Is correlated with the undelayed data.

The correlation coefficient obtained by the correlation circuit 34 is binarized by a flywheel timing circuit 35.
The flywheel timing circuit 35 incorporates the timing circuit 14, and the timing circuit 14 is reset based on the binarized correlation coefficient. Once reset, the timing circuit 14 can continuously output a signal indicating the timing of a necessary guard period or valid symbol period without resetting thereafter. This is a well-known technique as a flywheel function, and can be realized by a simple counter circuit.

The timing signal thus generated from the flywheel timing circuit 35 is supplied to the guard period removing circuit 27, and is used for extracting only data in the effective symbol period. Therefore, the FFT circuit 2
In No. 9, it is possible to perform the operation only with the data in the effective symbol period and perform accurate demodulation.

FIGS. 2 and 3 are diagrams for explaining the above operation. First, FIG. 2 shows OF OF the assumption here.
3 shows a DM modulation waveform (one symbol period TS). O
A guard period TG is periodically inserted into the FDM modulation waveform, and is a copy of a part of the waveform of the effective symbol period TS '. FIG. 3 shows the operation principle of symbol timing detection by correlation calculation.

That is, the real part I of the complex digital data output from the A / D conversion circuit 26 shown in FIG.
Is delayed by TS 'by the delay circuit 33 as shown in FIG. As a result, the timing at which the signal of the guard period originally matches the original waveform of the copied signal is obtained. Therefore, when the correlation between the delayed data and the undelayed data is obtained by the correlation circuit 34, a large correlation coefficient is periodically obtained as shown in FIG.

The position where the large correlation coefficient is obtained is the timing of the symbol boundary. Based on this position, the flywheel timing circuit 35 generates a timing signal necessary for the demodulation operation as shown in FIG. Will happen. Since the flywheel timing circuit 35 has flywheel characteristics as described above, if the correlation coefficient is binarized at a sufficiently high threshold, pseudo flywheels generated due to noise and randomness of a signal are generated. Correlation peaks can be eliminated. In addition to this point, it is also possible to apply general synchronization protection techniques (forward protection and backward protection).

Therefore, according to the configuration of the above-described embodiment, the OFDM modulated signal having the guard period in which a part of the data in the effective symbol period is copied coincides with the original waveform from which the signal in the guard period is copied. The timing is delayed until the timing is reached, the correlation between the delayed data and the undelayed data is obtained, and the effective symbol period timing is detected based on the magnitude of the correlation coefficient. There is no need to transmit symbols, and information transmission efficiency can be improved.

In the above embodiment, the frequency of the clock used for A / D conversion, FFT operation and the like is controlled using the timing signal output from the flywheel timing circuit 35. That is, by supplying the clock control circuit 36 with the timing signal output from the flywheel timing circuit 35 and the correlation coefficient output from the correlation circuit 34, an error between the two is obtained. The error signal is converted into an analog signal by a D / A (digital / analog) conversion circuit 38 via a smoothing LPF 37, and the oscillation frequency of the clock oscillation circuit 24 is controlled. By applying such clock control feedback, the operating clocks on the transmitting side and the receiving side can be completely matched.

4 to 7 show modified examples of the symbol synchronization circuit 32, respectively. First, in FIG. 4, after the real part I or the imaginary part Q of the complex digital data supplied to the input terminal 39 is delayed by the delay circuit 41 through the gate circuit 40, the data not delayed by the multiplication circuit 42 Is multiplied to obtain a correlation coefficient. This correlation coefficient is converted by the LPF 43 into a waveform whose peak value is easy to understand as shown in FIG.
The signal is binarized by 4 and used for resetting the timing circuit 45.

The timing signal output from the timing circuit 45 is sent to the guard period elimination circuit 27 via the output terminal 46, and is also supplied to the gate circuit 40 to correspond to a period required for obtaining a correlation. Time width τ
The gate is controlled to be opened only during the period. For this reason, a pseudo-correlation peak in a period other than the period required for obtaining the correlation is removed, and the synchronization protection characteristic can be obtained.

If the clock on the receiver side does not completely match the clock on the transmitter side, the gate circuit 40
The gate open period may deviate from the guard period, but this can be detected by the fact that the correlation detection peak cannot be obtained in the output of the determination circuit 44. At this time, the timing circuit 45 controls so as to gradually shift the generation position of the timing signal given to the gate circuit 40. The technique of gradually shifting the timing signal generation position is a technique known as hunting, and can be easily realized.

FIG. 5 shows that the output of the LPF 43 is differentiated by the differentiating circuit 47 so that the timing of the correlation peak can be determined more strictly than that shown in FIG. A logical product of the differentiated signal and the non-differentiated signal is obtained by an AND circuit 48 to obtain a reset signal for the timing circuit 45 having a pulse width as narrow as possible, that is, more accurate.

FIG. 6 shows a specific example of the correlation operation. In FIG. 6, the real part I or the imaginary part Q of the complex digital data supplied to the input terminal 49 is delayed by TS 'by the shift register 50, and then a plurality of serially connected latch circuits 511, 512, 513, ……,
51n, and the tap coefficients are extracted. Also,
The signal supplied to the input terminal 49 includes a plurality of latch circuits 521, 522, 523,.
52n, and the tap coefficients are extracted.

The output of the shift register 50 and the input signal are multiplied by a multiplying circuit 530, and the outputs of the latch circuits 511, 512, 513,.
The outputs of the latch circuits 521, 522, 523,..., 52n are respectively multiplied by the multiplier circuits 531, 532,.
3n. Then, each of the multiplication circuits 530 and 5
, 53n are added to an adder circuit 54
, 54n, the correlation operation is executed. Then, the full addition output is supplied to the timing circuit 55 as a reset signal. The output of the timing circuit 55 is sent to the guard period removing circuit 27 via the output terminal 56.

FIG. 7 shows A / D conversion circuits 26 and 25.
1 shows an example of a symbol synchronization circuit 32 that simultaneously uses both the real part I and the imaginary part Q of the complex digital data output from. That is, the A / D conversion circuits 26 and 25
The real part I and the imaginary part Q of the complex digital data output from are supplied to the guard period removing circuit 27 via output terminals 57 and 58, respectively, and are delayed by the TS 'by shift registers 59 and 60, respectively. After that, the signal is supplied to the correlation circuits 61 and 62, whereby the correlation with the signal before the delay is obtained.

By calculating the logical product of the outputs of the correlation circuits 61 and 62 by the AND circuit 63, a pseudo correlation peak generated due to noise and randomness of the signal is effectively removed, and the output is output at the timing. The signal is given to the circuit 64 as a reset signal. The output of the timing circuit 64 is supplied to the guard period removing circuit 27 through the output terminal 65.
Sent to

FIG. 8 shows another embodiment of the present invention. That is, when a null symbol (or an unmodulated symbol) is sent as a reference symbol, this is detected by the null symbol detection circuit 66. This null symbol detection circuit 66 has the same configuration as the envelope detection circuit 12 and the determination circuit 13 shown in FIG. 10, and the detection result is supplied to the flywheel timing circuit 35. In this case, both the output of the correlation circuit 34 and the output of the null symbol detection circuit 66 are supplied to the flywheel timing circuit 35. The reset signal is obtained by taking the logical sum of both outputs.

According to such a configuration, the detection result of the null symbol detection circuit 66 is used to determine the synchronization at the beginning of the operation,
This is effective for auxiliary timing synchronization when there is a very large multipath disturbance, and is used to enhance the performance of timing detection by correlation calculation. It should be noted that the present invention is not limited to the above embodiments, and can be variously modified and implemented without departing from the scope of the invention.

[0046]

As described in detail above, according to the present invention,
It is possible to provide an extremely good OFDM reception synchronization circuit capable of increasing information transmission efficiency without transmitting a special reference symbol and easily achieving accurate clock synchronization with a transmission side.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of an OFDM reception synchronization circuit according to the present invention.

FIG. 2 is a view showing an OFDM modulation waveform assumed in the embodiment.

FIG. 3 is a timing chart for explaining the operation of the main part in the embodiment.

FIG. 4 is a block diagram showing a modification of the main part in the embodiment.

FIG. 5 is a block diagram showing another modification of the main part in the embodiment.

FIG. 6 is a block diagram showing still another modification of the main part in the embodiment.

FIG. 7 is a block diagram showing still another modification of the main part in the embodiment.

FIG. 8 is a block diagram showing another embodiment of the present invention.

FIG. 9 is a diagram showing an example of an OFDM modulation waveform into which an unmodulated symbol is inserted.

FIG. 10 is a block diagram showing a conventional OFDM reception synchronization means.

[Explanation of symbols]

11 ... input terminal, 12 ... envelope detection circuit, 13 ...
Judgment circuit, 14 timing circuit, 15 output terminal, 1
6 input terminal, 17 BPF, 18, 19 mixed circuit,
20: Local oscillation circuit, 21: 90 ° phase shift circuit, 22, 2
3 LPF, 24 clock oscillator circuit, 25, 26 A
/ D conversion circuit, 27: guard period removing circuit, 28: S /
P conversion circuit, 29 FFT circuit, 30 P / S conversion circuit, 31 symbol identification circuit, 32 symbol synchronization circuit, 33 delay circuit, 34 correlation circuit, 35 flywheel timing circuit, 36 clock control Circuit, 37
... LPF, 38 ... D / A conversion circuit, 39 ... input terminal, 4
0: gate circuit, 41: delay circuit, 42: multiplication circuit, 4
3 LPF, 44 determination circuit, 45 timing circuit,
46 output terminal, 47 differentiation circuit, 48 AND circuit,
49: input terminal, 50: shift register, 511 to 51
n: latch circuit, 521 to 52n: latch circuit, 530
... 53n... Multiplication circuits, 541 to 54n.
... Timing circuits, 56-58 ... Output terminals, 59, 60
... Shift register, 61,62 ... Correlation circuit, 63 ... And circuit, 64 ... Timing circuit, 65 ... Output terminal, 66
... Null symbol detection circuit.

──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-7-143097 (JP, A) “Study of New Frequency Synchronization Method Using Guard Period in OFDM”, Television Society Technical Report, August 24, 1995 Date, Vol. 19, No. 38, p. 13-18 (58) Field surveyed (Int. Cl. ⁷ , DB name) H04J 11/00

Claims (2)

(57) [Claims] An O signal having a guard period in which a part of a signal of the effective symbol period is copied in a part of the effective symbol period.
In an OFDM reception synchronization circuit for generating a synchronization signal for capturing a signal in the effective symbol period from an FDM modulation signal, a delay for delaying the OFDM modulation signal until a timing coincides with a waveform from which the signal in the guard period is copied. Means and OF output from the delay means
DM modulated signal and OF not delayed by said delay means
An OFDM receiver comprising: a correlation operation means for obtaining a correlation with a DM modulation signal; and a synchronization generation means for generating a timing signal corresponding to the effective symbol period based on an output of the correlation operation means. Synchronous circuit. 2. A method according to claim 1, wherein a part of the effective symbol period has a guard period in which a part of the signal of the effective symbol period is copied, and a reference symbol for detecting the effective symbol period is periodically inserted at a predetermined position. In an OFDM reception synchronization circuit for generating a synchronization signal for capturing a signal in the effective symbol period from an OFDM modulation signal, a delay for delaying the OFDM modulation signal until the timing coincides with a waveform from which the signal in the guard period is copied. Means, correlation calculating means for calculating a correlation between an OFDM modulated signal output from the delay means and an OFDM modulated signal not delayed by the delay means, detecting means for detecting the reference symbol from the OFDM modulated signal, Means corresponding to the effective symbol period based on the output of the means and the output of the correlation operation means. An OFDM reception synchronization circuit, comprising: synchronization generation means for generating a synchronization signal.