JP2617692B2 - Multilayer printed wiring board and method of manufacturing the same - Google Patents
Multilayer printed wiring board and method of manufacturing the sameInfo
- Publication number
- JP2617692B2 JP2617692B2 JP32720894A JP32720894A JP2617692B2 JP 2617692 B2 JP2617692 B2 JP 2617692B2 JP 32720894 A JP32720894 A JP 32720894A JP 32720894 A JP32720894 A JP 32720894A JP 2617692 B2 JP2617692 B2 JP 2617692B2
- Authority
- JP
- Japan
- Prior art keywords
- hole
- diameter
- stepped
- wiring board
- printed wiring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000004519 manufacturing process Methods 0.000 title description 24
- 239000004020 conductor Substances 0.000 claims description 22
- 239000011347 resin Substances 0.000 claims description 21
- 229920005989 resin Polymers 0.000 claims description 21
- 238000005530 etching Methods 0.000 claims description 19
- 239000011248 coating agent Substances 0.000 claims description 17
- 238000000576 coating method Methods 0.000 claims description 17
- 239000000758 substrate Substances 0.000 claims description 14
- 238000007747 plating Methods 0.000 claims description 11
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 6
- 229910052802 copper Inorganic materials 0.000 claims description 6
- 239000010949 copper Substances 0.000 claims description 6
- 230000000903 blocking effect Effects 0.000 claims description 2
- 230000015572 biosynthetic process Effects 0.000 claims 1
- 238000000034 method Methods 0.000 description 26
- HEMHJVSKTPXQMS-UHFFFAOYSA-M Sodium hydroxide Chemical compound [OH-].[Na+] HEMHJVSKTPXQMS-UHFFFAOYSA-M 0.000 description 6
- 239000000243 solution Substances 0.000 description 6
- 239000007864 aqueous solution Substances 0.000 description 4
- 239000004744 fabric Substances 0.000 description 4
- 239000011521 glass Substances 0.000 description 4
- 239000003822 epoxy resin Substances 0.000 description 3
- 229920000647 polyepoxide Polymers 0.000 description 3
- 230000002378 acidificating effect Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000004070 electrodeposition Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 229920001721 polyimide Polymers 0.000 description 2
- 239000009719 polyimide resin Substances 0.000 description 2
- 239000003054 catalyst Substances 0.000 description 1
- 238000003780 insertion Methods 0.000 description 1
- 230000037431 insertion Effects 0.000 description 1
- 238000007650 screen-printing Methods 0.000 description 1
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Description
【０００１】[0001]
【産業上の利用分野】本発明は多層プリント配線板及び
その製造方法に関し、特に高密度の配線回路を有する多
層プリント配線板及びその製造方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer printed wiring board and a method of manufacturing the same, and more particularly to a multilayer printed wiring board having a high-density wiring circuit and a method of manufacturing the same.
【０００２】[0002]
【従来の技術】一般に、スルーホールプリント配線板の
製造には、図１０（ａ）〜（ｄ），図１１（ａ）〜
（ｂ）に示すテンティング工法が多く用いられており、
この方法に依れば、まず図１０（ａ）に示す如く、絶縁
基板２上に銅めっき層を含む導体層１とスルーホール１
ａを形成した基板上に図１０（ｂ）に示す如く感光性ド
ライフィルム（以下、ドライフィルムと記す）６を貼付
し、この上から図１０（ｃ）に示す如く、マスクフィル
ム４を介して所望の配線回路のパターンを紫外線で焼き
付ける。次に、現像液で不要部分のドライフィルム６を
除去し図１０（ｄ）に示す如く、テンティング状態のエ
ッチングレジスト６ａ，配線回路部分のエッチングレジ
スト６ｂを得る。更に、図１１（ａ）に示す如く、露出
した導体層１をエッチング除去した後、最後に、図１１
（ｂ）に示す如く、エッチングレジスト６ａ，６ｂを剥
離除去してスルーホールプリント配線板を得るものであ
る。2. Description of the Related Art Generally, in manufacturing a through-hole printed wiring board, FIGS. 10 (a) to 10 (d) and FIGS.
Tenting method shown in (b) is often used,
According to this method, first, as shown in FIG. 10A, a conductor layer 1 including a copper plating layer and a through hole 1 are formed on an insulating substrate 2.
As shown in FIG. 10B, a photosensitive dry film (hereinafter, referred to as a dry film) 6 is stuck on the substrate on which a is formed, and from above the photosensitive dry film 6 via a mask film 4 as shown in FIG. A desired wiring circuit pattern is printed with ultraviolet rays. Next, an unnecessary portion of the dry film 6 is removed with a developing solution to obtain an etching resist 6a in a tenting state and an etching resist 6b in a wiring circuit portion as shown in FIG. Further, as shown in FIG. 11A, after the exposed conductor layer 1 is removed by etching, finally, as shown in FIG.
As shown in (b), the etching resists 6a and 6b are peeled off to obtain a through-hole printed wiring board.
【０００３】一方、図１２（ａ）〜（ｄ），図１３
（ａ）〜（ｃ）に示す穴埋め工法では、まず、図１２
（ａ）に示す如く、絶縁基板２上に銅めっき層を含む導
体層１とスルーホール１ａを形成した基板のスルーホー
ル１ａ内部に図１２（ｂ）に示す如く、穴埋め樹脂７を
充填，硬化させた後絶縁基板２表面にドライフィルム６
を貼付し、この上から図１２（ｄ）に示す如く、マスク
フィルム４を介して所望の配線パターンを紫外線で焼き
付ける。次に、図１３（ａ）に示す如く、現像液で不要
部分のドライフィルム６を除去しテンティング状態のエ
ッチングレジスト６ａ，配線回路部分のエッチングレジ
スト６ｂを得る。更に、図１３（ｂ）に示す如く、露出
した導体層１をエッチング除去した後、最後に、図１３
（ｃ）に示す如く、エッチングレジスト６ａ，６ｂおよ
び穴埋め樹脂７を剥離除去してスルーホールプリント配
線板を得るものである。尚、この工法では、ドライフィ
ルム６によるエッチングレジスト６ａ，６ｂの代わり
に、スクリーン印刷によって形成された画像をエッチン
グレジストとして用いることもできる。On the other hand, FIGS. 12 (a) to 12 (d) and FIG.
In the hole filling method shown in (a) to (c), first, FIG.
As shown in FIG. 12A, a conductor layer 1 including a copper plating layer and a through hole 1a formed on an insulating substrate 2 are filled with a filling resin 7 inside the through hole 1a as shown in FIG. After that, a dry film 6 is formed on the surface of the insulating substrate 2.
Then, as shown in FIG. 12D, a desired wiring pattern is baked with ultraviolet light through the mask film 4 from above. Next, as shown in FIG. 13A, an unnecessary portion of the dry film 6 is removed with a developer to obtain an etching resist 6a in a tenting state and an etching resist 6b in a wiring circuit portion. Further, as shown in FIG. 13B, after the exposed conductor layer 1 is removed by etching, finally, as shown in FIG.
As shown in (c), the etching resists 6a and 6b and the filling resin 7 are peeled off to obtain a through-hole printed wiring board. In this method, an image formed by screen printing can be used as an etching resist instead of the etching resists 6a and 6b using the dry film 6.
【０００４】その他、公開特許公報「平４−１４８５９
１号」では、高密度実装を可能にするため、スルーホー
ルを４分割することを特徴とする多目的ビア付き多層プ
リント配線板が提案されている。また、公開特許公報
「平５−１５２７６３号」では、特に共通内層回路入り
多層配線板での設計自由度を向上させて、電子部品の実
装効率を高めるため、一つのスルーホールにおいて、内
層に接する大径のものと内層と離間する小径のものとに
作り分けるという多層プリント配線板の製造方法が提案
されている。更に、公開特許公報「平５−１５２７４６
号」では、一つのスルーホールに複数の回路が形成でき
る高密度配線回路を有するプリント配線板の製造方法が
提案されている。[0004] In addition, a published patent publication "Hei 4-14859"
No. 1 proposes a multilayer printed wiring board with multi-purpose vias, characterized in that through holes are divided into four parts to enable high-density mounting. Also, in Japanese Patent Laid-Open Publication No. Hei 5-152762, in order to improve the degree of freedom in designing a multilayer wiring board containing a common inner layer circuit and to increase the mounting efficiency of electronic components, one through hole contacts the inner layer. A method for manufacturing a multilayer printed wiring board has been proposed in which a large-diameter substrate and a small-diameter substrate separated from an inner layer are separately formed. Furthermore, the published patent publication "Hei 5-152746"
Has proposed a method of manufacturing a printed wiring board having a high-density wiring circuit in which a plurality of circuits can be formed in one through hole.
【０００５】[0005]
【発明が解決しようとする課題】しかし、テンティング
工法の場合、エッチングレジストを図１０（ｄ）に示す
テンティング状態のエッチングレジスト６ａのようなテ
ンティング状態としてスルーホール１ａ内部をエッチン
グ液から保護することが必要なため、スルーホール１ａ
をドライフィルム６で完全にカバーしていなければなら
ず、１つのスルーホール１ａには、１つの回路しか形成
できないという課題があった。However, in the case of the tenting method, the etching resist is set in a tenting state like the etching resist 6a in the tenting state shown in FIG. 10D to protect the inside of the through hole 1a from the etching solution. It is necessary to make through hole 1a
Must be completely covered by the dry film 6, and there is a problem that only one circuit can be formed in one through hole 1a.
【０００６】また、穴埋め工法では、図１２（ｂ）に示
すスルーホール１ａ内を穴埋め樹脂７で充填した後、ス
ルーホール１ａを形成するため、テンティング工法と同
様、１つのスルーホール１ａに１つの回路しか形成でき
ないという課題があった。In the hole filling method, after filling the inside of the through hole 1a shown in FIG. 12B with the filling resin 7, the through hole 1a is formed. There was a problem that only one circuit could be formed.
【０００７】一方、公開特許公報「平５−１５２７６３
号」では、共通内層回路を用いない場合は、内層回路設
計を変更することで同様な効果が得られること、また、
一つのスルーホールには、一つの回路しか形成されてお
らず、内層との接続状態のみ異なるので、一つのスルー
ホールでの高密度化としては２倍が限度であるという課
題がある。[0007] On the other hand, Japanese Patent Laid-Open Publication No. Hei 5-152762
If the common inner layer circuit is not used, the same effect can be obtained by changing the inner layer circuit design.
Since only one circuit is formed in one through-hole and only the connection state with the inner layer is different, there is a problem that the density can be increased twice in one through-hole.
【０００８】更に、公開特許公報「平４−１４８５９１
号」，「平５−１５２７４５号」では、ビアホールやス
ルーホールを分割することが特徴であるが、一つのスル
ーホールでの高密度化としては４倍が限度であるという
課題がある。[0008] Furthermore, the published patent publication "Hei 4-148591"
No. 5 and No. 5-152745, the feature is that the via holes and the through holes are divided. However, there is a problem that the density of one through hole is limited to four times.
【０００９】本発明の目的は、高密度化が実現できるス
ルーホールを有する多層プリント配線板及びその製造方
法を提供することにある。It is an object of the present invention to provide a multilayer printed wiring board having through holes capable of realizing high density and a method for manufacturing the same.
【００１０】[0010]
【課題を解決するための手段】本発明の多層プリント配
線板は、小径スルーホールと大径スルーホールによって
構成される段付きスルーホールを有する多層プリント配
線板において、前記小径スルーホールの導体層と前記大
径スルーホールの導体層をそれぞれ独立して円周方向に
複数に分割し配線回路と内層回路のそれぞれに接続ある
いは離間させて独立回路を形成したことを特徴とする。According to the present invention, there is provided a multilayer printed wiring board having a stepped through-hole formed by a small-diameter through-hole and a large-diameter through-hole. The conductor layer of the large-diameter through-hole is independently divided into a plurality in the circumferential direction, and is connected to or separated from the wiring circuit and the inner layer circuit to form an independent circuit.
【００１１】本発明の多層プリント配線板の製造方法
は、多層化された絶縁基板の所定の位置に小径の貫通孔
を形成した後大径ドリルで所定の深さ迄削り段付き穴を
形成する工程と、小径部と大径部で異る方向にシフトさ
せためっき除去部をもつ十字型中子を位置決めして前記
段付き穴に挿入する工程と、銅めっきを施し導体層と段
付きスルーホールを形成した後前記十字型中子を取り外
す工程と前記導体層および前記段付きスルーホール上に
ポジ型感光性樹脂塗膜を電着コーティングする工程と、
配線回路形成部およびランド形成部は光を遮断すると共
に前記段付きスルーホール上を含む領域の光を遮断する
パターンを有するマスクフィルムを当接し紫外線を照射
する工程と、現像により露光部分の前記ポジ型感光性樹
脂塗膜を選択的に除去する工程と、現像により露出した
導体層をエッチングで除去する工程と、更に残存する前
記ポジ型感光性樹脂膜を除去する工程とを有することを
特徴とする。In the method of manufacturing a multilayer printed wiring board according to the present invention, a small-diameter through hole is formed at a predetermined position on a multilayered insulating substrate, and then a stepped hole is formed by cutting with a large-diameter drill to a predetermined depth. A step of positioning a cruciform core having a plating removal portion shifted in different directions between a small diameter portion and a large diameter portion and inserting the core into the stepped hole; applying copper plating to the conductor layer and stepped through. The step of removing the cross-shaped core after forming a hole and the step of electrodepositing a positive photosensitive resin coating film on the conductor layer and the stepped through hole ,
The wiring circuit forming portion and the land forming portion block a light and irradiate ultraviolet rays by contacting a mask film having a pattern for blocking light in a region including on the stepped through hole ; and developing the positive portion of the exposed portion by developing. Selectively removing the mold photosensitive resin coating film, removing the conductive layer exposed by development by etching, and further removing the remaining positive photosensitive resin film. I do.
【００１２】[0012]
【実施例】次に、本発明の実施例について図面を参照し
て説明する。Next, embodiments of the present invention will be described with reference to the drawings.
【００１３】図１は本発明の一実施例の多層プリント配
線板の断面図、図２は図１の一部断面斜視図である。本
発明の一実施例の多層プリント配線板は、図１および図
２に示すように、大径スルーホールと小径スルーホール
とによって構成される段付きスルーホール１ｄを有し、
この大径スルーホールと小径スルーホールはそれぞれの
導体層１が円周方向に複数に分割されて独立しており、
配線回路１ｂと内層回路１ｅにそれぞれ独立して接続あ
るいは離間して複数の独立回路を形成している。FIG. 1 is a sectional view of a multilayer printed wiring board according to an embodiment of the present invention, and FIG. 2 is a partially sectional perspective view of FIG. As shown in FIGS. 1 and 2, the multilayer printed wiring board according to one embodiment of the present invention has a stepped through hole 1d including a large diameter through hole and a small diameter through hole.
The large-diameter through-hole and the small-diameter through-hole are independent in that each conductor layer 1 is divided into a plurality in the circumferential direction.
The wiring circuit 1b and the inner layer circuit 1e are independently connected or separated from each other to form a plurality of independent circuits.
【００１４】図３は本発明の実施例の多層プリント配線
板の製造工程で用いる十字型中子の斜視図であり、この
中子の十字型部分は小径部と大径部への挿入部でシフト
した形状であり、スルーホールの小径部と大径部とに銅
めっきを施す際に、そのスルーホール内にワッシャ８と
共に挿入され、この中子が小径部と大径部に接触した個
所が、図２のスルーホール壁面のように、めっきされな
い部分となる。図４（ａ）〜（ｃ），図５（ａ）〜
（ｂ），図６（ａ）〜（ｂ）は本発明の多層プリント配
線板の製造方法の第１の実施例を説明する工程順に示し
た断面図である。本発明の多層プリント配線板の製造方
法の第１の実施例は、まず、図４（ａ）に示すように、
絶縁基板２に導体層１及び内層回路１ｅを形成する。絶
縁基板２の材質としては、例えばガラス布基材エポキシ
樹脂やガラス布基材ポリイミド樹脂を使用できる。次
に、図４（ｂ）に示すように、小径ドリルにて貫通孔を
形成した後、大径ドリルで所定の深さ迄削り段付き穴を
形成する。次に図４（ｃ）に示すように、図３に示した
十字型中子を位置決めして挿入してスルーホールめっき
を行った後、十字型中子を外し導体層１と段付きスルー
ホール１ｄを形成する。次に、図５（ａ）に示すよう
に、絶縁基板表面全体の導体層１と段付きスルーホール
１ｄ上にポジ型感光性樹脂塗膜３ａを電着コーティング
により形成した後乾燥する。更に、図５（ｂ）に示すよ
うに、ポジ型感光性樹脂塗膜３ａの上に配線回路形成部
やランド形成部および段付きスルーホール１ｄ上を含む
領域の光を遮断しそれ以外の部分は光を透過するパター
ンを有するマスクフィルム４ａを当接し、散乱光紫外線
５により露光し、露光されたポジ型感光性樹脂塗膜３ｂ
を形成する。穴径に対するマスク帯の幅は、表１に示す
寸法が最適である。FIG. 3 is a perspective view of a cross-shaped core used in the manufacturing process of the multilayer printed wiring board according to the embodiment of the present invention.
The cross-shaped part of the core shifts at the insertion part into the small diameter part and the large diameter part
With copper in the small diameter part and large diameter part of the through hole
When plating, with a washer 8 in the through hole
The pieces that were inserted together and this core contacted the small diameter part and the large diameter part
Where the plating is not plated as in the through-hole wall in FIG.
Part. 4 (a) to 4 (c), FIG. 5 (a) to
6 (b) and FIGS. 6 (a) and 6 (b) are sectional views shown in the order of steps for explaining the first embodiment of the method for manufacturing a multilayer printed wiring board according to the present invention. In the first embodiment of the method for manufacturing a multilayer printed wiring board according to the present invention, first, as shown in FIG.
The conductor layer 1 and the inner layer circuit 1e are formed on the insulating substrate 2. As a material of the insulating substrate 2, for example, a glass cloth base epoxy resin or a glass cloth base polyimide resin can be used. Next, as shown in FIG. 4B, a through hole is formed by a small diameter drill, and then a stepped hole is formed by a large diameter drill to a predetermined depth. Next, as shown in FIG. 4 (c), after positioning and inserting the cruciform core shown in FIG. 3 to perform through-hole plating, the cruciform core is removed, and the conductor layer 1 and the stepped through hole are removed. 1d is formed. Next, as shown in FIG. 5A, the conductor layer 1 on the entire surface of the insulating substrate and the stepped through hole
A positive photosensitive resin coating 3a is formed on 1d by electrodeposition coating and then dried. Further, as shown in FIG. 5B, a wiring circuit forming portion, a land forming portion, and a stepped through hole 1d are included on the positive photosensitive resin coating film 3a.
The light of the region is blocked, and the other portions are brought into contact with a mask film 4a having a pattern that transmits light, exposed to scattered ultraviolet rays 5, and exposed to a positive photosensitive resin coating film 3b.
To form The dimensions shown in Table 1 are optimal for the width of the mask band with respect to the hole diameter.
【００１５】[0015]
【表１】 [Table 1]
【００１６】次に、図６（ａ）に示すように、マスクフ
ィルム４ａを取り外し露光された部分のポジ型感光性樹
脂塗膜３ｂをｐＨ１０〜１３のＮａ2 ＣＯ3 やＮａ2 Ｓ
ｉＯ3 などのアルカリ水溶液の現像液で除去した導体層
１を酸性のエッチング液により除去する。次に、図６
（ｂ）に示すように、ポジ型感光性樹脂塗膜３ａを〜４
％のＮａＯＨまたはＫＯＨなどの温水溶液で剥離除去す
ることにより第１の実施例による独立回路を有する段付
きスルーホール１ｄが形成された多層プリント配線板を
得る。Next, as shown in FIG. 6A, the mask film 4a is removed and the exposed portion of the positive photosensitive resin coating 3b is exposed to Na 2 CO 3 or Na 2 S having a pH of 10 to 13.
The conductor layer 1 removed with a developing solution of an alkaline aqueous solution such as iO 3 is removed with an acidic etching solution. Next, FIG.
(B) As shown in FIG.
The multilayer printed wiring board having a stepped through hole 1d having an independent circuit according to the first embodiment is obtained by stripping and removing with a hot aqueous solution of NaOH or KOH.
【００１７】図７（ａ）〜（ｃ），図８（ａ）〜
（ｂ），図９（ａ）〜（ｂ）は本発明の多層プリント配
線板の製造方法の第２の実施例を説明する工程順に示し
た断面図である。本発明の多層プリント配線板の製造方
法の第２の実施例は、まず、図７（ａ）に示すように、
絶縁基板２に内層回路１ｅを形成する。絶縁基板２の材
質としては、例えばガラス布基材エポキシ樹脂やガラス
布基材ポリイミド樹脂や触媒入りエポキシ樹脂を使用で
きる。次に、図７（ｂ）に示すように、小径ドリルにて
貫通孔を形成した後、大径ドリルで所定の深さ迄削り段
付き穴を形成する。次に、図７（ｃ）に示すように、図
３と同様の十字型中子を位置決めして挿入して無電界銅
厚付けめっき法によりスルーホールめっきを行った後、
十字型中子を外し導体層１と段付きスルーホール１ｄを
形成する。次に、図８（ａ）に示すように、絶縁基板２
の表面全体の導体層１と段付きスルーホール１ｄ上にポ
ジ型感光性樹脂塗膜３ａを電着コーティングにより形成
した後乾燥する。更に、図８（ｂ）に示すように、ポジ
型感光性樹脂塗膜３ａの上に配線回路形成部やランド形
成部および段付きスルーホール１ｄ上を含む領域の光を
遮断しそれ以外は光を透過するパターンを有するマスク
フィルム４ａを当接し、散乱光紫外線５により露光し、
露光されたポジ型感光性樹脂塗膜３ｂを形成する。穴径
に対するマスク帯の幅は表１に示す寸法が最適である。FIGS. 7A to 7C and FIGS.
9 (b) and FIGS. 9 (a) and 9 (b) are sectional views shown in the order of steps for explaining a second embodiment of the method for manufacturing a multilayer printed wiring board according to the present invention. In the second embodiment of the method for manufacturing a multilayer printed wiring board according to the present invention, first, as shown in FIG.
An inner circuit 1e is formed on the insulating substrate 2. As a material of the insulating substrate 2, for example, a glass cloth base epoxy resin, a glass cloth base polyimide resin, or a catalyst-containing epoxy resin can be used. Next, as shown in FIG. 7B, after forming a through hole with a small diameter drill, a stepped hole is formed by cutting to a predetermined depth with a large diameter drill. Next, as shown in FIG. 7 (c), a cross-shaped core similar to that of FIG. 3 is positioned and inserted, and through-hole plating is performed by an electroless copper thick plating method.
The cross-shaped core is removed to form the conductor layer 1 and the stepped through hole 1d. Next, as shown in FIG.
A positive photosensitive resin coating 3a is formed on the entire surface of the conductor layer 1 and the stepped through hole 1d by electrodeposition coating, and then dried. Further, as shown in FIG. 8 (b), the light in the region including the wiring circuit forming portion, the land forming portion and the stepped through hole 1d on the positive photosensitive resin coating film 3a is blocked, and the light is otherwise blocked. A mask film 4a having a pattern that transmits light, is exposed by scattered light ultraviolet rays 5,
The exposed positive photosensitive resin coating film 3b is formed. The dimensions shown in Table 1 are optimal for the width of the mask band with respect to the hole diameter.
【００１８】次に、図９（ａ）に示すように、マスクフ
ィルム４ａを取り外し露光された部分のポジ型感光性樹
脂塗膜３ｂをｐＨ１０〜１３のＮａ2 ＣＯ3 やＮａ2 Ｓ
ｉＯ3 などのアルカリ水溶液の現像液で除去した後露出
した導体層１を酸性のエッチング液により除去する。次
に、図９（ｂ）に示すように、ポジ型感光性樹脂塗膜３
ａを１〜４％のＮａＯＨまたはＫＯＨなどの温水溶液で
剥離除去することにより第２の実施例による独立回路を
有する段付きスルーホール１ｄが形成された多層プリン
ト配線板が得られる。Next, as shown in FIG. 9A, the mask film 4a is removed and the exposed portion of the positive photosensitive resin coating film 3b is exposed to Na 2 CO 3 or Na 2 S having a pH of 10 to 13.
The conductor layer 1 exposed after removal with a developing solution of an alkaline aqueous solution such as iO 3 is removed with an acidic etching solution. Next, as shown in FIG. 9B, the positive photosensitive resin coating 3
The multi-layer printed wiring board having the stepped through-hole 1d having the independent circuit according to the second embodiment is obtained by removing and removing a with a warm aqueous solution of 1 to 4% NaOH or KOH.
【００１９】[0019]
【発明の効果】以上説明したように本発明は、段付きス
ルーホールの小径部と大径部のそれぞれの導体層を複数
に分割し配線回路と内層回路にそれぞれ独立して接続あ
るいは離間して複数の独立回路を形成することにより、
１つのスルーホールで８倍の高密度化を実現できる効果
がある。As described above, according to the present invention, the conductor layer of each of the small-diameter portion and the large-diameter portion of the stepped through hole is divided into a plurality of portions and connected to or separated from the wiring circuit and the inner layer circuit independently. By forming multiple independent circuits,
There is an effect that eight times higher density can be realized with one through hole.
【図１】本発明の一実施例の多層プリント配線板の断面
図である。FIG. 1 is a sectional view of a multilayer printed wiring board according to one embodiment of the present invention.
【図２】図１の一部断面斜視図である。FIG. 2 is a partial cross-sectional perspective view of FIG.
【図３】本発明の実施例の多層プリント配線板の製造工
程で用いる十字型中子の斜視図である。FIG. 3 is a perspective view of a cross-shaped core used in a manufacturing process of the multilayer printed wiring board according to the embodiment of the present invention.
【図４】（ａ）〜（ｃ）は本発明の多層プリント配線板
の製造方法の第１の実施例を説明する工程順に示した断
面図である。FIGS. 4A to 4C are cross-sectional views sequentially illustrating steps of a first embodiment of the method for manufacturing a multilayer printed wiring board according to the present invention.
【図５】（ａ）〜（ｂ）は本発明の多層プリント配線板
の製造方法の第１の実施例を説明する工程順に示した断
面図である。5 (a) and 5 (b) are cross-sectional views shown in the order of steps for explaining a first embodiment of the method for manufacturing a multilayer printed wiring board according to the present invention.
【図６】（ａ）〜（ｂ）は本発明の多層プリント配線板
の製造方法の第１の実施例を説明する工程順に示した断
面図である。FIGS. 6 (a) and 6 (b) are cross-sectional views shown in the order of steps for explaining a first embodiment of the method for manufacturing a multilayer printed wiring board according to the present invention.
【図７】（ａ）〜（ｃ）は本発明の多層プリント配線板
の製造方法の第２の実施例を説明する工程順に示した断
面図である。7 (a) to 7 (c) are cross-sectional views shown in the order of steps for explaining a second embodiment of the method for manufacturing a multilayer printed wiring board according to the present invention.
【図８】（ａ）〜（ｂ）は本発明の多層プリント配線板
の製造方法の第２の実施例を説明する工程順に示した断
面図である。8 (a) and 8 (b) are cross-sectional views shown in the order of steps for explaining a second embodiment of the method for manufacturing a multilayer printed wiring board according to the present invention.
【図９】（ａ）〜（ｂ）は本発明の多層プリント配線板
の製造方法の第２の実施例を説明する工程順に示した断
面図である。FIGS. 9 (a) and 9 (b) are cross-sectional views shown in the order of steps for explaining a second embodiment of the method for manufacturing a multilayer printed wiring board according to the present invention.
【図１０】図（ａ）〜（ｄ）は従来のテンティング工程
によるプリント配線板の製造方法の一例を説明する工程
順に示した断面図である。FIGS. 10A to 10D are cross-sectional views sequentially illustrating steps of an example of a method of manufacturing a printed wiring board by a conventional tenting process.
【図１１】（ａ）〜（ｂ）は従来のテンティング工法に
よるプリント配線板の製造方法の一例を説明する工程順
に示した断面図である。FIGS. 11A and 11B are cross-sectional views sequentially illustrating steps of an example of a method for manufacturing a printed wiring board by a conventional tenting method.
【図１２】（ａ）〜（ｄ）は従来の穴埋め工法によるプ
リント配線板の製造方法の一例を説明する工程順に示し
た断面図である。12 (a) to 12 (d) are cross-sectional views sequentially illustrating steps of an example of a method for manufacturing a printed wiring board by a conventional hole filling method.
【図１３】（ａ）〜（ｃ）は従来の穴埋め工法によるプ
リント配線板の製造方法の一例を説明する工程順に示し
た断面図である。13 (a) to 13 (c) are cross-sectional views shown in the order of steps for explaining an example of a method for manufacturing a printed wiring board by a conventional hole filling method.
１ 導体層 １ｂ 配線回路 １ｃ スルーホールランド １ｄ 段付きスルーホール １ｅ 内層回路 ２ 絶縁基板 ３ａ ポジ型感光性樹脂塗膜 ３ｂ 露光されたポジ型感光性樹脂塗膜 ４，４ａ マスクフィルム ５ 散乱光紫外線 ６ ドライフィルム ６ａ テンティング状態のエッチングレジスト ６ｂ 配線回路部分のエッチングレジスト ７ 穴埋め樹脂 ８ ワッシャー Reference Signs List 1 conductor layer 1b wiring circuit 1c through hole land 1d stepped through hole 1e inner layer circuit 2 insulating substrate 3a positive photosensitive resin coating film 3b exposed positive photosensitive resin coating film 4,4a mask film 5 scattered light ultraviolet ray 6 Dry film 6a Tenting state etching resist 6b Wiring circuit part etching resist 7 Hole filling resin 8 Washer
Claims (2)
よって構成される段付きスルーホールを有する多層プリ
ント配線板において、前記小径スルーホールの導体層と
前記大径スルーホールの導体層をそれぞれ独立して円周
方向に複数に分割し配線回路と内層回路のそれぞれに接
続あるいは離間させて独立回路を形成したことを特徴と
する多層プリント配線板。1. A multilayer printed wiring board having a stepped through-hole constituted by a small-diameter through-hole and a large-diameter through-hole, wherein the conductor layer of the small-diameter through-hole and the conductor layer of the large-diameter through-hole are independently formed. A multilayer printed wiring board, wherein the multilayer printed wiring board is divided into a plurality of pieces in a circumferential direction and connected to or separated from a wiring circuit and an inner layer circuit to form an independent circuit.
径の貫通孔を形成した後大径ドリルで所定の深さ迄削り
段付き穴を形成する工程と、小径部と大径部で異る方向
にシフトさせためっき除去部をもつ十字型中子を位置決
めして前記段付き穴に挿入する工程と、銅めっきを施し
導体層と段付きスルーホールを形成した後前記十字型中
子を取り外す工程と前記導体層および前記段付きスルー
ホール上にポジ型感光性樹脂塗膜を電着コーティングす
る工程と、配線回路形成部およびランド形成部は光を遮
断すると共に前記段付きスルーホール上を含む領域の光
を遮断するパターンを有するマスクフィルムを当接し紫
外線を照射する工程と、現像により露光部分の前記ポジ
型感光性樹脂塗膜を選択的に除去する工程と、現像によ
り露出した導体層をエッチングで除去する工程と、更に
残存する前記ポジ型感光性樹脂膜を除去する工程とを有
することを特徴とする多層プリント配線板の製造方法。2. A step of forming a small-diameter through hole at a predetermined position of a multilayered insulating substrate, and then cutting the hole to a predetermined depth with a large-diameter drill, and forming a stepped hole at the small-diameter portion and the large-diameter portion. Positioning a cruciform core having a plating removal portion shifted in a different direction and inserting the cruciform core into the stepped hole, and performing copper plating to form a conductor layer and a stepped through hole, and then forming the crossed core. Removing the conductor layer and the stepped through
A mask having a step of electrodepositing coating a positive-type photosensitive resin film on the hole, a pattern for blocking the light in the region including the upper said stepped through hole with the wiring circuit formation portion and a land forming part blocks light A step of contacting the film with ultraviolet light, a step of selectively removing the positive photosensitive resin coating film on the exposed portion by development, and a step of etching away the conductor layer exposed by development, and further remaining Removing the positive photosensitive resin film.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP32720894A JP2617692B2 (en) | 1994-12-28 | 1994-12-28 | Multilayer printed wiring board and method of manufacturing the same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP32720894A JP2617692B2 (en) | 1994-12-28 | 1994-12-28 | Multilayer printed wiring board and method of manufacturing the same |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH08186381A JPH08186381A (en) | 1996-07-16 |
| JP2617692B2 true JP2617692B2 (en) | 1997-06-04 |
Family
ID=18196528
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP32720894A Expired - Fee Related JP2617692B2 (en) | 1994-12-28 | 1994-12-28 | Multilayer printed wiring board and method of manufacturing the same |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2617692B2 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4923884B2 (en) | 2006-09-08 | 2012-04-25 | 日本電気株式会社 | Multilayer printed wiring board and manufacturing method thereof |
| CN109219251B (en) * | 2018-08-30 | 2020-11-13 | 广州广合科技股份有限公司 | Manufacturing method of fine circuit of flexible circuit board |
-
1994
- 1994-12-28 JP JP32720894A patent/JP2617692B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH08186381A (en) | 1996-07-16 |
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|---|---|---|---|
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 19970121 |
|
| LAPS | Cancellation because of no payment of annual fees |