JPS6143879B2 - - Google Patents
Info
- Publication number
- JPS6143879B2 JPS6143879B2 JP52095308A JP9530877A JPS6143879B2 JP S6143879 B2 JPS6143879 B2 JP S6143879B2 JP 52095308 A JP52095308 A JP 52095308A JP 9530877 A JP9530877 A JP 9530877A JP S6143879 B2 JPS6143879 B2 JP S6143879B2
- Authority
- JP
- Japan
- Prior art keywords
- hole
- forming
- holes
- conductive layer
- etching
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Landscapes
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
- Manufacturing Of Printed Circuit Boards (AREA)
Description
【発明の詳細な説明】
本発明は孔壁に導電層を有する貫通孔(以下ス
ルーホールと略称)と、導電層のない貫通孔(以
下非スルーホールと略称)とを併せもつスルーホ
ールプリント配線板の製造方法に関する。Detailed Description of the Invention The present invention provides a through-hole printed wiring having both a through-hole having a conductive layer on the hole wall (hereinafter referred to as a "through-hole") and a through-hole having no conductive layer (hereinafter referred to as a "non-through-hole"). This invention relates to a method for manufacturing a board.
従来、スルーホールと非スルーホールとを併せ
もつプリント配線板の上記両スルーホール孔の形
成方法については、先ず絶縁基材の所望する位置
にスルーホール用の孔をあけ、順次パネルメツ
キ、回路パターンのレジスト印刷、回路パターン
のエツチングによる形成、前記レジストの除去工
程を経た後に、エツチング形成されたパターンを
対象とし、且つ目視による位置決め、或いは数値
制御等による自動位置決め等を行い、孔あけして
非スルーホール形成する公知の方法が採られてい
た。 Conventionally, the method for forming both through-holes in a printed wiring board that has both through-holes and non-through-holes is to first drill holes for through-holes at desired positions in an insulating base material, then sequentially plate the panel and form the circuit pattern. After resist printing, forming a circuit pattern by etching, and removing the resist, the etched pattern is subjected to visual positioning or automatic positioning using numerical control, etc., and holes are drilled to eliminate non-through holes. A known method of forming holes was used.
しかしながらこれら従来方法は、数値制御装置
による自動孔あけ機やテンプレート方式による倣
い式手動孔あけ機等による孔あけ工事の際、基材
をテーブル上に再セツトすることによる寸法精度
的誤差のため、スルーホールと非スルーホールと
の間に相対的な位置ズレが生じ、エツチング形成
後にランドに対する非スルーホールのズレ、およ
びこのズレに起因するランド欠損等の不良事故に
つながる恐れがあつた。又、エツチング形成され
たランドを対象とする孔あけを行なう際、ランド
部分が絶縁基材の表面に対して密着面積が少ない
ため、孔あけ時のドリルの機械的回転切削力によ
つてランド部分が絶縁基材から剥れる剥離現象を
生ずるという欠点があつた。 However, these conventional methods suffer from errors in dimensional accuracy due to resetting the base material on the table during drilling work using an automatic drilling machine using a numerical control device or a copying manual drilling machine using a template method. A relative positional shift occurs between the through hole and the non-through hole, which may lead to a shift of the non-through hole with respect to the land after etching formation, and a defect such as land loss due to this shift. In addition, when drilling holes in etched lands, the land portions have a small contact area with the surface of the insulating base material, so the land portions may be damaged by the mechanical rotational cutting force of the drill during drilling. There was a drawback that a peeling phenomenon occurred in which the material peeled off from the insulating base material.
本発明の目的は前述したスルーホールプリント
配線板の問題点を解決する製造方法を提供するこ
とにある。 An object of the present invention is to provide a manufacturing method that solves the above-mentioned problems of through-hole printed wiring boards.
本発明によればプリント配線板のランドの位置
に導電層の孔壁を有する第1の貫通孔と、孔壁に
導電層のない第2の貫通孔とを形成してスルーホ
ールプリント配線板の製造方法において、前記第
1の貫通孔の孔壁に前記導電層を形成する前に前
記第2の貫通孔を形成する工程と、前記第1の貫
通孔の孔壁に前記導電層を形成するときに前記第
2の貫通孔の孔壁にも前記導電層を形成する工程
と、前記ランドおよび導電回路をエツチング形成
するときに前記第2の貫通孔の孔壁上り導電層を
エツチング除去する工程とを有することを特徴と
するスルーホールプリント配線板の製造方法が得
られる。 According to the present invention, a first through hole having a hole wall of a conductive layer and a second through hole having no conductive layer on the hole wall are formed at the land position of the printed wiring board, thereby forming a through hole printed wiring board. In the manufacturing method, the step of forming the second through hole before forming the conductive layer on the hole wall of the first through hole, and forming the conductive layer on the hole wall of the first through hole. Sometimes, a step of forming the conductive layer also on the hole wall of the second through hole, and a step of etching away the conductive layer on the hole wall of the second through hole when forming the land and the conductive circuit by etching. There is obtained a method for manufacturing a through-hole printed wiring board characterized by having the following steps.
以下、図面を参照して本発明を詳細に説明す
る。 Hereinafter, the present invention will be explained in detail with reference to the drawings.
第1図乃至第6図は従来方法によるスルーホー
ルプリント配線板の製造方法すなわちスルーホー
ルと非スルーホールの形成方法を順を追つて示す
断面図であり、第7図乃至第11図は本発明の実
施例によるスルーホールと非スルーホールの形成
方法を順を追つて示す断面図である。スルーホー
ル1個の孔の形成方法については従来方法(第1
図〜第6図)と本発明方法(第7図〜第11図)
には図に示す如く工程に差はないが、非スルーホ
ール2側の孔の形成方法について従来方法ではエ
ツチングレジスト6を除去したのちに孔あけを行
つている。(第5図、第6図参照)
一方、本発明による本実施例では、第7図に示
す如くスルーホール1と非スルーホール2用の孔
あけを同時に行い、更に第8図に示す如く無電解
銅メツキおよび電気銅メツキにより貫通孔孔壁に
銅メツキをも同時に行うことに本発明の特徴があ
る。次に第9図の如くエツチングレジスト6とな
る導電回路印刷時に基板の片側表面の電気銅メツ
キ層5上に非スルーホール2の孔の入口全体を膜
状に覆ういわゆるテンテイング法を併用したフオ
トレジスト等を被着させる。この際、非スルーホ
ール2側のランド中央部に非スルーホール2の径
より小さい空洞部分7を設けてエツチングレジス
ト6を印刷することにより孔壁の電気銅メツキ層
5を除去するエツチング液が表裏面を貫通して流
れるのでエツチング液の流通が促進されエツチン
グされ易くなる。しかし、プリント配線板の設計
上非スルーホール2の孔壁に電気銅が残つていて
も差し支えない場合には空洞部分7を設けなくて
良いことは勿論である。次に第10図の如くエツ
チング処理を行うと孔内に流入するエツチング液
により孔壁の電気銅メツキ層5は除去されエツチ
ングレジスト6下部の銅箔層4および電気銅メツ
キ層5のみが残り基板表面にランドが形成され
る。非スルーホール2の孔の周囲のランドのエツ
チング液によるいわゆるクワレ部分はせいぜい
0.1mm未満であり、信頼性に影響のない程度で実
装する部品のリード線とランドとの半田付け性に
ついては従来方法と差はない。次いで第11図に
示す如くエツチングレジスト6の除去を行なえば
第6図と同様な非スルーホール2が形成される。 1 to 6 are cross-sectional views showing a method of manufacturing a through-hole printed wiring board by a conventional method, that is, a method of forming through-holes and non-through-holes, and FIGS. FIG. 3 is a cross-sectional view showing step by step a method for forming through holes and non-through holes according to the embodiment. Regarding the method of forming one through hole, the conventional method (first
Figures 7 to 6) and the method of the present invention (Figures 7 to 11)
As shown in the figure, there is no difference in the process, but in the conventional method of forming the hole on the non-through hole 2 side, the etching resist 6 is removed and then the hole is formed. (See FIGS. 5 and 6) On the other hand, in this embodiment of the present invention, holes for through hole 1 and non-through hole 2 are simultaneously drilled as shown in FIG. A feature of the present invention is that the walls of the through-holes are simultaneously plated with copper by electrolytic copper plating and electrolytic copper plating. Next, as shown in FIG. 9, when printing the conductive circuit that will become the etching resist 6, a photoresist is applied in conjunction with the so-called tenting method to cover the entire entrance of the non-through hole 2 in a film form on the electrolytic copper plating layer 5 on one surface of the board. etc. are applied. At this time, a cavity 7 smaller in diameter than the non-through hole 2 is provided in the center of the land on the side of the non-through hole 2, and an etching resist 6 is printed to expose the etching solution for removing the electrolytic copper plating layer 5 on the hole wall. Since it flows through the back surface, the circulation of the etching liquid is promoted and etching becomes easier. However, if the design of the printed wiring board allows electrolytic copper to remain on the hole wall of the non-through hole 2, it is of course unnecessary to provide the hollow portion 7. Next, when an etching process is performed as shown in FIG. 10, the electrolytic copper plating layer 5 on the hole wall is removed by the etching solution flowing into the hole, leaving only the copper foil layer 4 and the electrolytic copper plating layer 5 below the etching resist 6. A land is formed on the surface. The so-called cracked area caused by the etching solution on the land around the non-through hole 2 is at most
It is less than 0.1 mm, and there is no difference from the conventional method in terms of solderability between the lead wire and land of the mounted component, which does not affect reliability. Next, as shown in FIG. 11, by removing the etching resist 6, a non-through hole 2 similar to that shown in FIG. 6 is formed.
本発明の方法はスルーホール1と非スルーホー
ル2用の孔あけが同時にできるので数値制御装置
による自動孔あけ機等を使用する際、基準となる
孔あけ原点が同一に共通使用することができる利
点がある。従つて、従来方法よりスルーホール1
と非スルーホール2の相対位置精度は本発明方法
の方が優れている。 The method of the present invention allows drilling for through-hole 1 and non-through-hole 2 at the same time, so when using an automatic drilling machine using a numerical control device, the same reference drilling origin can be used in common. There are advantages. Therefore, through hole 1 is smaller than the conventional method.
The method of the present invention is superior in terms of the relative position accuracy of the non-through hole 2 and the non-through hole 2.
又、第1図から第6図までの従来方法と第7図
から第11図までの本発明方法とを比較すれば明
らかなように、本発明の方法は従来方法より一工
程少なくて済むため、孔あけ準備作業等の削減に
よりスルーホール1と非スルーホール2の総合的
孔あけ工数削減の利点もある。 Furthermore, as is clear from a comparison between the conventional method shown in FIGS. 1 to 6 and the method of the present invention shown in FIGS. 7 to 11, the method of the present invention requires one less step than the conventional method. There is also the advantage of reducing the total number of man-hours for drilling through-holes 1 and non-through-holes 2 by reducing drilling preparation work and the like.
第1図乃至第6図は従来方法の主要工程の拡大
断面図、第7図乃至第11図は本発明方法の一実
施例を説明するためのスルーホールプリント配線
板の主要工程におけるスルーホール、非スルーホ
ールの拡大断面図である。
1……スルーホール、2……非スルーホール、
3……絶縁基材、4……銅箔層、5……電気銅メ
ツキ層、6……エツチングレジスト、7……空洞
部分。
1 to 6 are enlarged sectional views of the main steps of the conventional method, and FIGS. 7 to 11 are through-holes in the main steps of a through-hole printed wiring board for explaining an embodiment of the method of the present invention. FIG. 3 is an enlarged cross-sectional view of a non-through hole. 1...Through hole, 2...Non-through hole,
3... Insulating base material, 4... Copper foil layer, 5... Electrolytic copper plating layer, 6... Etching resist, 7... Cavity portion.
Claims (1)
壁を有する第1の貫通孔と、孔壁に導電層のない
第2の貫通孔とを形成したスルーホールプリント
配線板の製造方法において、前記第1の貫通孔の
孔壁に前記導電層を形成する前に前記第2の貫通
孔を形成する工程と、前記第1の貫通孔の孔壁に
前記導電層を形成するときに前記第2の貫通孔の
孔壁にも前記導電層を形成する工程と、前記ラン
ドおよび導電回路をエツチング形成するときに前
記第2の貫通孔の孔壁上の導電層をエツチング除
去する工程とを有することを特徴とするスルーホ
ールプリント配線板の製造方法。1. A method for manufacturing a through-hole printed wiring board in which a first through hole having a hole wall of a conductive layer is formed at the land position of the printed wiring board, and a second through hole having no conductive layer on the hole wall. forming the second through hole before forming the conductive layer on the wall of the first through hole, and forming the second through hole when forming the conductive layer on the wall of the first through hole; a step of forming the conductive layer also on the hole wall of the second through hole; and a step of etching away the conductive layer on the hole wall of the second through hole when etching the land and the conductive circuit. A method for manufacturing a through-hole printed wiring board, characterized by:
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9530877A JPS5429051A (en) | 1977-08-08 | 1977-08-08 | Method of making throughhhole printed wire board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9530877A JPS5429051A (en) | 1977-08-08 | 1977-08-08 | Method of making throughhhole printed wire board |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5429051A JPS5429051A (en) | 1979-03-03 |
JPS6143879B2 true JPS6143879B2 (en) | 1986-09-30 |
Family
ID=14134122
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP9530877A Granted JPS5429051A (en) | 1977-08-08 | 1977-08-08 | Method of making throughhhole printed wire board |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5429051A (en) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS57170595A (en) * | 1981-04-14 | 1982-10-20 | Fujitsu Ltd | Method of producing printed circuit board |
JPS5892297A (en) * | 1981-11-27 | 1983-06-01 | 富士通株式会社 | Method of producing metal core-filled printed circuit board |
JPS6295893A (en) * | 1985-10-23 | 1987-05-02 | 株式会社日立製作所 | Printed board manufacturing method |
JP2590100B2 (en) * | 1987-05-12 | 1997-03-12 | 株式会社東芝 | Satellite communication system |
JP2706687B2 (en) * | 1987-05-21 | 1998-01-28 | 株式会社東芝 | Satellite communication system |
EP0430842A3 (en) * | 1989-11-27 | 1991-07-17 | International Business Machines Corporation | Apparatus and method for reworking printed wire circuit boards |
JP4010684B2 (en) * | 1998-12-03 | 2007-11-21 | 日本メクトロン株式会社 | Circuit board manufacturing method |
-
1977
- 1977-08-08 JP JP9530877A patent/JPS5429051A/en active Granted
Non-Patent Citations (1)
Title |
---|
ELECTRONIC PACKAGING AND PRODUCTION=1976M7 * |
Also Published As
Publication number | Publication date |
---|---|
JPS5429051A (en) | 1979-03-03 |
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